/****************************************************************************** * * Function: gpioEnableGlobalInterrupt * * Description: This function Enables GPIO interrupts to CPU * * Parameters: void * * Return Value: void * *****************************************************************************/ void gpioEnableGlobalInterrupt( void ) { CSL_GpioHandle hGpio; // Open the CSL GPIO Module 0 hGpio = CSL_GPIO_open (0); CSL_GPIO_bankInterruptEnable(hGpio, GPIOBANKNUM); //GPIOREGS->BINTEN |= 0x01; }
BOOL Gpio_Init() { int32_t pinNum; //CSL_GpioHandle hGpio; if( bGpioInitialized == TRUE) { return TRUE; } // Open the CSL GPIO Module 0 GpioHandle = CSL_GPIO_open (0); // Disable the GPIO global interrupts CSL_GPIO_bankInterruptEnable(GpioHandle, GPIOBANKNUM); // Clear all falling edge trigger and rising edge trigger for (pinNum = GPIO_0; pinNum <= GPIO_15; pinNum++) { CSL_GPIO_clearFallingEdgeDetect(GpioHandle, pinNum); CSL_GPIO_clearRisingEdgeDetect (GpioHandle, pinNum); } // Set all GPIO as input // GPIOREGS->DIR = GPIOREGS->DIR & 0xffffffff; // Configure the GPIOs for NAND flash controller communication // Configure data bus as output //gpioSetDataBusDirection(GPIO_OUT); #ifdef EVMBOARD // Configure the signal pins direction gpioSetDirection(DSP_FPGA_CMD0, GPIO_OUT ); gpioSetDirection(DSP_FPGA_CMD1, GPIO_OUT ); gpioSetDirection(DSP_FPGA_STROBE, GPIO_OUT ); gpioSetDirection(FPGA_DSP_READY, GPIO_IN ); #endif bGpioInitialized = TRUE; return TRUE; }