* 16 ... 0 some FLG.
*/
static struct clk clk_srcs[] = {
#define GATE(x) (((x)<<24) | CLK_FLG_GATE)
#define CPCCR(x) (((x)<<24) | CLK_FLG_CPCCR)
#define CGU(no) (((no)<<24) | CLK_FLG_CGU)
#define CGU_AUDIO(no) (((no)<<24) | CLK_FLG_CGU_AUDIO)
#define TCU_WDT(no) (((no)<<24) | CLK_FLG_WDT)
#define PLL(no) (((no)<<24) | CLK_FLG_PLL)
#define PARENT(P) (((CLK_ID_##P)<<16) | CLK_FLG_PARENT)
#define RELATIVE(P) (((CLK_ID_##P)<<16) | CLK_FLG_RELATIVE)
#define DEF_CLK(N,FLAG) \
[CLK_ID_##N] = { .name = CLK_NAME_##N, .flags = FLAG, }
DEF_CLK(EXT0, CLK_FLG_NOALLOC),
DEF_CLK(EXT1, CLK_FLG_NOALLOC),
DEF_CLK(OTGPHY, CLK_FLG_NOALLOC),
DEF_CLK(APLL, PLL(CPM_CPAPCR)),
DEF_CLK(MPLL, PLL(CPM_CPMPCR)),
DEF_CLK(SCLKA, CPCCR(SCLKA)),
DEF_CLK(CCLK, CPCCR(CDIV)),
DEF_CLK(L2CLK, CPCCR(L2CDIV)),
DEF_CLK(H0CLK, CPCCR(H0DIV)),
DEF_CLK(H2CLK, CPCCR(H2DIV)),
DEF_CLK(PCLK, CPCCR(PDIV)),
DEF_CLK(NEMC, GATE(0) | PARENT(H2CLK)),
DEF_CLK(EFUSE, GATE(1) | PARENT(H2CLK)),
* 23 ... 16 PARENR_ID or RELATIVE_ID.
* 16 ... 0 some FLG.
*/
static struct clk clk_srcs[] = {
#define GATE(x) (((x)<<24) | CLK_FLG_GATE)
#define CPCCR(x) (((x)<<24) | CLK_FLG_CPCCR)
#define CGU(no) (((no)<<24) | CLK_FLG_CGU)
#define PLL(no) (((no)<<24) | CLK_FLG_PLL)
#define PWC(no) (((no)<<24) | CLK_FLG_PWC)
#define PARENT(P) (((CLK_ID_##P)<<16) | CLK_FLG_PARENT)
#define RELATIVE(P) (((CLK_ID_##P)<<16) | CLK_FLG_RELATIVE)
#define DEF_CLK(N,FLAG) \
[CLK_ID_##N] = { .name = CLK_NAME_##N, .flags = FLAG, }
DEF_CLK(EXT0, CLK_FLG_NOALLOC),
DEF_CLK(EXT1, CLK_FLG_NOALLOC),
DEF_CLK(OTGPHY, CLK_FLG_NOALLOC),
DEF_CLK(APLL, PLL(CPM_CPAPCR)),
DEF_CLK(MPLL, PLL(CPM_CPMPCR)),
DEF_CLK(VPLL, PLL(CPM_CPVPCR)),
DEF_CLK(SCLKA, CPCCR(SCLKA)),
DEF_CLK(CCLK, CPCCR(CDIV)),
DEF_CLK(L2CLK, CPCCR(L2CDIV)),
DEF_CLK(H0CLK, CPCCR(H0DIV)),
DEF_CLK(H2CLK, CPCCR(H2DIV)),
DEF_CLK(PCLK, CPCCR(PDIV)),
DEF_CLK(MSC, GATE(32 + 16) | PARENT(PCLK)),