Exemple #1
0
static READ16_HANDLER( eeprom_r )
{
	int res;

logerror("%06x eeprom_r\n",cpu_get_pc());
	/* bit 6 is EEPROM data */
	/* bit 7 is EEPROM ready */
	/* bit 14 is service button */
	res = (EEPROM_read_bit() << 6) | input_port_2_word_r(0,0);
	if (init_eeprom_count)
	{
		init_eeprom_count--;
		res &= 0xbfff;
	}
	return res;
}
ADDRESS_MAP_END

/* sub 6809 */

static void unlock_shared_ram(address_space *space)
{
	sothello_state *state = space->machine().driver_data<sothello_state>();
    if(!space->machine().device<cpu_device>("sub")->suspended(SUSPEND_REASON_HALT))
    {
        state->m_subcpu_status|=1;
    }
    else
    {
        logerror("Sub cpu active! @%x\n",cpu_get_pc(&space->device()));
    }
}
Exemple #3
0
static WRITE8_HANDLER( parodius_3fc0_w )
{
	parodius_state *state = space->machine().driver_data<parodius_state>();

	if ((data & 0xf4) != 0x10)
		logerror("%04x: 3fc0 = %02x\n",cpu_get_pc(&space->device()),data);

	/* bit 0/1 = coin counters */
	coin_counter_w(space->machine(), 0, data & 0x01);
	coin_counter_w(space->machine(), 1, data & 0x02);

	/* bit 3 = enable char ROM reading through the video RAM */
	k052109_set_rmrd_line(state->m_k052109, (data & 0x08) ? ASSERT_LINE : CLEAR_LINE);

	/* other bits unknown */
}
Exemple #4
0
ADDRESS_MAP_END


/***************************************************************************
                                Ultra Balloon
***************************************************************************/

/* Bank Switching */

WRITE8_MEMBER(suna16_state::uballoon_pcm_1_bankswitch_w)
{
	UINT8 *RAM = memregion("pcm1")->base();
	int bank = data & 1;
	if (bank & ~1)	logerror("CPU#2 PC %06X - ROM bank unknown bits: %02X\n", cpu_get_pc(&space.device()), data);
	membank("bank1")->set_base(&RAM[bank * 0x10000 + 0x400]);
}
Exemple #5
0
static WRITE8_HANDLER( rollerg_0010_w )
{
logerror("%04x: write %02x to 0010\n",cpu_get_pc(space->cpu),data);

	/* bits 0/1 are coin counters */
	coin_counter_w(0,data & 0x01);
	coin_counter_w(1,data & 0x02);

	/* bit 2 enables 051316 ROM reading */
	readzoomroms = data & 0x04;

	/* bit 5 enables 051316 wraparound */
	K051316_wraparound_enable(0, data & 0x20);

	/* other bits unknown */
}
Exemple #6
0
static WRITE8_HANDLER( dunhuang_block_h_w )
{
	int i,j, addr;
	UINT8 *tile_addr;

//  logerror("%06x: block dst %x, src %x, xy %x %x, wh %x %x, clr %x\n", cpu_get_pc(space->cpu), dunhuang_block_dest, (dunhuang_block_addr_hi << 8) + dunhuang_block_addr_lo, dunhuang_block_x,dunhuang_block_y,dunhuang_block_w+1,dunhuang_block_h+1,dunhuang_block_c);

	dunhuang_block_h = data;

	tile_addr = memory_region(space->machine, "gfx2") + ((dunhuang_block_addr_hi << 8) + dunhuang_block_addr_lo)*4;

	switch (dunhuang_block_dest)
	{
		case 0x04:	// write to videoram
			for (j = 0; j <= dunhuang_block_h; j++)
			{
				for (i = 0; i <= dunhuang_block_w; i++)
				{
					addr = ((dunhuang_block_x+i)& 0x3f) + ((dunhuang_block_y+j) & 0x1f) * 0x40;

					dunhuang_videoram[addr] = (tile_addr[1] << 8) | tile_addr[0];
					dunhuang_colorram[addr] = dunhuang_block_c;
					tilemap_mark_tile_dirty(tmap, addr);
					tile_addr += 4;
				}
			}
			break;

		case 0x08:	// write to videoram2
			for (j = 0; j <= dunhuang_block_h; j++)
			{
				for (i = 0; i <= dunhuang_block_w; i++)
				{
					addr = ((dunhuang_block_x+i)& 0x3f) + ((dunhuang_block_y+j) & 0x7) * 0x40;

					dunhuang_videoram2[addr] = (tile_addr[1] << 8) | tile_addr[0];
					dunhuang_colorram2[addr] = dunhuang_block_c;
					tilemap_mark_tile_dirty(tmap2, addr);
					tile_addr += 4;
				}
			}
			break;

		default:
			popmessage("%06x: block dst=%x", cpu_get_pc(space->cpu), dunhuang_block_dest);
	}
}
Exemple #7
0
static READ8_HANDLER( cyclej_r )
{
	actfancr_state *state = (actfancr_state *)space->machine->driver_data;
	int pc = cpu_get_pc(space->cpu);
	int ret = state->main_ram[0x26];

	if (offset == 1)
		return state->main_ram[0x27];

	if (pc == 0xe2b1 && ret == 0)
	{
		cpu_spinuntil_int(space->cpu);
		return 1;
	}

	return ret;
}
Exemple #8
0
static WRITE8_HANDLER( rollerg_0010_w )
{
	rollerg_state *state = space->machine->driver_data<rollerg_state>();
	logerror("%04x: write %02x to 0010\n",cpu_get_pc(space->cpu), data);

	/* bits 0/1 are coin counters */
	coin_counter_w(space->machine, 0, data & 0x01);
	coin_counter_w(space->machine, 1, data & 0x02);

	/* bit 2 enables 051316 ROM reading */
	state->readzoomroms = data & 0x04;

	/* bit 5 enables 051316 wraparound */
	k051316_wraparound_enable(state->k051316, data & 0x20);

	/* other bits unknown */
}
static READ16_HANDLER( stadhero_control_r )
{
	switch (offset<<1)
	{
		case 0: /* Player 1 & 2 joystick & buttons */
			return (readinputport(0) + (readinputport(1) << 8));

		case 2: /* Credits, start buttons */
			return readinputport(2) | (readinputport(2)<<8);

		case 4: /* Byte 4: Dipswitch bank 2, Byte 5: Dipswitch Bank 1 */
			return (readinputport(3) + (readinputport(4) << 8));
	}

	logerror("CPU #0 PC %06x: warning - read unmapped memory address %06x\n",cpu_get_pc(),0x30c000+offset);
	return ~0;
}
Exemple #10
0
static READ16_HANDLER( stadhero_control_r )
{
	switch (offset<<1)
	{
		case 0:
			return input_port_read(space->machine(), "INPUTS");

		case 2:
			return input_port_read(space->machine(), "COIN");

		case 4:
			return input_port_read(space->machine(), "DSW");
	}

	logerror("CPU #0 PC %06x: warning - read unmapped memory address %06x\n",cpu_get_pc(&space->device()),0x30c000+offset);
	return ~0;
}
Exemple #11
0
static READ8_DEVICE_HANDLER( scramble_protection_r )
{
	switch (cpu_get_pc(devtag_get_device(device->machine, "maincpu")))
	{
	case 0x00a8: return 0xf0;
	case 0x00be: return 0xb0;
	case 0x0c1d: return 0xf0;
	case 0x0c6a: return 0xb0;
	case 0x0ceb: return 0x40;
	case 0x0d37: return 0x60;
	case 0x1ca2: return 0x00;  /* I don't think it's checked */
	case 0x1d7e: return 0xb0;
	default:
		logerror("%s: read protection\n",cpuexec_describe_context(device->machine));
		return 0;
	}
}
Exemple #12
0
static READ8_HANDLER( mole_protection_r )
{
	/*  Following are all known examples of Mole Attack
    **  code reading from the protection circuitry:
    **
    **  5b0b:
    **  ram[0x0361] = (ram[0x885+ram[0x8a5])&ram[0x886]
    **  ram[0x0363] = ram[0x886]
    **
    **  53c9:
    **  ram[0xe0] = ram[0x800]+ram[0x802]+ram[0x804]
    **  ram[0xea] = ram[0x828]
    **
    **  ram[0xe2] = (ram[0x806]&ram[0x826])|ram[0x820]
    **  ram[0xe3] = ram[0x826]
    **
    **  ram[0x361] = (ram[0x8cd]&ram[0x8ad])|ram[0x8ce]
    **  ram[0x362] = ram[0x8ae] = 0x32
    **
    **  ram[0x363] = ram[0x809]+ram[0x829]+ram[0x828]
    **  ram[0x364] = ram[0x808]
    */

	switch (offset)
	{
	case 0x08: return 0xb0; /* random mole placement */
	case 0x26:
		if (cpu_get_pc(space->cpu) == 0x53d7)
		{
			return 0x06; /* bonus round */
		}
		else
		{ // pc == 0x515b, 0x5162
			return 0xc6; /* game start */
		}
	case 0x86: return 0x91; /* game over */
	case 0xae: return 0x32; /* coinage */
	}

	/*  The above are critical protection reads.
    **  It isn't clear what effect (if any) the
    **  remaining reads have; for now we simply
    **  return 0x00
    */
	return 0x00;
}
Exemple #13
0
static WRITE8_HANDLER( jingbell_magic_w )
{
	igs_magic[offset] = data;

	if (offset == 0)
		return;

	switch(igs_magic[0])
	{
		case 0x01:
			break;

		default:
//          popmessage("magic %x <- %04x",igs_magic[0],data);
			logerror("%06x: warning, writing to igs_magic %02x = %02x\n", cpu_get_pc(space->cpu), igs_magic[0], data);
	}
}
Exemple #14
0
static READ16_HANDLER( zerozone_input_r )
{
	switch (offset)
	{
		case 0x00:
			return input_port_read(space->machine, "SYSTEM");
		case 0x01:
			return input_port_read(space->machine, "INPUTS");
		case 0x04:
			return input_port_read(space->machine, "DSWB");
		case 0x05:
			return input_port_read(space->machine, "DSWA");
	}

	logerror("CPU #0 PC %06x: warning - read unmapped memory address %06x\n", cpu_get_pc(space->cpu), 0x800000 + offset);
	return 0x00;
}
Exemple #15
0
/* Protection/IO chip 146 */
static READ16_HANDLER( sshangha_protection16_r )
{
    switch (offset)
    {
    case 0x050 >> 1:
        return input_port_read(space->machine, "INPUTS");
    case 0x76a >> 1:
        return input_port_read(space->machine, "SYSTEM");
    case 0x0ac >> 1:
        return input_port_read(space->machine, "DSW");

        // Protection TODO
    }

    logerror("CPU #0 PC %06x: warning - read unmapped control address %06x\n",cpu_get_pc(space->cpu),offset<<1);
    return sshangha_prot_data[offset];
}
Exemple #16
0
static void ssystem3_playfield_write(running_machine &machine, int reset, int signal)
{
	ssystem3_state *state = machine.driver_data<ssystem3_state>();
  int d=FALSE;

  if (!reset) {
    state->m_playfield.count=0;
    state->m_playfield.bit=0;
    state->m_playfield.started=FALSE;
    state->m_playfield.signal=signal;
    state->m_playfield.time=machine.time();
  }
  if (!signal && state->m_playfield.signal) {
    attotime t=machine.time();
    state->m_playfield.high_time=t - state->m_playfield.time;
    state->m_playfield.time=t;

    //    logerror("%.4x playfield %d lowtime %s hightime %s\n",(int)activecpu_get_pc(), state->m_playfield.count,
    //       state->m_playfield.low_time.as_string(7), state->m_playfield.high_time.as_string(7) );

    if (state->m_playfield.started) {
      // 0 twice as long low
      // 1 twice as long high
      if (state->m_playfield.low_time > state->m_playfield.high_time) d=TRUE;

      state->m_playfield.data&=~(1<<(state->m_playfield.bit^7));
      if (d) state->m_playfield.data|=1<<(state->m_playfield.bit^7);
      state->m_playfield.bit++;
      if (state->m_playfield.bit==8) {
	logerror("%.4x playfield wrote %d %02x\n", (int)cpu_get_pc(machine.device("maincpu")), state->m_playfield.count, state->m_playfield.data);
	state->m_playfield.u.data[state->m_playfield.count]=state->m_playfield.data;
	state->m_playfield.bit=0;
	state->m_playfield.count=(state->m_playfield.count+1)%ARRAY_LENGTH(state->m_playfield.u.data);
	if (state->m_playfield.count==0) state->m_playfield.started=FALSE;
      }
    }

  } else if (signal && !state->m_playfield.signal) {
    attotime t=machine.time();
    state->m_playfield.low_time= t - state->m_playfield.time;
    state->m_playfield.time=t;
    state->m_playfield.started=TRUE;
  }
  state->m_playfield.signal=signal;
}
Exemple #17
0
ROM_END

/******************************************************************************/

static READ8_HANDLER( cycle_r )
{
	int pc=cpu_get_pc(space->cpu);
	int ret=actfancr_ram[0x26];

	if (offset==1) return actfancr_ram[0x27];

	if (pc==0xe29a && ret==0) {
		cpu_spinuntil_int(space->cpu);
		return 1;
	}

	return ret;
}
static READ16_HANDLER( supbtime_controls_r )
{
	switch (offset << 1)
	{
		case 0:
			return input_port_read(space->machine(), "INPUTS");
		case 2:
			return input_port_read(space->machine(), "DSW");
		case 8:
			return input_port_read(space->machine(), "COIN");
		case 10: /* ?  Not used for anything */
		case 12:
			return 0;
	}

	logerror("CPU #0 PC %06x: warning - read unmapped control address %06x\n", cpu_get_pc(&space->device()), offset);
	return ~0;
}
Exemple #19
0
ADDRESS_MAP_END


/***************************************************************************


                            Memory Maps - Sound CPU


***************************************************************************/

static WRITE8_HANDLER( fuuki16_sound_rombank_w )
{
	if (data <= 2)
		memory_set_bank(space->machine, "bank1", data);
	else
		logerror("CPU #1 - PC %04X: unknown bank bits: %02X\n", cpu_get_pc(space->cpu), data);
}
Exemple #20
0
ROM_END

/******************************************************************************/

static int cycle_r(int offset)
{
	int pc=cpu_get_pc();
	int ret=actfancr_ram[0x26];

	if (offset==1) return actfancr_ram[0x27];

	if (pc==0xe29a && ret==0) {
		cpu_spinuntil_int();
		return 1;
	}

	return ret;
}
Exemple #21
0
/***************************************************************************

  Game ROMs

***************************************************************************/


ROM_START( suratk )
	ROM_REGION( 0x51000, "maincpu", 0 ) /* code + banked roms + palette RAM */
	ROM_LOAD( "911j01.f5", 0x10000, 0x20000, CRC(1e647881) SHA1(241e421d5599ebd9fcfb8be9c48dfd3b4c671958) )
	ROM_LOAD( "911k02.h5", 0x30000, 0x18000, CRC(ef10e7b6) SHA1(0b41a929c0c579d688653a8d90dd6b40db12cfb3) )
	ROM_CONTINUE(           0x08000, 0x08000 )

	ROM_REGION( 0x080000, "gfx1", 0 ) /* graphics ( don't dispose as the program can read them, 0 ) */
	ROM_LOAD( "911d05.bin", 0x000000, 0x040000, CRC(308d2319) SHA1(521d2a72fecb094e2c2f23b535f0b527886b4d3a) ) /* characters */
	ROM_LOAD( "911d06.bin", 0x040000, 0x040000, CRC(91cc9b32) SHA1(e05b7bbff30f24fe6f009560410f5e90bb118692) ) /* characters */

	ROM_REGION( 0x080000, "gfx2", 0 ) /* graphics ( don't dispose as the program can read them, 0 ) */
	ROM_LOAD( "911d03.bin", 0x000000, 0x040000, CRC(e34ff182) SHA1(075ca7a91c843bdac7da21ddfcd43f7a043a09b6) )	/* sprites */
	ROM_LOAD( "911d04.bin", 0x040000, 0x040000, CRC(20700bd2) SHA1(a2fa4a3ee28c1542cdd798907a9ece249aadff0a) )	/* sprites */
ROM_END

ROM_START( suratka )
	ROM_REGION( 0x51000, "maincpu", 0 ) /* code + banked roms + palette RAM */
	ROM_LOAD( "911j01.f5", 0x10000, 0x20000, CRC(1e647881) SHA1(241e421d5599ebd9fcfb8be9c48dfd3b4c671958) )
	ROM_LOAD( "911l02.h5", 0x30000, 0x18000, CRC(11db8288) SHA1(09fe187855172ebf0c57f561cce7f41e47f53114) )
	ROM_CONTINUE(           0x08000, 0x08000 )

	ROM_REGION( 0x080000, "gfx1", 0 ) /* graphics ( don't dispose as the program can read them, 0 ) */
	ROM_LOAD( "911d05.bin", 0x000000, 0x040000, CRC(308d2319) SHA1(521d2a72fecb094e2c2f23b535f0b527886b4d3a) ) /* characters */
	ROM_LOAD( "911d06.bin", 0x040000, 0x040000, CRC(91cc9b32) SHA1(e05b7bbff30f24fe6f009560410f5e90bb118692) ) /* characters */

	ROM_REGION( 0x080000, "gfx2", 0 ) /* graphics ( don't dispose as the program can read them, 0 ) */
	ROM_LOAD( "911d03.bin", 0x000000, 0x040000, CRC(e34ff182) SHA1(075ca7a91c843bdac7da21ddfcd43f7a043a09b6) )	/* sprites */
	ROM_LOAD( "911d04.bin", 0x040000, 0x040000, CRC(20700bd2) SHA1(a2fa4a3ee28c1542cdd798907a9ece249aadff0a) )	/* sprites */
ROM_END

ROM_START( suratkj )
	ROM_REGION( 0x51000, "maincpu", 0 ) /* code + banked roms + palette RAM */
	ROM_LOAD( "911m01.f5", 0x10000, 0x20000, CRC(ee5b2cc8) SHA1(4b05f7ba4e804a3bccb41fe9d3258cbcfe5324aa) )
	ROM_LOAD( "911m02.h5", 0x30000, 0x18000, CRC(5d4148a8) SHA1(4fa5947db777b4c742775d588dea38758812a916) )
	ROM_CONTINUE(           0x08000, 0x08000 )

	ROM_REGION( 0x080000, "gfx1", 0 ) /* graphics ( don't dispose as the program can read them, 0 ) */
	ROM_LOAD( "911d05.bin", 0x000000, 0x040000, CRC(308d2319) SHA1(521d2a72fecb094e2c2f23b535f0b527886b4d3a) ) /* characters */
	ROM_LOAD( "911d06.bin", 0x040000, 0x040000, CRC(91cc9b32) SHA1(e05b7bbff30f24fe6f009560410f5e90bb118692) ) /* characters */

	ROM_REGION( 0x080000, "gfx2", 0 ) /* graphics ( don't dispose as the program can read them, 0 ) */
	ROM_LOAD( "911d03.bin", 0x000000, 0x040000, CRC(e34ff182) SHA1(075ca7a91c843bdac7da21ddfcd43f7a043a09b6) )	/* sprites */
	ROM_LOAD( "911d04.bin", 0x040000, 0x040000, CRC(20700bd2) SHA1(a2fa4a3ee28c1542cdd798907a9ece249aadff0a) )	/* sprites */
ROM_END

/***************************************************************************

  Game driver(s)

***************************************************************************/

static KONAMI_SETLINES_CALLBACK( surpratk_banking )
{
	UINT8 *RAM = memory_region(device->machine, "maincpu");
	int offs = 0;

logerror("%04x: setlines %02x\n",cpu_get_pc(device),lines);

	offs = 0x10000 + ((lines & 0x1f) * 0x2000);
	if (offs >= 0x48000) offs -= 0x40000;
	memory_set_bankptr(device->machine, 1,&RAM[offs]);
}
Exemple #22
0
/* read data port */
static int I8741_data_r(int num)
{
	I8741 *st = &taito8741[num];
	int ret = st->toData;
	st->status &= 0xfe;
#if __log__
	if(errorlog) fprintf(errorlog,"8741-%d DATA Read %02x PC=%04x\n",num,ret,cpu_get_pc());
#endif
	/* update chip */
	taito8741_update(num);

	switch( st->mode )
	{
	case TAITO8741_PORT: /* parallel data */
		taito8741_hostdata_w(st,st->portHandler ? st->portHandler(st->parallelselect) : 0);
		break;
	}
	return ret;
}
Exemple #23
0
static WRITE16_HANDLER( io_control_w )
{
	neogeo_state *state = space->machine().driver_data<neogeo_state>();
	switch (offset)
	{
	case 0x00: select_controller(space->machine(), data & 0x00ff); break;
	case 0x18: set_output_latch(space->machine(), data & 0x00ff); break;
	case 0x20: set_output_data(space->machine(), data & 0x00ff); break;
	case 0x28: upd4990a_control_16_w(state->m_upd4990a, 0, data, mem_mask); break;
//  case 0x30: break; // coin counters
//  case 0x31: break; // coin counters
//  case 0x32: break; // coin lockout
//  case 0x33: break; // coui lockout

	default:
		logerror("PC: %x  Unmapped I/O control write.  Offset: %x  Data: %x\n", cpu_get_pc(&space->device()), offset, data);
		break;
	}
}
Exemple #24
0
static READ16_HANDLER( unk880000_r )
{
	tecmosys_state *state = space->machine().driver_data<tecmosys_state>();
	//UINT16 ret = state->m_880000regs[offset];

	logerror( "unk880000_r( %06x ) @ %06x = %04x\n", (offset * 2 ) +0x880000, cpu_get_pc(&space->device()), state->m_880000regs[offset] );

	/* this code allows scroll regs to be updated, but tkdensho at least resets perodically */

	switch( offset )
	{
		case 0:
			if ( space->machine().primary_screen->vpos() >= 240) return 0;
			else return 1;

		default:
			return 0;
	}
}
Exemple #25
0
static WRITE8_HANDLER( spoker_magic_w )
{
	spoker_state *state = space->machine().driver_data<spoker_state>();

	state->m_igs_magic[offset] = data;

	if (offset == 0)
		return;

	switch(state->m_igs_magic[0])
	{
		case 0x01:
			break;

		default:
//          popmessage("magic %x <- %04x",igs_magic[0],data);
			logerror("%06x: warning, writing to igs_magic %02x = %02x\n", cpu_get_pc(&space->device()), state->m_igs_magic[0], data);
	}
}
Exemple #26
0
void digdug_customio_data_w(int offset,int data)
{
	customio[offset] = data;

if (errorlog) fprintf(errorlog,"%04x: custom IO offset %02x data %02x\n",cpu_get_pc(),offset,data);

	switch (customio_command)
	{
		case 0xc1:
			if (offset == 8)
			{
				leftcoinpercred = customio[2] & 0x0f;
				leftcredpercoin = customio[3] & 0x0f;
				rightcoinpercred = customio[4] & 0x0f;
				rightcredpercoin = customio[5] & 0x0f;
			}
			break;
	}
}
Exemple #27
0
static READ8_HANDLER( thunderx_bankedram_r )
{
	if (rambank & 0x01)
		return ram[offset];
	else if (rambank & 0x10)
	{
		if (pmcbank)
		{
//          logerror("%04x read pmcram %04x\n",cpu_get_pc(space->cpu),offset);
			return pmcram[offset];
		}
		else
		{
			logerror("%04x read pmc internal ram %04x\n",cpu_get_pc(space->cpu),offset);
			return 0;
		}
	}
	else
		return paletteram[offset];
}
Exemple #28
0
static WRITE8_HANDLER( jingbell_nmi_and_coins_w )
{
	if ((nmi_enable ^ data) & (~0xdd))
	{
		logerror("PC %06X: nmi_and_coins = %02x\n",cpu_get_pc(space->cpu),data);
//      popmessage("%02x",data);
	}

	coin_counter_w(0,		data & 0x01);	// coin_a
	coin_counter_w(1,		data & 0x04);	// coin_c
	coin_counter_w(2,		data & 0x08);	// key in
	coin_counter_w(3,		data & 0x10);	// coin out mech

	set_led_status(6,		data & 0x40);	// led for coin out / hopper active

	nmi_enable = data;	//  data & 0x80     // nmi enable?

	out[0] = data;
	show_out();
}
Exemple #29
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ADDRESS_MAP_END



/***************************************************************************
                                Sand Scorpion
***************************************************************************/

static WRITE8_HANDLER( sandscrp_bankswitch_w )
{
	UINT8 *RAM = memory_region(space->machine, "maincpu");
	int bank = data & 0x07;

	if ( bank != data )	logerror("CPU #1 - PC %04X: Bank %02X\n",cpu_get_pc(space->cpu),data);

	if (bank < 3)	RAM = &RAM[0x4000 * bank];
	else			RAM = &RAM[0x4000 * (bank-3) + 0x10000];

	memory_set_bankptr(space->machine, "bank1", RAM);
}
Exemple #30
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ADDRESS_MAP_END



/***************************************************************************
                                Sand Scorpion
***************************************************************************/

WRITE8_MEMBER(sandscrp_state::sandscrp_bankswitch_w)
{
	UINT8 *RAM = memregion("maincpu")->base();
	int bank = data & 0x07;

	if ( bank != data )	logerror("CPU #1 - PC %04X: Bank %02X\n",cpu_get_pc(&space.device()),data);

	if (bank < 3)	RAM = &RAM[0x4000 * bank];
	else			RAM = &RAM[0x4000 * (bank-3) + 0x10000];

	membank("bank1")->set_base(RAM);
}