/* load program into simulated state */ void sim_load_prog(char *fname, /* program to load */ int argc, char **argv, /* program arguments */ char **envp) /* program environment */ { /* load program text and data, set up environment, memory, and regs */ ld_load_prog(fname, argc, argv, envp, ®s, mem, TRUE); if (chkpt_nelt == 2) { char *errstr; /* generate a checkpoint */ if (!sim_eio_fd) fatal("checkpoints can only be generated while running an EIO trace"); #if 0 /* this should work fine... */ if (trace_fname != NULL) fatal("checkpoints cannot be generated with generating an EIO trace"); #endif /* parse the range */ errstr = range_parse_range(chkpt_opts[1], &chkpt_range); if (errstr) fatal("cannot parse pipetrace range, use: {<start>}:{<end>}"); /* create the checkpoint file */ chkpt_fname = chkpt_opts[0]; chkpt_fd = eio_create(chkpt_fname); /* indicate checkpointing is now active... */ chkpt_active = TRUE; } if (trace_fname != NULL) { fprintf(stderr, "sim: tracing execution to EIO file `%s'...\n", trace_fname); /* create an EIO trace file */ trace_fd = eio_create(trace_fname); } /* initialize the DLite debugger */ dlite_init(md_reg_obj, dlite_mem_obj, dlite_mstate_obj); }
/* start simulation, program loaded, processor precise state initialized */ void sim_main(void) { md_inst_t inst; register md_addr_t addr; enum md_opcode op; register bool_t is_write; enum md_fault_type fault; /* set up initial default next PC */ regs.regs_NPC = regs.regs_PC + sizeof(md_inst_t); /* check for DLite debugger entry condition */ if (dlite_check_break(regs.regs_PC, /* !access */0, /* addr */0, 0, 0)) dlite_main(regs.regs_PC - sizeof(md_inst_t), regs.regs_PC, sim_num_insn, ®s, mem); /* fast forward simulator loop, performs functional simulation for FASTFWD_COUNT insts, then turns on performance (timing) simulation */ if (fastfwd_count > 0) { int icount; fprintf(stderr, "sim: ** fast forwarding %d insts **\n", fastfwd_count); fastfwding = TRUE; for (icount=0; icount < fastfwd_count; icount++) { /* maintain $r0 semantics */ regs.regs_R[MD_REG_ZERO] = 0; #ifdef TARGET_ALPHA regs.regs_F.d[MD_REG_ZERO] = 0.0; #endif /* TARGET_ALPHA */ /* get the next instruction to execute */ MD_FETCH_INST(inst, mem, regs.regs_PC); /* set default reference address */ addr = 0; is_write = FALSE; /* set default fault - none */ fault = md_fault_none; /* decode the instruction */ MD_SET_OPCODE(op, inst); /* execute the instruction */ switch (op) { #define DEFINST(OP,MSK,NAME,OPFORM,RES,FLAGS,O1,O2,I1,I2,I3) \ case OP: \ SYMCAT(OP,_IMPL); \ break; #define DEFLINK(OP,MSK,NAME,MASK,SHIFT) \ case OP: \ panic("attempted to execute a linking opcode"); #define CONNECT(OP) #undef DECLARE_FAULT #define DECLARE_FAULT(FAULT) \ { fault = (FAULT); break; } #include "machine.def" default: panic("attempted to execute a bogus opcode"); } if (fault != md_fault_none) fatal("fault (%d) detected @ 0x%08p", fault, regs.regs_PC); /* update memory access stats */ if (MD_OP_FLAGS(op) & F_MEM) { if (MD_OP_FLAGS(op) & F_STORE) is_write = TRUE; } /* check for DLite debugger entry condition */ if (dlite_check_break(regs.regs_NPC, is_write ? ACCESS_WRITE : ACCESS_READ, addr, sim_num_insn, sim_num_insn)) dlite_main(regs.regs_PC, regs.regs_NPC, sim_num_insn, ®s, mem); /* go to the next instruction */ regs.regs_PC = regs.regs_NPC; regs.regs_NPC += sizeof(md_inst_t); } } fastfwding = FALSE; if (trace_fd != NULL) { fprintf(stderr, "sim: writing EIO file initial checkpoint...\n"); if (eio_write_chkpt(®s, mem, trace_fd) != -1) panic("checkpoint code is broken"); } fprintf(stderr, "sim: ** starting functional simulation **\n"); /* set up initial default next PC */ regs.regs_NPC = regs.regs_PC + sizeof(md_inst_t); while (TRUE) { /* maintain $r0 semantics */ regs.regs_R[MD_REG_ZERO] = 0; #ifdef TARGET_ALPHA regs.regs_F.d[MD_REG_ZERO] = 0.0; #endif /* TARGET_ALPHA */ /* check if checkpoint should be generated here... */ if (chkpt_kind == one_shot_chkpt && !range_cmp_range1(&chkpt_range, regs.regs_NPC, sim_num_insn, sim_num_insn)) { myfprintf(stderr, "sim: writing checkpoint file `%s' @ inst %n...\n", chkpt_fname, sim_num_insn); /* write the checkpoint file */ eio_write_chkpt(®s, mem, chkpt_fd); /* close the checkpoint file */ eio_close(chkpt_fd); /* exit jumps to the target set in main() */ longjmp(sim_exit_buf, /* exitcode + fudge */0+1); } else if (chkpt_kind == periodic_chkpt && sim_num_insn == next_chkpt_cycle) { char this_chkpt_fname[256]; /* 'chkpt_fname' should be a printf format string */ sprintf(this_chkpt_fname, chkpt_fname, chkpt_num); chkpt_fd = eio_create(this_chkpt_fname); myfprintf(stderr, "sim: writing checkpoint file `%s' @ inst %n...\n", this_chkpt_fname, sim_num_insn); /* write the checkpoint file */ eio_write_chkpt(®s, mem, chkpt_fd); /* close the checkpoint file */ eio_close(chkpt_fd); chkpt_num++; next_chkpt_cycle += per_chkpt_interval; } /* get the next instruction to execute */ MD_FETCH_INST(inst, mem, regs.regs_PC); /* keep an instruction count */ sim_num_insn++; /* set default reference address and access mode */ addr = 0; is_write = FALSE; /* set default fault - none */ fault = md_fault_none; /* decode the instruction */ MD_SET_OPCODE(op, inst); /* execute the instruction */ switch (op) { #define DEFINST(OP,MSK,NAME,OPFORM,RES,FLAGS,O1,O2,I1,I2,I3) \ case OP: \ SYMCAT(OP,_IMPL); \ break; #define DEFLINK(OP,MSK,NAME,MASK,SHIFT) \ case OP: \ panic("attempted to execute a linking opcode"); #define CONNECT(OP) #define DECLARE_FAULT(FAULT) \ { fault = (FAULT); break; } #include "machine.def" default: panic("bogus opcode"); } if (fault != md_fault_none) fatal("fault (%d) detected @ 0x%08p", fault, regs.regs_PC); if (MD_OP_FLAGS(op) & F_MEM) { sim_num_refs++; if (MD_OP_FLAGS(op) & F_STORE) is_write = TRUE; } /* check for DLite debugger entry condition */ if (dlite_check_break(regs.regs_NPC, is_write ? ACCESS_WRITE : ACCESS_READ, addr, sim_num_insn, sim_num_insn)) dlite_main(regs.regs_PC, regs.regs_NPC, sim_num_insn, ®s, mem); /* go to the next instruction */ regs.regs_PC = regs.regs_NPC; regs.regs_NPC += sizeof(md_inst_t); /* finish early? */ if (max_insts && sim_num_insn >= max_insts) return; } }
/* load program into simulated state */ void sim_load_prog(char *fname, /* program to load */ int argc, char **argv, /* program arguments */ char **envp) /* program environment */ { /* load program text and data, set up environment, memory, and regs */ ld_load_prog(fname, argc, argv, envp, ®s, mem, TRUE); if (chkpt_nelt == 2) { char *errstr; /* generate a checkpoint */ if (!sim_eio_fd) fatal("checkpoints can only be generated while running an EIO trace"); /* can't do regular & periodic chkpts at the same time */ if (per_chkpt_nelt != 0) fatal("can't do both regular and periodic checkpoints"); #if 0 /* this should work fine... */ if (trace_fname != NULL) fatal("checkpoints cannot be generated with generating an EIO trace"); #endif /* parse the range */ errstr = range_parse_range(chkpt_opts[1], &chkpt_range); if (errstr) fatal("cannot parse pipetrace range, use: {<start>}:{<end>}"); /* create the checkpoint file */ chkpt_fname = chkpt_opts[0]; chkpt_fd = eio_create(chkpt_fname); /* indicate checkpointing is now active... */ chkpt_kind = one_shot_chkpt; } if (per_chkpt_nelt == 2) { chkpt_fname = per_chkpt_opts[0]; if (strchr(chkpt_fname, '%') == NULL) fatal("periodic checkpoint filename must be printf-style format"); if (sscanf(per_chkpt_opts[1], "%Ld", &per_chkpt_interval) != 1) fatal("can't parse periodic checkpoint interval '%s'", per_chkpt_opts[1]); /* indicate checkpointing is now active... */ chkpt_kind = periodic_chkpt; chkpt_num = 1; next_chkpt_cycle = per_chkpt_interval; } if (trace_fname != NULL) { fprintf(stderr, "sim: tracing execution to EIO file `%s'...\n", trace_fname); /* create an EIO trace file */ trace_fd = eio_create(trace_fname); } /* initialize the DLite debugger */ dlite_init(md_reg_obj, dlite_mem_obj, dlite_mstate_obj); }