void fdt_fixup_liodn(void *blob) { #ifdef CONFIG_SYS_SRIO fdt_fixup_srio_liodn(blob, srio_liodn_tbl); #endif fdt_fixup_liodn_tbl(blob, liodn_tbl, liodn_tbl_sz); #ifdef CONFIG_SYS_DPAA_FMAN fdt_fixup_liodn_tbl(blob, fman1_liodn_tbl, fman1_liodn_tbl_sz); #if (CONFIG_SYS_NUM_FMAN == 2) fdt_fixup_liodn_tbl(blob, fman2_liodn_tbl, fman2_liodn_tbl_sz); #endif #endif fdt_fixup_liodn_tbl(blob, sec_liodn_tbl, sec_liodn_tbl_sz); #ifdef CONFIG_SYS_FSL_RAID_ENGINE fdt_fixup_liodn_tbl(blob, raide_liodn_tbl, raide_liodn_tbl_sz); #endif #ifdef CONFIG_SYS_DPAA_RMAN fdt_fixup_liodn_tbl(blob, rman_liodn_tbl, rman_liodn_tbl_sz); #endif ccsr_pcix_t *pcix = (ccsr_pcix_t *)CONFIG_SYS_PCIE1_ADDR; int pci_ver = pcix->ipver1 & 0xffff, liodn_base = 0; if (pci_ver >= 0x0204) { if (pci_ver >= 0x0300) liodn_base = 1024; else liodn_base = 256; } if (liodn_base) { char compat[32]; sprintf(compat, "fsl,qoriq-pcie-v%d.%d", (pci_ver & 0xff00) >> 8, pci_ver & 0xff); fdt_fixup_pci_liodn_offsets(blob, compat, liodn_base); fdt_fixup_pci_liodn_offsets(blob, "fsl,qoriq-pcie", liodn_base); } }
void fdt_fixup_liodn(void *blob) { fdt_fixup_srio_liodn(blob, srio_liodn_tbl); fdt_fixup_liodn_tbl(blob, liodn_tbl, liodn_tbl_sz); #ifdef CONFIG_SYS_DPAA_FMAN fdt_fixup_liodn_tbl(blob, fman1_liodn_tbl, fman1_liodn_tbl_sz); #if (CONFIG_SYS_NUM_FMAN == 2) fdt_fixup_liodn_tbl(blob, fman2_liodn_tbl, fman2_liodn_tbl_sz); #endif #endif fdt_fixup_liodn_tbl(blob, sec_liodn_tbl, sec_liodn_tbl_sz); #ifdef CONFIG_SYS_FSL_RAID_ENGINE fdt_fixup_liodn_tbl(blob, raide_liodn_tbl, raide_liodn_tbl_sz); #endif #ifdef CONFIG_SYS_DPAA_RMAN fdt_fixup_liodn_tbl(blob, rman_liodn_tbl, rman_liodn_tbl_sz); #endif fdt_fixup_pci_liodn_offsets(blob, "fsl,qoriq-pcie-v2.4"); }