void Encoder::setRange(unsigned long val, bool condition) {
if(mode == MODE_NOSET || mode == MODE_CAPTURE || mode == MODE_SSI) return;
if(val == 0L) return;
mcsif_Disable(mcn, mdn);
if(condition == true)
{
mcenc_SetCapMode(mcn, mdn, MCENC_CAP_PCNT_DISABLE + MCENC_CAP_EXTRIG_DISABLE + MCENC_CAP_IDXCOND_ENABLE); // start to use FIFO (mean that capture event will occur)
io_DisableINT();
_encmode[mcn] |= INTR_OVERFLOW;
_encmode[mcn] |= INTR_UNDERFLOW;
io_RestoreINT();
}
else
{
if((_encmode[mcn] & (INTR_INDEX | INTR_OVERFLOW | INTR_UNDERFLOW)) == 0 && condition == false)
mcenc_SetCapMode(mcn, mdn, MCENC_CAP_PCNT_DISABLE + MCENC_CAP_EXTRIG_DISABLE + MCENC_CAP_IDXCOND_DISABLE);
io_DisableINT();
_encmode[mcn] &= ~(INTR_OVERFLOW);
_encmode[mcn] &= ~(INTR_UNDERFLOW);
io_RestoreINT();
}
mcenc_SetCntMax(mcn, mdn, val);
mcsif_Enable(mcn, mdn);
}
DMPAPI(void*) pci_Find(unsigned short vid, unsigned short did) {
unsigned long pciid = ((unsigned long)did << 16) + (unsigned long)vid;
unsigned long tmpid, pciaddr;
unsigned char tmpht;
int bus, dev, fun;
if (pciid == 0xffffffffUL) return NULL;
for (bus=0; bus<256; bus++)
for (dev=0; dev<32; dev++)
for (fun=0; fun<8; fun++)
{
pciaddr = PCI_GET_CF8(bus, dev, fun);
io_DisableINT();
tmpid = pci_indw(pciaddr);
io_RestoreINT();
if (tmpid == pciid) return pci_Alloc((unsigned char)bus, (unsigned char)dev, (unsigned char)fun);
if (fun == 0)
{
if (tmpid == 0xffffffffUL) break; // invalid PCI device (note: shouldn't do this optimization for Vortex86DX2's internal PCI devices)
io_DisableINT();
tmpht = pci_inb(pciaddr + 0x0eL);
io_RestoreINT();
if ((tmpht & 0x80) == 0) break; // single-function PCI device
}
} // end for (fun=...
return NULL;
}
void Encoder::setIndexReset(bool condition) {
if(mode == MODE_NOSET || mode == MODE_CAPTURE || mode == MODE_SSI) return;
mcsif_Disable(mcn, mdn);
if(condition == true)
{
mcenc_SetResetMode(mcn, mdn, MCENC_RESET_INC_CNTMINIDX + MCENC_RESET_DEC_CNTMAXIDX);
if(_setZPol == false) // if you use setInputPolarity() to set Z pin's pol to inverse before setIndexReset()
{
// In fact, below actions are same as mcenc_SetIdxCond(mcn, mdn, MCENC_PDIR_IDXCOND_Z, MCENC_ICZ1);
if(mode == MODE_STEP_DIR || mode == MODE_STEP_DIR_x2)
mcenc_SetIdxCond(mcn, mdn, MCENC_PDIR_IDXCOND_Z, MCENC_ICZ1);
else if(mode == MODE_CWCCW || mode == MODE_CWCCW_x2)
mcenc_SetIdxCond(mcn, mdn, MCENC_CWCCW_IDXCOND_Z, MCENC_ICZ1);
else if(mode == MODE_AB_PHASE || mode == MODE_AB_PHASE_x2)
mcenc_SetIdxCond(mcn, mdn, MCENC_PAB_IDXCOND_Z, MCENC_ICZ1);
}
io_DisableINT();
_encmode[mcn] |= INTR_INDEX;
io_RestoreINT();
}
else
{
mcenc_SetIdxCond(mcn, mdn, MCENC_PDIR_IDXCOND_DISABLE, 0L);
mcenc_SetResetMode(mcn, mdn, MCENC_RESET_INC_CNTMIN + MCENC_RESET_DEC_CNTMAX);
io_DisableINT();
_encmode[mcn] &= ~(INTR_INDEX);
io_RestoreINT();
}
mcsif_Enable(mcn, mdn);
}
void Encoder::attachInterrupt(void (*callback)(int)) {
if(mode == MODE_NOSET) return;
if(mode == MODE_CAPTURE && callback != NULL)
{
if(_pcapfunc[mcn][0] != NULL || _pcapfunc[mcn][1] != NULL || _pcapfunc[mcn][2] != NULL) return;
if(interrupt_init(mcn) == false) return;
mcsif_Disable(mcn, mdn);
io_DisableINT();
_pcapfunc[mcn][0] = callback;
_pcapfunc[mcn][1] = callback;
_pcapfunc[mcn][2] = callback;
io_RestoreINT();
clear_INTSTATUS(mcn);
enable_MCINT(mcn, SIFB_CAP1INTBIT);
enable_MCINT(mcn, SIFB_CAP2INTBIT);
enable_MCINT(mcn, SIFB_CAP3INTBIT);
// Enable interrupt option
for(int i=0; i<3; i++)
{
sifIntMode[i](mcn, mdn, MCPFAU_CAP_BOTH_CLEAR);
sifSetInt[i](mcn, mdn, 1L);
}
mcsif_Enable(mcn, mdn);
_pcapAttchINT = true;
return;
}
if(callback != NULL)
{
if(_encfunc[mcn] != NULL) return;
if(interrupt_init(mcn) == false) return;
mcsif_Disable(mcn, mdn);
io_DisableINT();
_encfunc[mcn] = callback;
io_RestoreINT();
clear_INTSTATUS(mcn);
enable_MCINT(mcn, SIFB_TRIGRESETBIT);
enable_MCINT(mcn, SIFB_USEREVTBIT);
enable_MCINT(mcn, SIFB_PCNT_OV);
enable_MCINT(mcn, SIFB_PCNT_UV);
// Enable interrupt option
mcenc_SetCapInterval(mcn, mdn, 1L);
mcsif_Enable(mcn, mdn);
}
}
DMPAPI(void) uart_Close(void *vport)
{
unsigned char lcr;
SerialPort *port = (SerialPort *)vport;
if (port == NULL) { err_print((char*)"%s: port is null.\n", __FUNCTION__); return; }
if (port->InUse != 0)
{
// restore old IER & MCR
uart_IntDisable(vport);
io_DisableINT();
{
io_outpb(port->MCR, port->old_mcr);
}
io_RestoreINT();
irq_Close();
// restore old LSB & MSB
#ifdef _VORTEX86EXC_UART_WORKAROUND
/* To avoid Vortex86EX(D) write sync. issue. */
io_DisableINT();
{
lcr = io_inpb(port->LCR);
io_outpb(port->LCR, 0x80);
do {
io_outpb(port->DLLSB, port->old_lsb);
} while (io_inpb(port->DLLSB) != port->old_lsb);
do {
io_outpb(port->DLMSB, port->old_msb);
} while (io_inpb(port->DLMSB) != port->old_msb);
io_inpb(0x80); // do IO delay
io_outpb(port->LCR, lcr);
}
io_RestoreINT();
#else
_16550_DLAB_Out(port, port->DLLSB, port->old_lsb);
_16550_DLAB_Out(port, port->DLMSB, port->old_msb);
#endif
// restore old LCR & timeout
uart_SetFormat(vport, port->old_lcr);
uart_SetTimeOut(vport, port->old_TimeOut);
vx86_uart_Close(port->com);
if (io_Close() == false) err_print((char*)"Close IO lib error!!\n");
}
uart_Free(port);
}
void Encoder::_pabInit(int samplerate) {
_filterAndSampleWindowInit(mcn, mdn);
mcsif_SetMode(mcn, mdn, MCSIF_ENC_PAB);
_defaultEncoderSetting(mcn, mdn);
#if defined (DMP_DOS_BC) || (DMP_DOS_DJGPP)
io_DisableINT();
#elif defined (DMP_LINUX)
OSSPINLOCK(encvar);
#endif
if(samplerate == 1)
{
mcenc_SetCntMode(mcn, mdn, MCENC_PAB_DIR0_INCA + MCENC_PAB_DIR1_DECA);
_mcmode[mcn] = MODE_AB_PHASE;
}
else
{
mcenc_SetCntMode(mcn, mdn, MCENC_PAB_DIR0_INCAB + MCENC_PAB_DIR1_DECAB);
_mcmode[mcn] = MODE_AB_PHASE_x2;
}
#if defined (DMP_DOS_BC) || (DMP_DOS_DJGPP)
io_RestoreINT();
#elif defined (DMP_LINUX)
OSSPINUNLOCK(encvar);
#endif
}
void Encoder::_cwccwInit(int samplerate) {
_filterAndSampleWindowInit(mcn, mdn);
mcsif_SetMode(mcn, mdn, MCSIF_ENC_CWCCW);
_defaultEncoderSetting(mcn, mdn);
#if defined (DMP_DOS_BC) || (DMP_DOS_DJGPP)
io_DisableINT();
#elif defined (DMP_LINUX)
OSSPINLOCK(encvar);
#endif
if(samplerate == 1)
{
mcenc_SetCntMode(mcn, mdn, MCENC_CWCCW_CW_INC0TO1 + MCENC_CWCCW_CCW_DEC0TO1);
_mcmode[mcn] = MODE_CWCCW;
}
else
{
mcenc_SetCntMode(mcn, mdn, MCENC_CWCCW_CW_INCBOTH + MCENC_CWCCW_CCW_DECBOTH);
_mcmode[mcn] = MODE_CWCCW_x2;
}
#if defined (DMP_DOS_BC) || (DMP_DOS_DJGPP)
io_RestoreINT();
#elif defined (DMP_LINUX)
OSSPINUNLOCK(encvar);
#endif
}
void Encoder::_ssiInit(unsigned long bits, unsigned long clk, unsigned long wtime, bool gray2bin) {
_filterAndSampleWindowInit(mcn, mdn);
mcsif_SetMode(mcn, mdn, MCSIF_SSI);
if(clk == 0L) clk = 1000000L; // default value
if(wtime == 0L) wtime = 20L; // default value
if(bits > 32) bits = 32L; // default value
clk = ((100000000L)/(clk))/2L; // = ((1/clk)x1000000x100)/2
wtime = wtime * 100L;
if(wtime <= clk) return;
mcssi_SetClock(mcn, mdn, clk-1L);
mcssi_SetWaitTime(mcn, mdn, wtime-1L);
mcssi_SetLatchPhase(mcn, mdn, MCSSI_LATCH_PHASE0);
mcssi_SetLatchTime(mcn, mdn, 0L);
mcssi_SetNumberBITS(mcn, mdn, bits-1L);
mcssi_SetCntMode(mcn, mdn, MCSSI_CONTINUE);
if(gray2bin == true) mcssi_SetGAY2BINBit(mcn, mdn);
io_DisableINT();
_mcmode[mcn] = MODE_SSI;
io_RestoreINT();
}
DMPAPI(void) pinMode(uint8_t pin, uint8_t mode) {
int crossbar_bit;
if(pin >= PINS || PIN86[pin].gpN == NOUSED) return;
crossbar_bit = PIN86[pin].gpN;
io_DisableINT();
if (mode == INPUT)
{
io_outpb(CROSSBARBASE + 0x30 + crossbar_bit, TRI_STATE);
io_outpb(GPIODIRBASE + 4*(crossbar_bit/8), io_inpb(GPIODIRBASE + 4*(crossbar_bit/8))&~(1<<(crossbar_bit%8)));
}
else if(mode == INPUT_PULLDOWN)
{
io_outpb(CROSSBARBASE + 0x30 + crossbar_bit, PULL_DOWN);
io_outpb(GPIODIRBASE + 4*(crossbar_bit/8), io_inpb(GPIODIRBASE + 4*(crossbar_bit/8))&~(1<<(crossbar_bit%8)));
}
else if (mode == INPUT_PULLUP)
{
io_outpb(CROSSBARBASE + 0x30 + crossbar_bit, PULL_UP);
io_outpb(GPIODIRBASE + 4*(crossbar_bit/8), io_inpb(GPIODIRBASE + 4*(crossbar_bit/8))&~(1<<(crossbar_bit%8)));
}
else
io_outpb(GPIODIRBASE + 4*(crossbar_bit/8), io_inpb(GPIODIRBASE + 4*(crossbar_bit/8))|(1<<(crossbar_bit%8)));
io_RestoreINT();
}
DMPAPI(int) digitalRead(uint8_t pin) {
int crossbar_bit, val;
if(pin >= PINS || PIN86[pin].gpN == NOUSED) return LOW;
crossbar_bit = PIN86[pin].gpN;
#if defined (DMP_DOS_BC) || defined (DMP_DOS_DJGPP) || defined (DMP_DOS_WATCOM)
if(pin == 32) timer1_pin32_isUsed = true;
#endif
io_DisableINT();
if(crossbar_bit > 31)
io_outpb(CROSSBARBASE + 0x80 + (crossbar_bit/8), 0x01);
else if(crossbar_bit <= 31 && io_inpb(CROSSBARBASE + 0x90 + crossbar_bit) != 0x01)
{
io_outpb(CROSSBARBASE + 0x90 + crossbar_bit, 0x01);
Close_Pwm(pin);
}
val = io_inpb(GPIODATABASE + 4*(crossbar_bit/8))&(1<<(crossbar_bit%8));
io_RestoreINT();
if(val != 0) return HIGH;
return LOW;
}
DMPAPI(void) pci_Out8(void* handle, unsigned char offset, unsigned char val) {
PCI_BASE_t* base = (PCI_BASE_t*)handle;
io_DisableINT();
pci_outb(base->addr + (unsigned long)offset, val);
io_RestoreINT();
}
size_t GSM3SoftSerial::finalWrite(uint8_t c)
{
if(hwcomIsUsed == true) return HWSerial[hwcomport]->write(c);
io_DisableINT();
// Write the start bit
tx_pin_write(LOW);
tunedDelay(_tx_delay);
// Write each of the 8 bits
for (byte mask = 0x01; mask; mask <<= 1)
{
if (c & mask) // choose bit
tx_pin_write(HIGH); // send 1
else
tx_pin_write(LOW); // send 0
tunedDelay(_tx_delay);
}
tx_pin_write(HIGH); // restore pin to natural state
io_RestoreINT();
tunedDelay(_tx_delay);
return 1;
}
DMPAPI(unsigned int) usb_Read(void *vusb)
{
BYTE val;
DWORD pretime;
USB_Device *usb = (USB_Device *)vusb;
if (usb == NULL) { err_print((char*)"%s: USB device is null.\n", __FUNCTION__); return 0xffff; }
if (usb->TimeOut != USB_NO_TIMEOUT) {
pretime = timer_nowtime();
while (usb->rcvd->count <= 0 && (timer_nowtime() - pretime) < usb->TimeOut);
if (usb->rcvd->count <= 0) {
if (USB_TIMEOUT_DEBUG)
err_print((char*)"%s: USB device receive timeout.\n", __FUNCTION__);
return (unsigned int)0xffff;
}
}
else while (usb->rcvd->count <= 0);
io_DisableINT();
{
val = (BYTE)PopQueue(usb->rcvd);
}
io_RestoreINT();
if (!(io_inpdw(usb->EP[2].OutDLR) & 0x80000000L) && usb->rcvd->count < (usb->rcvd->size - NEAR_FULL_SIZE))
SetEPnDLR(usb, EP2, OUT, ENABLE | EP2_MAX_PACKET_SIZE_OUT);
return (unsigned int)val;
}
static int _send_int(SerialPort *port, unsigned char* buf, int bsize)
{
int i;
unsigned long pretime;
for (i = 0; i < bsize; i++)
{
if (port->TxTimeOut < 0) {
while (QueueFull(port->xmit));
} else {
pretime = timer_NowTime();
while (QueueFull(port->xmit) && (timer_NowTime() - pretime) < port->TxTimeOut);
if (QueueFull(port->xmit)) {
if (UART_TIMEOUT_DEBUG)
err_print((char*)"%s: COM%d transmit timeout.\n", __FUNCTION__, port->com + 1);
if (!(port->ier & THREI)) io_outpb(port->IER, port->ier |= THREI);
return i;
}
}
io_DisableINT();
{
PushQueue(port->xmit, buf[i]);
if (!(port->ier & THREI) && (i == (bsize - 1) || QueueFull(port->xmit)))
{
switch (port->control)
{
case NO_CONTROL:
{
io_outpb(port->IER, port->ier |= THREI);
}
break;
case RTS_CTS:
{
if (port->cts == CTS_ON) {
io_outpb(port->IER, port->ier |= THREI);
}
}
break;
case XON_XOFF:
{
if (port->xonxoff_rcvd != XOFF_RCVD) {
io_outpb(port->IER, port->ier |= THREI);
}
}
break;
default: break;
};
}
}
io_RestoreINT();
}
return i;
}
DMPAPI(void) digitalWrite(uint8_t pin, uint8_t val) {
unsigned int port;
unsigned int value;
int crossbar_bit;
if(pin >= PINS || PIN86[pin].gpN == NOUSED) return;
#if defined (DMP_DOS_BC) || defined (DMP_DOS_DJGPP) || defined (DMP_DOS_WATCOM)
if(pin == 32) timer1_pin32_isUsed = true;
#endif
crossbar_bit = PIN86[pin].gpN;
port = GPIODATABASE + 4*(crossbar_bit/8);
value = 1<<(crossbar_bit%8);
io_DisableINT();
if(crossbar_bit > 31)
io_outpb(CROSSBARBASE + 0x80 + (crossbar_bit/8), 0x01);
else if(crossbar_bit <= 31 && io_inpb(CROSSBARBASE + 0x90 + crossbar_bit) != 0x01)
{
io_outpb(CROSSBARBASE + 0x90 + crossbar_bit, 0x01);
Close_Pwm(pin);
}
if (val == LOW)
io_outpb(port, io_inpb(port)&(~value));
else
io_outpb(port, io_inpb(port)|value);
io_RestoreINT();
}
DMP_INLINE(void) can_RoundRobin(CAN_Bus *can)
{
CANFrame temp;
if (QueueEmpty(can->xmit))
return;
io_DisableINT();
if (!(io_In32(can->ioHandle, can->REQ) & (0x01L << (can->round*2))))
{
PopBufQueue(can->xmit, (void*)&temp);
io_Out32(can->ioHandle, can->TX[can->round].TYPE , (unsigned long)temp.type | ((unsigned long)temp.length << 4));
io_Out32(can->ioHandle, can->TX[can->round].IDR , temp.identifier);
io_Out32(can->ioHandle, can->TX[can->round].DATAL, temp.Data.dword[0]);
io_Out32(can->ioHandle, can->TX[can->round].DATAH, temp.Data.dword[1]);
io_Out32(can->ioHandle, can->REQ, io_In32(can->ioHandle, can->REQ) | (0x01UL << (can->round*2)));
can->round++;
if (can->round == 3)
can->round = 0;
}
io_RestoreINT();
}
void detachInterrupt(uint8_t interruptNum) {
int i;
mc = interruptNum/3;
if(interruptNum >= EXTERNAL_NUM_INTERRUPTS) return;
if(_userfunc[interruptNum] == NULL) return;
mcsif_Disable(mc, md);
sifIntMode[interruptNum%3](mc, md, MCPFAU_CAP_DISABLE);
io_DisableINT();
_userfunc[interruptNum] = NULL;
io_RestoreINT();
for(i=0; i<3; i++)
if(_userfunc[mc*3+i] != NULL) break;
if(i == 3) mcmsif_close(); else mcsif_Enable(mc, md);
for(i=0; i<EXTERNAL_NUM_INTERRUPTS; i++)
if(_userfunc[i] != NULL) break;
if(i == EXTERNAL_NUM_INTERRUPTS)
{
if(irq_UninstallISR(used_irq, (void*)name) == false)
printf("irq_install fail\n");
else
used_irq = 0xff;
}
}
int GSM3SoftSerial::begin(long speed)
{
_rx_delay_centering = _rx_delay_intrabit = _rx_delay_stopbit = _tx_delay = 0;
setTX();
setRX();
for (unsigned i=0; i<sizeof(table)/sizeof(table[0]); ++i)
{
long baud = pgm_read_dword(&table[i].baud);
if (baud == speed)
{
_rx_delay_centering = pgm_read_word(&table[i].rx_delay_centering);
_rx_delay_intrabit = pgm_read_word(&table[i].rx_delay_intrabit);
_rx_delay_stopbit = pgm_read_word(&table[i].rx_delay_stopbit);
_tx_delay = pgm_read_word(&table[i].tx_delay);
break;
}
}
// Set up RX interrupts, but only if we have a valid RX baud rate
/*
if (_rx_delay_stopbit)
{
pinMode(__RXPIN__, INPUT_PULLUP);
tunedDelay(_tx_delay); // if we were low this establishes the end
}
*/
io_DisableINT();
io_outpb(CROSSBARBASE + 0x90 + PIN86[__RXPIN__].gpN, 0x08);
_activeObject = this;
io_RestoreINT();
}
DMPAPI(void) pci_Out16(void* handle, unsigned char offset, unsigned short val) {
PCI_BASE_t* base = (PCI_BASE_t*)handle;
io_DisableINT();
//pci_outw(base->addr + (unsigned long)(offset & 0xfe), val);
pci_outw(base->addr + (unsigned long)offset, val); // assume offset % 4 < 3
io_RestoreINT();
}
DMP_INLINE(unsigned char) inpb_cmos(unsigned char reg) {
unsigned char tmp;
io_DisableINT();
io_outpb(0x70, 0x80 | reg); // disable NMI (by setting the 0x80 bit) and assign a RTC register address
tmp = io_inpb(0x71);
io_RestoreINT();
return tmp;
}
DMPAPI(void) pci_Out32(void* handle, unsigned char offset, unsigned long val) {
PCI_BASE_t* base = (PCI_BASE_t*)handle;
io_DisableINT();
//pci_outdw(base->addr + (unsigned long)(offset & 0xfc), val);
pci_outdw(base->addr + (unsigned long)offset, val); // assume offset % 4 == 0
io_RestoreINT();
}
static void write_cmos(unsigned char address, unsigned char buf)
{
if(address >= EEPROMSIZE_BANK0) // 0~199
return ;
#if (defined(DMP_DOS_BC) || defined(DMP_DOS_DJGPP) || defined(DMP_DOS_WATCOM))
io_DisableINT();
#elif defined (DMP_LINUX)
lockCMOS();
#endif
void *pciDev = NULL;
pciDev = pci_Alloc(0x00, 0x07, 0x00);
if(pciDev == NULL)
{
#if (defined(DMP_DOS_BC) || defined(DMP_DOS_DJGPP) || defined(DMP_DOS_WATCOM))
Serial.print("CMOS device doesn't exist\n");
#elif (defined(DMP_LINUX))
printf("CMOS device doesn't exist\n");
#endif
return;
}
unsigned long int reg;
reg = pci_In32(pciDev, 0xc0);
if(address == 20 || address == 22) //special case
{
//Set bit 3 to access high 128 bytes RTC SRAM
pci_Out32(pciDev, 0xc0, reg | 0x00000008);
address = (address == 20)? 26:27;
io_outpb(0x70, address);
}
else if(address < 100) // 0~99 low page
{
//clear bit 3 to access low 128 bytes RTC SRAM
pci_Out32(pciDev, 0xc0, reg & 0xfffffff7);
io_outpb(0x70, address + 28);
}
else// 100~199 high page
{
//Set bit 3 to access high 128 bytes RTC SRAM
pci_Out32(pciDev, 0xc0, reg | 0x00000008);
address -= 100;
io_outpb(0x70, address + 28);
}
io_outpb(0x71, buf);
// Restore old register value
pci_Out32(pciDev, 0xc0, reg);
pci_Free(pciDev);
#if (defined(DMP_DOS_BC) || defined(DMP_DOS_DJGPP) || defined(DMP_DOS_WATCOM))
io_RestoreINT();
#elif defined (DMP_LINUX)
unLockCMOS();
#endif
}
void SoftwareSerial::flush()
{
if (!isListening())
return;
io_DisableINT();
_receive_buffer_head = _receive_buffer_tail = 0;
io_RestoreINT();
}
void Encoder::end() {
int i, j;
#if defined (DMP_DOS_BC) || (DMP_DOS_DJGPP)
detachInterrupt();
io_DisableINT();
if(mode == MODE_NOSET) return;
#elif defined (DMP_LINUX)
lockMCMSIF();
if(mode == MODE_NOSET) {unLockMCMSIF(); return;}
#endif
mcsif_Disable(mcn, mdn);
#if defined (DMP_DOS_BC) || (DMP_DOS_DJGPP)
if(mode == MODE_CAPTURE)
{
disable_MCINT(mcn, SIFB_CAP1INTBIT);
disable_MCINT(mcn, SIFB_CAP2INTBIT);
disable_MCINT(mcn, SIFB_CAP3INTBIT);
}
else
{
disable_MCINT(mcn, SIFB_TRIGRESETBIT);
disable_MCINT(mcn, SIFB_USEREVTBIT);
}
#endif
mode = _mcmode[mcn] = MODE_NOSET;
_setZPol = false;
_dir = 0;
#if defined (DMP_DOS_BC) || (DMP_DOS_DJGPP)
io_RestoreINT();
#elif defined (DMP_LINUX)
unLockMCMSIF();
#endif
for(i=0; i<4; i++)
{
if(_encfunc[i] != NULL) break;
for(j=0; j<3; j++)
if(_pcapfunc[i][j] != NULL) break;
}
#if defined (DMP_DOS_BC) || (DMP_DOS_DJGPP)
if(i == 4 && j == 3)
{
mc_outp(MC_GENERAL, 0x38, mc_inp(MC_GENERAL, 0x38) | (1L << mcn));
if(used_irq == 0xff) return;
if(irq_UninstallISR(used_irq, (void*)name) == false)
printf("irq_uninstall fail\n");
else
used_irq = 0xff;
}
#endif
}
void GSM3CircularBuffer::flush()
{
if(hwcomIsUsed == true)
{
io_DisableINT();
while(HWSerial[hwcomport]->available() > 0) HWSerial[hwcomport]->read();
io_RestoreINT();
}
head=tail;
}
DMPAPI(void) ClearQueue(Queue *queue)
{
if (queue == NULL)
return;
io_DisableINT();
queue->head = 0;
queue->tail = 0;
io_RestoreINT();
}
DMPAPI(void) usb_FlushTxQueue(void *vusb)
{
USB_Device *usb = (USB_Device *)vusb;
if (usb == NULL) { err_print((char*)"%s: USB device is null.\n", __FUNCTION__); return; }
io_DisableINT();
{
ClearQueue(usb->xmit);
}
io_RestoreINT();
}
DMPAPI(unsigned char) pci_In8(void* handle, unsigned char offset) {
PCI_BASE_t* base = (PCI_BASE_t*)handle;
unsigned char tmp;
io_DisableINT();
tmp = pci_inb(base->addr + (unsigned long)offset);
io_RestoreINT();
return tmp;
}
static void _setAlarm(uint32_t at) {
time_t t = at;
struct tm* tms = gmtime(&t);
io_DisableINT();
outpb_cmos(0x05, ((tms->tm_hour/10)<<4)+(tms->tm_hour%10));
outpb_cmos(0x03, ((tms->tm_min/10)<<4)+(tms->tm_min%10));
outpb_cmos(0x01, ((tms->tm_sec/10)<<4)+(tms->tm_sec%10));
io_RestoreINT();
}
// only for COMPAREMATCH and INDEXRESET condition
void Encoder::detachInterrupt() {
int i;
if(mode == MODE_CAPTURE)
{
if(_pcapfunc[mcn][0] == NULL || _pcapfunc[mcn][1] == NULL || _pcapfunc[mcn][2] == NULL) return;
mcsif_Disable(mcn, mdn);
// Disable interrupt option
for(int i=0; i<3; i++)
{
sifIntMode[i](mcn, mdn, MCPFAU_CAP_DISABLE);
sifSetInt[i](mcn, mdn, 0L);
}
io_DisableINT();
_pcapfunc[mcn][0] = NULL;
_pcapfunc[mcn][1] = NULL;
_pcapfunc[mcn][2] = NULL;
io_RestoreINT();
_pcapAttchINT = false;
// not enable sif
return;
}
if(_encfunc[mcn] == NULL) return;
mcsif_Disable(mcn, mdn);
// Disable interrupt option
mcenc_SetCapInterval(mcn, mdn, 0L);
io_DisableINT();
_encfunc[mcn] = NULL;
_encmode[mcn] &= ~(INTR_COMPARE);
_encmode[mcn] &= ~(INTR_INDEX);
io_RestoreINT();
// re-enable sif
mcsif_Enable(mcn, mdn);
}