Exemple #1
18
static int start_aps(int ap_count, atomic_t *num_aps)
{
	int sipi_vector;
	/* Max location is 4KiB below 1MiB */
	const int max_vector_loc = ((1 << 20) - (1 << 12)) >> 12;

	if (ap_count == 0)
		return 0;

	/* The vector is sent as a 4k aligned address in one byte */
	sipi_vector = AP_DEFAULT_BASE >> 12;

	if (sipi_vector > max_vector_loc) {
		printf("SIPI vector too large! 0x%08x\n",
		       sipi_vector);
		return -1;
	}

	debug("Attempting to start %d APs\n", ap_count);

	if (apic_wait_timeout(1000, "ICR not to be busy"))
		return -ETIMEDOUT;

	/* Send INIT IPI to all but self */
	lapic_write(LAPIC_ICR2, SET_LAPIC_DEST_FIELD(0));
	lapic_write(LAPIC_ICR, LAPIC_DEST_ALLBUT | LAPIC_INT_ASSERT |
		    LAPIC_DM_INIT);
	debug("Waiting for 10ms after sending INIT\n");
	mdelay(10);

	/* Send 1st SIPI */
	if (apic_wait_timeout(1000, "ICR not to be busy"))
		return -ETIMEDOUT;

	lapic_write(LAPIC_ICR2, SET_LAPIC_DEST_FIELD(0));
	lapic_write(LAPIC_ICR, LAPIC_DEST_ALLBUT | LAPIC_INT_ASSERT |
		    LAPIC_DM_STARTUP | sipi_vector);
	if (apic_wait_timeout(10000, "first SIPI to complete"))
		return -ETIMEDOUT;

	/* Wait for CPUs to check in up to 200 us */
	wait_for_aps(num_aps, ap_count, 200, 15);

	/* Send 2nd SIPI */
	if (apic_wait_timeout(1000, "ICR not to be busy"))
		return -ETIMEDOUT;

	lapic_write(LAPIC_ICR2, SET_LAPIC_DEST_FIELD(0));
	lapic_write(LAPIC_ICR, LAPIC_DEST_ALLBUT | LAPIC_INT_ASSERT |
		    LAPIC_DM_STARTUP | sipi_vector);
	if (apic_wait_timeout(10000, "second SIPI to complete"))
		return -ETIMEDOUT;

	/* Wait for CPUs to check in */
	if (wait_for_aps(num_aps, ap_count, 10000, 50)) {
		debug("Not all APs checked in: %d/%d\n",
		      atomic_read(num_aps), ap_count);
		return -1;
	}

	return 0;
}
static int __devinit solo_pci_probe(struct pci_dev *pdev,
				    const struct pci_device_id *id)
{
	struct solo_dev *solo_dev;
	int ret;
	int sdram;
	u8 chip_id;
	u32 reg;

	solo_dev = kzalloc(sizeof(*solo_dev), GFP_KERNEL);
	if (solo_dev == NULL)
		return -ENOMEM;

	solo_dev->pdev = pdev;
	spin_lock_init(&solo_dev->reg_io_lock);
	pci_set_drvdata(pdev, solo_dev);

	ret = pci_enable_device(pdev);
	if (ret)
		goto fail_probe;

	pci_set_master(pdev);

	ret = pci_request_regions(pdev, SOLO6X10_NAME);
	if (ret)
		goto fail_probe;

	solo_dev->reg_base = pci_ioremap_bar(pdev, 0);
	if (solo_dev->reg_base == NULL) {
		ret = -ENOMEM;
		goto fail_probe;
	}

	chip_id = solo_reg_read(solo_dev, SOLO_CHIP_OPTION) &
					SOLO_CHIP_ID_MASK;
	switch (chip_id) {
	case 7:
		solo_dev->nr_chans = 16;
		solo_dev->nr_ext = 5;
		break;
	case 6:
		solo_dev->nr_chans = 8;
		solo_dev->nr_ext = 2;
		break;
	default:
		dev_warn(&pdev->dev, "Invalid chip_id 0x%02x, "
			 "defaulting to 4 channels\n",
			 chip_id);
	case 5:
		solo_dev->nr_chans = 4;
		solo_dev->nr_ext = 1;
	}

	solo_dev->flags = id->driver_data;

	/* Disable all interrupts to start */
	solo_irq_off(solo_dev, ~0);

	reg = SOLO_SYS_CFG_SDRAM64BIT;
	/* Initial global settings */
	if (!(solo_dev->flags & FLAGS_6110))
		reg |= SOLO6010_SYS_CFG_INPUTDIV(25) |
			SOLO6010_SYS_CFG_FEEDBACKDIV((SOLO_CLOCK_MHZ * 2) - 2) |
			SOLO6010_SYS_CFG_OUTDIV(3);
	solo_reg_write(solo_dev, SOLO_SYS_CFG, reg);

	if (solo_dev->flags & FLAGS_6110) {
		u32 sys_clock_MHz = SOLO_CLOCK_MHZ;
		u32 pll_DIVQ;
		u32 pll_DIVF;

		if (sys_clock_MHz < 125) {
			pll_DIVQ = 3;
			pll_DIVF = (sys_clock_MHz * 4) / 3;
		} else {
			pll_DIVQ = 2;
			pll_DIVF = (sys_clock_MHz * 2) / 3;
		}

		solo_reg_write(solo_dev, SOLO6110_PLL_CONFIG,
			       SOLO6110_PLL_RANGE_5_10MHZ |
			       SOLO6110_PLL_DIVR(9) |
			       SOLO6110_PLL_DIVQ_EXP(pll_DIVQ) |
			       SOLO6110_PLL_DIVF(pll_DIVF) | SOLO6110_PLL_FSEN);
		mdelay(1);      /* PLL Locking time (1ms) */

		solo_reg_write(solo_dev, SOLO_DMA_CTRL1, 3 << 8); /* ? */
	} else
		solo_reg_write(solo_dev, SOLO_DMA_CTRL1, 1 << 8); /* ? */

	solo_reg_write(solo_dev, SOLO_TIMER_CLOCK_NUM, SOLO_CLOCK_MHZ - 1);

	/* PLL locking time of 1ms */
	mdelay(1);

	ret = request_irq(pdev->irq, solo_isr, IRQF_SHARED, SOLO6X10_NAME,
			  solo_dev);
	if (ret)
		goto fail_probe;

	/* Handle this from the start */
	solo_irq_on(solo_dev, SOLO_IRQ_PCI_ERR);

	ret = solo_i2c_init(solo_dev);
	if (ret)
		goto fail_probe;

	/* Setup the DMA engine */
	sdram = (solo_dev->nr_chans >= 8) ? 2 : 1;
	solo_reg_write(solo_dev, SOLO_DMA_CTRL,
		       SOLO_DMA_CTRL_REFRESH_CYCLE(1) |
		       SOLO_DMA_CTRL_SDRAM_SIZE(sdram) |
		       SOLO_DMA_CTRL_SDRAM_CLK_INVERT |
		       SOLO_DMA_CTRL_READ_CLK_SELECT |
		       SOLO_DMA_CTRL_LATENCY(1));

	ret = solo_p2m_init(solo_dev);
	if (ret)
		goto fail_probe;

	ret = solo_disp_init(solo_dev);
	if (ret)
		goto fail_probe;

	ret = solo_gpio_init(solo_dev);
	if (ret)
		goto fail_probe;

	ret = solo_tw28_init(solo_dev);
	if (ret)
		goto fail_probe;

	ret = solo_v4l2_init(solo_dev);
	if (ret)
		goto fail_probe;

	ret = solo_enc_init(solo_dev);
	if (ret)
		goto fail_probe;

	ret = solo_enc_v4l2_init(solo_dev);
	if (ret)
		goto fail_probe;

	ret = solo_g723_init(solo_dev);
	if (ret)
		goto fail_probe;

	return 0;

fail_probe:
	free_solo_dev(solo_dev);
	return ret;
}
static int ijb_vzw_bluetooth_power(int on)
{
    int ret, pin;

    printk(KERN_ERR"[LG_BTUI] %s power : %d ", __func__, on);

    if(on)
    {

        if(configure_uart_gpios(1))
        {
            printk(KERN_ERR"bluetooth_power on fail");
            return -EIO;
        }

        if(configure_pcm_gpios(1))
        {
            printk(KERN_ERR "bluetooth_power on fail");
            return -EIO;
        }

        for (pin = 0; pin < ARRAY_SIZE(bt_config_power_on); pin++)
        {
            ret = gpio_tlmm_config(bt_config_power_on[pin],GPIO_CFG_ENABLE);
            if (ret)
            {
                printk(KERN_ERR "%s: gpio_tlmm_config(%#x)=fg%d\n",__func__, bt_config_power_on[pin], ret);
                return -EIO;
            }

            gpio_direction_output(BT_RESET_N, 0);
            mdelay(100);
            gpio_direction_output(BT_RESET_N, 1);
            mdelay(100);
        }
    }
    else
    {
        gpio_direction_output(BT_RESET_N,0);

        if(configure_uart_gpios(0))
        {
            printk(KERN_ERR"bluetooth_power on fail");
            return -EIO;
        }

        if(configure_pcm_gpios(0))
        {
            printk(KERN_ERR "bluetooth_power on fail");
            return -EIO;
        }

        for (pin = 0; pin < ARRAY_SIZE(bt_config_power_off); pin++)
        {
            ret = gpio_tlmm_config(bt_config_power_off[pin],GPIO_CFG_ENABLE);
            if (ret)
            {
                printk(KERN_ERR "%s: gpio_tlmm_config(%#x)=%d\n",__func__, bt_config_power_off[pin], ret);
                return -EIO;
            }
        }
    }
    return 0;
}
Exemple #4
0
static void gp2a_work_func_prox(struct work_struct *work)
{
	struct gp2a_data *gp2a = container_of(work, struct gp2a_data, work_prox);
	
	unsigned char value;
	unsigned char int_val=REGS_PROX;
	unsigned char vout=0;

	/* Read VO & INT Clear */
	
	gprintk("[PROXIMITY] %s : \n",__func__);

	if(INT_CLEAR)
	{
		//int_val = REGS_PROX | (1 <<7);
	}
	opt_i2c_read((u8)(int_val),&value,1);
	vout = value & 0x01;
	printk(KERN_INFO "[PROXIMITY] value = %d \n",vout);



	/* Report proximity information */
	proximity_value = vout;


#if defined(CONFIG_MACH_VASTO)
 	wake_lock_timeout(&prx_wake_lock,HZ*3);
 	printk(KERN_INFO "[PROXIMITY] wake_lock_timeout : HZ*3 \n"); 
#else
	if(proximity_value ==0)
	{
		timeB = ktime_get();
		
		timeSub = ktime_sub(timeB,timeA);
		printk(KERN_INFO "[PROXIMITY] timeSub sec = %d, timeSub nsec = %d \n",timeSub.tv.sec,timeSub.tv.nsec);
		
		if (timeSub.tv.sec>=3 )
		{
		    wake_lock_timeout(&prx_wake_lock,HZ/2);
			printk(KERN_INFO "[PROXIMITY] wake_lock_timeout : HZ/2 \n");
		}
		else
			printk(KERN_INFO "[PROXIMITY] wake_lock is already set \n");

	}
#endif
	if(USE_INPUT_DEVICE)
	{
		input_report_abs(gp2a->input_dev,ABS_DISTANCE,(int)vout);
		input_sync(gp2a->input_dev);
		mdelay(1);
	}

	/* Write HYS Register */

	if(!vout)
	{
		value = 0x40;


	}
	else
	{
		value = 0x20;

	}
	
	opt_i2c_write((u8)(REGS_HYS),&value);

	/* Forcing vout terminal to go high */

	value = 0x18;
	opt_i2c_write((u8)(REGS_CON),&value);


	/* enable INT */

	enable_irq(gp2a->irq);

	/* enabling VOUT terminal in nomal operation */

	value = 0x00;

	opt_i2c_write((u8)(REGS_CON),&value);

}
Exemple #5
0
/*
 * Charging Control while suspended
 * Return 1 - go straight to sleep
 * Return 0 - sleep or wakeup depending on other factors
 */
static int sharpsl_off_charge_battery(void)
{
	int time;

	dev_dbg(sharpsl_pm.dev, "Charge Mode: %d\n", sharpsl_pm.charge_mode);

	if (sharpsl_pm.charge_mode == CHRG_OFF) {
		dev_dbg(sharpsl_pm.dev, "Offline Charger: Step 1\n");

		/* AC Check */
		if ((sharpsl_ac_check() < 0) || (sharpsl_check_battery_temp() < 0))
			return sharpsl_off_charge_error();

		/* Start Charging */
		sharpsl_pm_led(SHARPSL_LED_ON);
		sharpsl_pm.machinfo->charge(0);
		mdelay(SHARPSL_CHARGE_WAIT_TIME);
		sharpsl_pm.machinfo->charge(1);

		sharpsl_pm.charge_mode = CHRG_ON;
		sharpsl_pm.full_count = 0;

		return 1;
	} else if (sharpsl_pm.charge_mode != CHRG_ON) {
		return 1;
	}

	if (sharpsl_pm.full_count == 0) {
		int time;

		dev_dbg(sharpsl_pm.dev, "Offline Charger: Step 2\n");

		if ((sharpsl_check_battery_temp() < 0) || (sharpsl_check_battery_voltage() < 0))
			return sharpsl_off_charge_error();

		sharpsl_pm.machinfo->charge(0);
		mdelay(SHARPSL_CHARGE_WAIT_TIME);
		sharpsl_pm.machinfo->charge(1);
		sharpsl_pm.charge_mode = CHRG_ON;

		mdelay(SHARPSL_CHARGE_CO_CHECK_TIME);

		time = RCNR;
		while(1) {
			/* Check if any wakeup event had occurred */
			if (sharpsl_pm.machinfo->charger_wakeup() != 0)
				return 0;
			/* Check for timeout */
			if ((RCNR - time) > SHARPSL_WAIT_CO_TIME)
				return 1;
			if (sharpsl_pm.machinfo->read_devdata(SHARPSL_STATUS_CHRGFULL)) {
				dev_dbg(sharpsl_pm.dev, "Offline Charger: Charge full occurred. Retrying to check\n");
				sharpsl_pm.full_count++;
				sharpsl_pm.machinfo->charge(0);
				mdelay(SHARPSL_CHARGE_WAIT_TIME);
				sharpsl_pm.machinfo->charge(1);
				return 1;
			}
		}
	}

	dev_dbg(sharpsl_pm.dev, "Offline Charger: Step 3\n");

	mdelay(SHARPSL_CHARGE_CO_CHECK_TIME);

	time = RCNR;
	while(1) {
		/* Check if any wakeup event had occurred */
		if (sharpsl_pm.machinfo->charger_wakeup() != 0)
			return 0;
		/* Check for timeout */
		if ((RCNR-time) > SHARPSL_WAIT_CO_TIME) {
			if (sharpsl_pm.full_count > SHARPSL_CHARGE_RETRY_CNT) {
				dev_dbg(sharpsl_pm.dev, "Offline Charger: Not charged sufficiently. Retrying.\n");
				sharpsl_pm.full_count = 0;
			}
			sharpsl_pm.full_count++;
			return 1;
		}
		if (sharpsl_pm.machinfo->read_devdata(SHARPSL_STATUS_CHRGFULL)) {
			dev_dbg(sharpsl_pm.dev, "Offline Charger: Charging complete.\n");
			sharpsl_pm_led(SHARPSL_LED_OFF);
			sharpsl_pm.machinfo->charge(0);
			sharpsl_pm.charge_mode = CHRG_DONE;
			return 1;
		}
	}
}
void hiusb_start_hcd(void)
{
	if (atomic_add_return(1, &dev_open_cnt) == 1) {
		int reg;

		/* reset enable */
		reg = readl(PERI_CRG103);
		reg |= (USB2_BUS_SRST_REQ
			| USB2_UTMI0_SRST_REQ
			| USB2_UTMI1_SRST_REQ
			| USB2_HST_PHY_SYST_REQ
			| USB2_OTG_PHY_SRST_REQ);

		writel(reg, PERI_CRG103);
		udelay(200);

		reg = readl(PERI_CRG104);
		reg |= (USB_PHY0_SRST_REQ
			| USB_PHY0_SRST_TREQ
			| USB_PHY1_SRST_TREQ);
		writel(reg, PERI_CRG104);
		udelay(200);

		reg = readl(PERI_USB0);
		reg |= ULPI_BYPASS_EN_PORT0;	/* 3 ports utmi */
		reg &= ~(WORDINTERFACE);	/* 8bit */
		reg &= ~(SS_BURST16_EN);	/* 16 bit burst disable */
		writel(reg, PERI_USB0);
		udelay(100);

		/* for ssk usb storage ok */
		msleep(10);

		/* open ref clock */
		reg = readl(PERI_CRG104);
		reg |= (USB_PHY0_REF_CKEN);
		writel(reg, PERI_CRG104);
		udelay(100);

		/* cancel power on reset */
		reg = readl(PERI_CRG104);
		reg &= ~(USB_PHY0_SRST_REQ);
		writel(reg , PERI_CRG104);
		udelay(300);

		/* config clock */
		reg = readl(PERI_USB1);
		reg |= CONFIG_CLK;
		writel(reg, PERI_USB1);
		udelay(100);

		writel(0x0, PERI_USB1);
		mdelay(2);

		/* cancel port reset */
		reg = readl(PERI_CRG104);
		reg &= ~(USB_PHY0_SRST_TREQ
			| USB_PHY1_SRST_TREQ);
		writel(reg, PERI_CRG104);
		udelay(300);

		/* cancel control reset */
		reg = readl(PERI_CRG103);
		reg &= ~(USB2_BUS_SRST_REQ
			| USB2_UTMI0_SRST_REQ
			| USB2_UTMI1_SRST_REQ
			| USB2_HST_PHY_SYST_REQ
			| USB2_OTG_PHY_SRST_REQ);

		reg |= (USB2_BUS_CKEN
			| USB2_OHCI48M_CKEN
			| USB2_OHCI12M_CKEN
			| USB2_HST_PHY_CKEN
			| USB2_UTMI0_CKEN
			| USB2_UTMI1_CKEN);
		writel(reg, PERI_CRG103);
		udelay(200);
	}

	return;
}
static void corgi_lcd_power_on(struct corgi_lcd *lcd)
{
	int comadj;

	/* Initialize Internal Logic & Port */
	corgi_ssp_lcdtg_send(lcd, PICTRL_ADRS,
			PICTRL_POWER_DOWN | PICTRL_INIOFF |
			PICTRL_INIT_STATE | PICTRL_COM_SIGNAL_OFF |
			PICTRL_DAC_SIGNAL_OFF);

	corgi_ssp_lcdtg_send(lcd, POWERREG0_ADRS,
			POWER0_COM_DCLK | POWER0_COM_DOUT | POWER0_DAC_OFF |
			POWER0_COM_OFF | POWER0_VCC5_OFF);

	corgi_ssp_lcdtg_send(lcd, POWERREG1_ADRS,
			POWER1_VW_OFF | POWER1_GVSS_OFF | POWER1_VDD_OFF);

	/* VDD(+8V), SVSS(-4V) ON */
	corgi_ssp_lcdtg_send(lcd, POWERREG1_ADRS,
			POWER1_VW_OFF | POWER1_GVSS_OFF | POWER1_VDD_ON);
	mdelay(3);

	/* DAC ON */
	corgi_ssp_lcdtg_send(lcd, POWERREG0_ADRS,
			POWER0_COM_DCLK | POWER0_COM_DOUT | POWER0_DAC_ON |
			POWER0_COM_OFF | POWER0_VCC5_OFF);

	/* INIB = H, INI = L  */
	/* PICTL[0] = H , PICTL[1] = PICTL[2] = PICTL[4] = L */
	corgi_ssp_lcdtg_send(lcd, PICTRL_ADRS,
			PICTRL_INIT_STATE | PICTRL_COM_SIGNAL_OFF);

	/* Set Common Voltage */
	comadj = sharpsl_param.comadj;
	if (comadj < 0)
		comadj = DEFAULT_COMADJ;

	lcdtg_set_common_voltage(lcd, POWER0_DAC_ON | POWER0_COM_OFF |
				 POWER0_VCC5_OFF, comadj);

	/* VCC5 ON, DAC ON */
	corgi_ssp_lcdtg_send(lcd, POWERREG0_ADRS,
			POWER0_COM_DCLK | POWER0_COM_DOUT | POWER0_DAC_ON |
			POWER0_COM_OFF | POWER0_VCC5_ON);

	/* GVSS(-8V) ON, VDD ON */
	corgi_ssp_lcdtg_send(lcd, POWERREG1_ADRS,
			POWER1_VW_OFF | POWER1_GVSS_ON | POWER1_VDD_ON);
	mdelay(2);

	/* COM SIGNAL ON (PICTL[3] = L) */
	corgi_ssp_lcdtg_send(lcd, PICTRL_ADRS, PICTRL_INIT_STATE);

	/* COM ON, DAC ON, VCC5_ON */
	corgi_ssp_lcdtg_send(lcd, POWERREG0_ADRS,
			POWER0_COM_DCLK | POWER0_COM_DOUT | POWER0_DAC_ON |
			POWER0_COM_ON | POWER0_VCC5_ON);

	/* VW ON, GVSS ON, VDD ON */
	corgi_ssp_lcdtg_send(lcd, POWERREG1_ADRS,
			POWER1_VW_ON | POWER1_GVSS_ON | POWER1_VDD_ON);

	/* Signals output enable */
	corgi_ssp_lcdtg_send(lcd, PICTRL_ADRS, 0);

	/* Set Phase Adjust */
	lcdtg_set_phadadj(lcd, lcd->mode);

	/* Initialize for Input Signals from ATI */
	corgi_ssp_lcdtg_send(lcd, POLCTRL_ADRS,
			POLCTRL_SYNC_POL_RISE | POLCTRL_EN_POL_RISE |
			POLCTRL_DATA_POL_RISE | POLCTRL_SYNC_ACT_L |
			POLCTRL_EN_ACT_H);
	udelay(1000);

	switch (lcd->mode) {
	case CORGI_LCD_MODE_VGA:
		corgi_ssp_lcdtg_send(lcd, RESCTL_ADRS, RESCTL_VGA);
		break;
	case CORGI_LCD_MODE_QVGA:
	default:
		corgi_ssp_lcdtg_send(lcd, RESCTL_ADRS, RESCTL_QVGA);
		break;
	}
}
Exemple #8
0
int camera_power_on (void)
{
	int rc;
	struct device *dev = su370_backlight_dev();

	camera_power_mutex_lock();
	if(lcd_bl_power_state == BL_POWER_SUSPEND)
	{
		u370_pwrsink_resume();
		mdelay(50);
	}

	
	
	gpio_set_value(GPIO_CAM_RESET, 0);
	gpio_set_value(GPIO_CAM_PWDN, 0);

	


	


	{	
		struct vreg *vreg_mmc = vreg_get(0, "mmc");
		vreg_set_level(vreg_mmc, 2800);
		vreg_enable(vreg_mmc);
	}

  
	rc = aat28xx_ldo_set_level(dev, LDO_CAM_DVDD_NO, 1200);
	if (rc < 0) {
		printk(KERN_ERR "%s: ldo %d set level error\n", __func__, LDO_CAM_DVDD_NO);
		goto power_on_fail;
	}
	rc = aat28xx_ldo_enable(dev, LDO_CAM_DVDD_NO, 1);
	if (rc < 0) {
		printk(KERN_ERR "%s: ldo %d control error\n", __func__, LDO_CAM_DVDD_NO);
		goto power_on_fail;
	}

  
	rc = aat28xx_ldo_set_level(dev, LDO_CAM_IOVDD_NO, 2600);
	if (rc < 0) {
		printk(KERN_ERR "%s: ldo %d set level error\n", __func__, LDO_CAM_IOVDD_NO);
		goto power_on_fail;
	}
	rc = aat28xx_ldo_enable(dev, LDO_CAM_IOVDD_NO, 1);
	if (rc < 0) {
		printk(KERN_ERR "%s: ldo %d control error\n", __func__, LDO_CAM_IOVDD_NO);
		goto power_on_fail;
	}

	
	
	rc = aat28xx_ldo_set_level(dev, LDO_CAM_AVDD_NO, 2800);
	if (rc < 0) {
		printk(KERN_ERR "%s: ldo %d set level error\n", __func__, LDO_CAM_AVDD_NO);
		goto power_on_fail;
	}
	rc = aat28xx_ldo_enable(dev, LDO_CAM_AVDD_NO, 1);
	if (rc < 0) {
		printk(KERN_ERR "%s: ldo %d control error\n", __func__, LDO_CAM_AVDD_NO);
		goto power_on_fail;
	}	

	mdelay(5);
	
	msm_camio_clk_rate_set(mclk_rate);
	mdelay(5);
	msm_camio_camif_pad_reg_reset();
	mdelay(5);

	
	gpio_set_value(GPIO_CAM_RESET, 1);

	mdelay(5); 
	
	gpio_set_value(GPIO_CAM_PWDN, 1);
	
	mdelay(8);  

	camera_power_state = CAM_POWER_ON;

power_on_fail:
	camera_power_mutex_unlock();
	return rc;

}
Exemple #9
0
static int tegra_ehci_hub_control(
    struct usb_hcd	*hcd,
    u16		typeReq,
    u16		wValue,
    u16		wIndex,
    char		*buf,
    u16		wLength
)
{
    struct ehci_hcd	*ehci = hcd_to_ehci(hcd);
    int		ports = HCS_N_PORTS(ehci->hcs_params);
    u32		temp, status;
    u32 __iomem	*status_reg;
    u32		usbsts_reg;
    unsigned long	flags;
    int		retval = 0;
    unsigned	selector;
    struct		tegra_ehci_hcd *tegra = dev_get_drvdata(hcd->self.controller);
    bool		hsic = false;

    if (tegra->phy->instance == 1) {
        struct tegra_ulpi_config *config = tegra->phy->config;
        hsic = (config->inf_type == TEGRA_USB_UHSIC);
    }

    status_reg = &ehci->regs->port_status[(wIndex & 0xff) - 1];

    spin_lock_irqsave(&ehci->lock, flags);

    /*
     * In ehci_hub_control() for USB_PORT_FEAT_ENABLE clears the other bits
     * that are write on clear, by writing back the register read value, so
     * USB_PORT_FEAT_ENABLE is handled by masking the set on clear bits
     */
    if (typeReq == ClearPortFeature && wValue == USB_PORT_FEAT_ENABLE) {
        temp = ehci_readl(ehci, status_reg) & ~PORT_RWC_BITS;
        ehci_writel(ehci, temp & ~PORT_PE, status_reg);
        goto done;
    } else if (typeReq == GetPortStatus) {
        temp = ehci_readl(ehci, status_reg);
        if (tegra->port_resuming && !(temp & PORT_SUSPEND) &&
                time_after_eq(jiffies, ehci->reset_done[wIndex-1])) {
            /* resume completed */
            tegra->port_resuming = 0;
            clear_bit((wIndex & 0xff) - 1, &ehci->suspended_ports);
            ehci->reset_done[wIndex-1] = 0;
            tegra_usb_phy_postresume(tegra->phy);
        }
    } else if (typeReq == SetPortFeature && wValue == USB_PORT_FEAT_SUSPEND) {
        temp = ehci_readl(ehci, status_reg);
        if ((temp & PORT_PE) == 0 || (temp & PORT_RESET) != 0) {
            retval = -EPIPE;
            goto done;
        }

        temp &= ~PORT_WKCONN_E;
        temp |= PORT_WKDISC_E | PORT_WKOC_E;
        ehci_writel(ehci, temp | PORT_SUSPEND, status_reg);
        /* Need a 4ms delay before the controller goes to suspend */
        mdelay(4);

        /*
         * If a transaction is in progress, there may be a delay in
         * suspending the port. Poll until the port is suspended.
         */
        if (handshake(ehci, status_reg, PORT_SUSPEND,
                      PORT_SUSPEND, 5000))
            pr_err("%s: timeout waiting for SUSPEND\n", __func__);

        set_bit((wIndex & 0xff) - 1, &ehci->suspended_ports);
        goto done;
    }

    /*
     * Tegra host controller will time the resume operation to clear the bit
     * when the port control state switches to HS or FS Idle. This behavior
     * is different from EHCI where the host controller driver is required
     * to set this bit to a zero after the resume duration is timed in the
     * driver.
     */
    else if (typeReq == ClearPortFeature &&
             wValue == USB_PORT_FEAT_SUSPEND) {
        temp = ehci_readl(ehci, status_reg);
        if ((temp & PORT_RESET) || !(temp & PORT_PE)) {
            retval = -EPIPE;
            goto done;
        }

        if (!(temp & PORT_SUSPEND))
            goto done;

        /* Disable disconnect detection during port resume */
        tegra->port_resuming = 1;

        tegra_usb_phy_preresume(tegra->phy);

        ehci_dbg(ehci, "%s:USBSTS = 0x%x", __func__,
                 ehci_readl(ehci, &ehci->regs->status));
        usbsts_reg = ehci_readl(ehci, &ehci->regs->status);
        ehci_writel(ehci, usbsts_reg, &ehci->regs->status);
        usbsts_reg = ehci_readl(ehci, &ehci->regs->status);
        udelay(20);

        if (handshake(ehci, &ehci->regs->status, STS_SRI, STS_SRI, 2000))
            pr_err("%s: timeout set for STS_SRI\n", __func__);

        usbsts_reg = ehci_readl(ehci, &ehci->regs->status);
        ehci_writel(ehci, usbsts_reg, &ehci->regs->status);

        if (handshake(ehci, &ehci->regs->status, STS_SRI, 0, 2000))
            pr_err("%s: timeout clear STS_SRI\n", __func__);

        if (handshake(ehci, &ehci->regs->status, STS_SRI, STS_SRI, 2000))
            pr_err("%s: timeout set STS_SRI\n", __func__);

        udelay(20);
        temp &= ~(PORT_RWC_BITS | PORT_WAKE_BITS);
        /* start resume signaling */
        ehci_writel(ehci, temp | PORT_RESUME, status_reg);

        ehci->reset_done[wIndex-1] = jiffies + msecs_to_jiffies(25);
        /* whoever resumes must GetPortStatus to complete it!! */
        goto done;
    }

    /* Handle port reset here */
    if ((hsic) && (typeReq == SetPortFeature) &&
            ((wValue == USB_PORT_FEAT_RESET) || (wValue == USB_PORT_FEAT_POWER))) {
        selector = wIndex >> 8;
        wIndex &= 0xff;
        if (!wIndex || wIndex > ports) {
            retval = -EPIPE;
            goto done;
        }
        wIndex--;
        status = 0;
        temp = ehci_readl(ehci, status_reg);
        if (temp & PORT_OWNER)
            goto done;
        temp &= ~PORT_RWC_BITS;

        switch (wValue) {
        case USB_PORT_FEAT_RESET:
        {
            if (temp & PORT_RESUME) {
                retval = -EPIPE;
                goto done;
            }
            /* line status bits may report this as low speed,
            * which can be fine if this root hub has a
            * transaction translator built in.
            */
            if ((temp & (PORT_PE|PORT_CONNECT)) == PORT_CONNECT
                    && !ehci_is_TDI(ehci) && PORT_USB11 (temp)) {
                ehci_dbg (ehci, "port %d low speed --> companion\n", wIndex + 1);
                temp |= PORT_OWNER;
                ehci_writel(ehci, temp, status_reg);
            } else {
                ehci_vdbg(ehci, "port %d reset\n", wIndex + 1);
                temp &= ~PORT_PE;
                /*
                * caller must wait, then call GetPortStatus
                * usb 2.0 spec says 50 ms resets on root
                */
                ehci->reset_done[wIndex] = jiffies + msecs_to_jiffies(50);
                ehci_writel(ehci, temp, status_reg);
                if (hsic && (wIndex == 0))
                    tegra_usb_phy_bus_reset(tegra->phy);
            }

            break;
        }
        case USB_PORT_FEAT_POWER:
        {
            if (HCS_PPC(ehci->hcs_params))
                ehci_writel(ehci, temp | PORT_POWER, status_reg);
            if (hsic && (wIndex == 0))
                tegra_usb_phy_bus_connect(tegra->phy);
            break;
        }
        }
        goto done;
    }
static void do_ilitek_init(struct platform_device *pdev)
{
#if defined(CONFIG_MACH_MSM7X25A_E0EU) || defined(CONFIG_MACH_MSM7X25A_E1BR)
	int x,y; 

	/* EXTC Option*/
	EBI2_WRITE16C(DISP_CMD_PORT, 0xcf);
	EBI2_WRITE16D(DISP_DATA_PORT,0x00);
	EBI2_WRITE16D(DISP_DATA_PORT,0x21);
	EBI2_WRITE16D(DISP_DATA_PORT,0x20);

	/* 3-Gamma Function Off */
	EBI2_WRITE16C(DISP_CMD_PORT, 0xf2);
	EBI2_WRITE16D(DISP_DATA_PORT,0x02);
	
	/* Inversion Control -> 2Dot inversion*/
	EBI2_WRITE16C(DISP_CMD_PORT, 0xb4);
	EBI2_WRITE16D(DISP_DATA_PORT,0x02);

	/* Power control 1 */
	EBI2_WRITE16C(DISP_CMD_PORT, 0xc0);
	EBI2_WRITE16D(DISP_DATA_PORT,0x15);
	EBI2_WRITE16D(DISP_DATA_PORT,0x15);

	/* Power control 2*/
	EBI2_WRITE16C(DISP_CMD_PORT, 0xc1);
	EBI2_WRITE16D(DISP_DATA_PORT,0x05);

	/* Power control 3*/
	EBI2_WRITE16C(DISP_CMD_PORT, 0xc2);
	EBI2_WRITE16D(DISP_DATA_PORT,0x32);

	/* Vcom control 1*/
	EBI2_WRITE16C(DISP_CMD_PORT, 0xc5);
	EBI2_WRITE16D(DISP_DATA_PORT,0xfc);

	/* V-core Setting */
	EBI2_WRITE16C(DISP_CMD_PORT, 0xcb);
	EBI2_WRITE16D(DISP_DATA_PORT,0x31);
	EBI2_WRITE16D(DISP_DATA_PORT,0x24);
	EBI2_WRITE16D(DISP_DATA_PORT,0x00);
	EBI2_WRITE16D(DISP_DATA_PORT,0x34);
	
	/* Interface control*/
	EBI2_WRITE16C(DISP_CMD_PORT, 0xf6);
	EBI2_WRITE16D(DISP_DATA_PORT,0x41);
	EBI2_WRITE16D(DISP_DATA_PORT,0x00);
	EBI2_WRITE16D(DISP_DATA_PORT,0x00);

	/* Entry Mode Set*/
	EBI2_WRITE16C(DISP_CMD_PORT, 0xb7);
	EBI2_WRITE16D(DISP_DATA_PORT,0x06);

	/* Frame Rate control*/
	EBI2_WRITE16C(DISP_CMD_PORT, 0xb1);
	EBI2_WRITE16D(DISP_DATA_PORT,0x00);
	EBI2_WRITE16D(DISP_DATA_PORT,0x1b);

	/* Memory Access control*/
	EBI2_WRITE16C(DISP_CMD_PORT, 0x36);
	EBI2_WRITE16D(DISP_DATA_PORT,0x08);

	/* Blanking Porch control*/
	EBI2_WRITE16C(DISP_CMD_PORT, 0xb5);
	EBI2_WRITE16D(DISP_DATA_PORT,0x02);
	EBI2_WRITE16D(DISP_DATA_PORT,0x02);
	EBI2_WRITE16D(DISP_DATA_PORT,0x0a);
	EBI2_WRITE16D(DISP_DATA_PORT,0x14);

	/* Display Function control*/
	EBI2_WRITE16C(DISP_CMD_PORT, 0xb6);
	EBI2_WRITE16D(DISP_DATA_PORT,0x02);
	EBI2_WRITE16D(DISP_DATA_PORT,0x82);
	EBI2_WRITE16D(DISP_DATA_PORT,0x27);
	EBI2_WRITE16D(DISP_DATA_PORT,0x00);

	/* Pixel Format --> DBI(5 = 16bit) */
	EBI2_WRITE16C(DISP_CMD_PORT, 0x3a);
	EBI2_WRITE16D(DISP_DATA_PORT,0x05);

	/* Tearing Effect Line On */
	EBI2_WRITE16C(DISP_CMD_PORT, 0x35);
	EBI2_WRITE16D(DISP_DATA_PORT,0x00);

	/* Tearing effect Control Parameter */
	EBI2_WRITE16C(DISP_CMD_PORT, 0x44);
	EBI2_WRITE16D(DISP_DATA_PORT,0x00);
	EBI2_WRITE16D(DISP_DATA_PORT,0xef);

	/* Positive Gamma Correction*/
	EBI2_WRITE16C(DISP_CMD_PORT, 0xe0);
	EBI2_WRITE16D(DISP_DATA_PORT,0x00);
	EBI2_WRITE16D(DISP_DATA_PORT,0x06);
	EBI2_WRITE16D(DISP_DATA_PORT,0x07);
	EBI2_WRITE16D(DISP_DATA_PORT,0x03);
	EBI2_WRITE16D(DISP_DATA_PORT,0x0a);
	EBI2_WRITE16D(DISP_DATA_PORT,0x0a);
	EBI2_WRITE16D(DISP_DATA_PORT,0x40);
	EBI2_WRITE16D(DISP_DATA_PORT,0x59);
	EBI2_WRITE16D(DISP_DATA_PORT,0x4d);
	EBI2_WRITE16D(DISP_DATA_PORT,0x0c);
	EBI2_WRITE16D(DISP_DATA_PORT,0x18);
	EBI2_WRITE16D(DISP_DATA_PORT,0x0f);
	EBI2_WRITE16D(DISP_DATA_PORT,0x22);
	EBI2_WRITE16D(DISP_DATA_PORT,0x1d);
	EBI2_WRITE16D(DISP_DATA_PORT,0x0f);

	/* Negative Gamma Correction*/
	EBI2_WRITE16C(DISP_CMD_PORT, 0xe1);
	EBI2_WRITE16D(DISP_DATA_PORT,0x06);
	EBI2_WRITE16D(DISP_DATA_PORT,0x23);
	EBI2_WRITE16D(DISP_DATA_PORT,0x24);
	EBI2_WRITE16D(DISP_DATA_PORT,0x01);
	EBI2_WRITE16D(DISP_DATA_PORT,0x0f);
	EBI2_WRITE16D(DISP_DATA_PORT,0x01);
	EBI2_WRITE16D(DISP_DATA_PORT,0x36);
	EBI2_WRITE16D(DISP_DATA_PORT,0x23);
	EBI2_WRITE16D(DISP_DATA_PORT,0x41);
	EBI2_WRITE16D(DISP_DATA_PORT,0x07);
	EBI2_WRITE16D(DISP_DATA_PORT,0x0f);
	EBI2_WRITE16D(DISP_DATA_PORT,0x0f);
	EBI2_WRITE16D(DISP_DATA_PORT,0x30);
	EBI2_WRITE16D(DISP_DATA_PORT,0x27);
	EBI2_WRITE16D(DISP_DATA_PORT,0x0e);

	/* Column address*/
	EBI2_WRITE16C(DISP_CMD_PORT, 0x2a); // Set_column_address
	EBI2_WRITE16D(DISP_DATA_PORT,0x00);
	EBI2_WRITE16D(DISP_DATA_PORT,0x00);
	EBI2_WRITE16D(DISP_DATA_PORT,0x00);
	EBI2_WRITE16D(DISP_DATA_PORT,0xef);

	/* Page address*/
	EBI2_WRITE16C(DISP_CMD_PORT, 0x2b); // Set_Page_address
	EBI2_WRITE16D(DISP_DATA_PORT,0x00);
	EBI2_WRITE16D(DISP_DATA_PORT,0x00);
	EBI2_WRITE16D(DISP_DATA_PORT,0x01);
	EBI2_WRITE16D(DISP_DATA_PORT,0x3f);

	/* Charge Sharing control*/
	EBI2_WRITE16C(DISP_CMD_PORT, 0xe8); // Charge Sharing Control
	EBI2_WRITE16D(DISP_DATA_PORT,0x84);
	EBI2_WRITE16D(DISP_DATA_PORT,0x1a);
	EBI2_WRITE16D(DISP_DATA_PORT,0x68);

	/* Exit Sleep - This command should be only used at Power on sequence*/
	EBI2_WRITE16C(DISP_CMD_PORT,0x11); // Exit Sleep

	msleep(120);

/* LGE_CHANGE_S: E0 [email protected] [2011-11-22] : BL control error fix */
#if 1
	EBI2_WRITE16C(DISP_CMD_PORT,0x2c); // Write memory start
	for(y = 0; y < 320; y++) {
		int pixel = 0x0;
		for(x= 0; x < 240; x++) {
			EBI2_WRITE16D(DISP_DATA_PORT,pixel);
		}
	}
	msleep(30);
#endif
/* LGE_CHANGE_E: E0 [email protected] [2011-11-22] : BL control error fix */
		   

	EBI2_WRITE16C(DISP_CMD_PORT,0x29); // Display On
#else
		EBI2_WRITE16C(DISP_CMD_PORT, 0xc0);
		EBI2_WRITE16D(DISP_DATA_PORT,0x1D); // 1
	
		EBI2_WRITE16C(DISP_CMD_PORT, 0xc1);
		EBI2_WRITE16D(DISP_DATA_PORT,0x11); // 1
	
		EBI2_WRITE16C(DISP_CMD_PORT, 0xc5);
		EBI2_WRITE16D(DISP_DATA_PORT,0x33); // 1
		EBI2_WRITE16D(DISP_DATA_PORT,0x34); // 2
	
		EBI2_WRITE16C(DISP_CMD_PORT, 0xcb);
		EBI2_WRITE16D(DISP_DATA_PORT,0x39); // 1
		EBI2_WRITE16D(DISP_DATA_PORT,0x2c); // 2
		EBI2_WRITE16D(DISP_DATA_PORT,0x00); // 3
		EBI2_WRITE16D(DISP_DATA_PORT,0x34); // 4
		EBI2_WRITE16D(DISP_DATA_PORT,0x02); // 5
	
		EBI2_WRITE16C(DISP_CMD_PORT, 0xcf);
		EBI2_WRITE16D(DISP_DATA_PORT,0x00); // 1
		EBI2_WRITE16D(DISP_DATA_PORT,0x83); // 2
		EBI2_WRITE16D(DISP_DATA_PORT,0x30); // 3
	
		EBI2_WRITE16C(DISP_CMD_PORT, 0xe8);
		EBI2_WRITE16D(DISP_DATA_PORT,0x85); // 1
		EBI2_WRITE16D(DISP_DATA_PORT,0x01); // 2
		EBI2_WRITE16D(DISP_DATA_PORT,0x78); // 2
	
		EBI2_WRITE16C(DISP_CMD_PORT, 0xea);
		EBI2_WRITE16D(DISP_DATA_PORT,0x00); // 1
		EBI2_WRITE16D(DISP_DATA_PORT,0x00); // 2
	
		/* Power on sequence control */
		EBI2_WRITE16C(DISP_CMD_PORT, 0xed);
		EBI2_WRITE16D(DISP_DATA_PORT,0x64); // 1
		EBI2_WRITE16D(DISP_DATA_PORT,0x03); // 2
		EBI2_WRITE16D(DISP_DATA_PORT,0x12); // 3
		EBI2_WRITE16D(DISP_DATA_PORT,0x81); // 4
	
		/* Pump ratio control */
		EBI2_WRITE16C(DISP_CMD_PORT, 0xf7);
		EBI2_WRITE16D(DISP_DATA_PORT,0x20); // 1
	
		/* Display mode setting */
		EBI2_WRITE16C(DISP_CMD_PORT, 0x13);
	
		/* Memory access control */
		EBI2_WRITE16C(DISP_CMD_PORT, 0x36);
		EBI2_WRITE16D(DISP_DATA_PORT,mactl); // 1
	
		EBI2_WRITE16C(DISP_CMD_PORT, 0x3a);
		EBI2_WRITE16D(DISP_DATA_PORT,0x05); // 1
	
		EBI2_WRITE16C(DISP_CMD_PORT, 0xb1);
		EBI2_WRITE16D(DISP_DATA_PORT,0x00); // 1
		EBI2_WRITE16D(DISP_DATA_PORT,0x1A); // 2
	
		EBI2_WRITE16C(DISP_CMD_PORT, 0xb4);
		EBI2_WRITE16D(DISP_DATA_PORT,0x00); // 1
	
		EBI2_WRITE16C(DISP_CMD_PORT, 0xb5);
		EBI2_WRITE16D(DISP_DATA_PORT,0x02); // 1
		EBI2_WRITE16D(DISP_DATA_PORT,0x02); // 2
		EBI2_WRITE16D(DISP_DATA_PORT,0x0a); // 3
		EBI2_WRITE16D(DISP_DATA_PORT,0x14); // 4
	
		EBI2_WRITE16C(DISP_CMD_PORT, 0xb6);
		EBI2_WRITE16D(DISP_DATA_PORT,0x0a); // 1
		EBI2_WRITE16D(DISP_DATA_PORT,0x82); // 2
		EBI2_WRITE16D(DISP_DATA_PORT,0x27); // 3
		//EBI2_WRITE16D(DISP_DATA_PORT,0x00); // 4
	
		EBI2_WRITE16C(DISP_CMD_PORT, 0x35);
		EBI2_WRITE16D(DISP_DATA_PORT,0x00); // 1
	
		EBI2_WRITE16C(DISP_CMD_PORT, 0x44); // Tearing effect Control
		EBI2_WRITE16D(DISP_DATA_PORT,te_lines >> 8); // 1
		EBI2_WRITE16D(DISP_DATA_PORT,te_lines & 0xFF); // 2
	
		/* Positive Gamma Correction */
		EBI2_WRITE16C(DISP_CMD_PORT, 0xe0);
		EBI2_WRITE16D(DISP_DATA_PORT,0x0F); // 1
		EBI2_WRITE16D(DISP_DATA_PORT,0x2B); // 2
		EBI2_WRITE16D(DISP_DATA_PORT,0x2A); // 3
		EBI2_WRITE16D(DISP_DATA_PORT,0x0B); // 4
		EBI2_WRITE16D(DISP_DATA_PORT,0x11); // 5
		EBI2_WRITE16D(DISP_DATA_PORT,0x0B); // 6
		EBI2_WRITE16D(DISP_DATA_PORT,0x57); // 6
		EBI2_WRITE16D(DISP_DATA_PORT,0xF2); // 8
		EBI2_WRITE16D(DISP_DATA_PORT,0x45); // 9
		EBI2_WRITE16D(DISP_DATA_PORT,0x0A); // 10
		EBI2_WRITE16D(DISP_DATA_PORT,0x15); // 11
		EBI2_WRITE16D(DISP_DATA_PORT,0x05); // 12
		EBI2_WRITE16D(DISP_DATA_PORT,0x0B); // 13
		EBI2_WRITE16D(DISP_DATA_PORT,0x04); // 14
		EBI2_WRITE16D(DISP_DATA_PORT,0x04); // 15
	
		/* Negative Gamma Correction */
		EBI2_WRITE16C(DISP_CMD_PORT, 0xe1);
		EBI2_WRITE16D(DISP_DATA_PORT,0x00); // 1
		EBI2_WRITE16D(DISP_DATA_PORT,0x18); // 2
		EBI2_WRITE16D(DISP_DATA_PORT,0x19); // 3
		EBI2_WRITE16D(DISP_DATA_PORT,0x00); // 4
		EBI2_WRITE16D(DISP_DATA_PORT,0x0F); // 5
		EBI2_WRITE16D(DISP_DATA_PORT,0x04); // 6
		EBI2_WRITE16D(DISP_DATA_PORT,0x28); // 6
		EBI2_WRITE16D(DISP_DATA_PORT,0x81); // 8
		EBI2_WRITE16D(DISP_DATA_PORT,0x3D); // 9
		EBI2_WRITE16D(DISP_DATA_PORT,0x06); // 10
		EBI2_WRITE16D(DISP_DATA_PORT,0x0B); // 11
		EBI2_WRITE16D(DISP_DATA_PORT,0x0A); // 12
		EBI2_WRITE16D(DISP_DATA_PORT,0x32); // 13
		EBI2_WRITE16D(DISP_DATA_PORT,0x3A); // 14
		EBI2_WRITE16D(DISP_DATA_PORT,0x0f); // 15
	
		EBI2_WRITE16C(DISP_CMD_PORT,0x2a); // Set_column_address
		EBI2_WRITE16D(DISP_DATA_PORT,0x00); // 1
		EBI2_WRITE16D(DISP_DATA_PORT,0x00); // 2
		EBI2_WRITE16D(DISP_DATA_PORT,0x00); // 3
		EBI2_WRITE16D(DISP_DATA_PORT,0xef); // 4
	
		EBI2_WRITE16C(DISP_CMD_PORT,0x2b); // Set_Page_address
		EBI2_WRITE16D(DISP_DATA_PORT,0x00); // 1
		EBI2_WRITE16D(DISP_DATA_PORT,0x00); // 2
		EBI2_WRITE16D(DISP_DATA_PORT,0x01); // 3
		EBI2_WRITE16D(DISP_DATA_PORT,0x3f); // 4
	
		EBI2_WRITE16C(DISP_CMD_PORT,0xe8); // Charge Sharing Control
		EBI2_WRITE16D(DISP_DATA_PORT,0x85); // 1
		EBI2_WRITE16D(DISP_DATA_PORT,0x01); // 2
		EBI2_WRITE16D(DISP_DATA_PORT,0x78); // 3
	
		EBI2_WRITE16C(DISP_CMD_PORT,0x11); // Exit Sleep
	
		mdelay(120);
	
	/*-- bootlogo is displayed at oemsbl
		EBI2_WRITE16C(DISP_CMD_PORT,0x2c); // Write memory start
		for(y = 0; y < 320; y++) {
			int pixel = 0x0;
			for(x= 0; x < 240; x++) {
				EBI2_WRITE16D(DISP_DATA_PORT,pixel); // 1
			}
		}
	
		mdelay(50);
	*/
		EBI2_WRITE16C(DISP_CMD_PORT,0x29); // Display On	
#endif
}
static int ilitek_qvga_disp_on(struct platform_device *pdev)
{
	int	readport;
	struct msm_panel_ilitek_pdata *pdata = tovis_qvga_panel_pdata;

	printk("%s: display on...", __func__);
	if (!disp_initialized)
		tovis_qvga_disp_init(pdev);

	if(pdata->initialized && system_state == SYSTEM_BOOTING) {
		/* Do not hw initialize */
	} else {

		/* LGE_CHANGE_S: E0 [email protected] [2012-02-01] 
		: For the Wakeup Issue */
		mcs8000_ts_on();
		/* LGE_CHANGE_E: E0 [email protected] [2012-02-01] 
		: For the Wakeup Issue */
	
		msm_fb_ebi2_power_save(1);

		gpio_tlmm_config(GPIO_CFG(GPIO_LCD_TID, 0, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA), GPIO_CFG_ENABLE);
		readport = gpio_get_value(GPIO_LCD_TID);
			
#if 1
		if(readport==0 ) 
		{			
			if(IsFirstDisplayOn==0)
			{
					if(pdata->gpio) {
						//mdelay(10);	// prevent stop to listen to music with BT
						gpio_set_value(pdata->gpio, 1);
						mdelay(1);
						gpio_set_value(pdata->gpio, 0);
						mdelay(20);
						gpio_set_value(pdata->gpio, 1);
						msleep(50);
					}
					printk("AUO Init Started\n");
					do_AUO_init(pdev);
			}									
		}
		else 
		{
if(IsFirstDisplayOn==0)
{
		if(pdata->gpio) {
			//mdelay(10);	// prevent stop to listen to music with BT
			gpio_set_value(pdata->gpio, 1);
			mdelay(1);
			gpio_set_value(pdata->gpio, 0);
			mdelay(10);
			gpio_set_value(pdata->gpio, 1);
			msleep(120);
		}
					printk("Tovis Init Started\n");
		if(pdata->maker_id == PANEL_ID_LGDISPLAY)
			do_lgd_init(pdev);
		else
			do_ilitek_init(pdev);
	}
		}
		#endif
		
	}

	pm_qos_update_request(tovis_pm_qos_req, 65000);
	display_on = TRUE;

/* LGE_CHANGE_S: E0 [email protected] [2011-11-22] : BL control error fix */
#if 1
	if(!Is_Backlight_Set)
	{
		msleep(50);
		bu61800_force_set();    //backlight current level force setting here
	}
#endif
/* LGE_CHANGE_E: E0 [email protected] [2011-11-22] : BL control error fix */
	if(IsFirstDisplayOn > 0) 
	 IsFirstDisplayOn-- ;
	  
	return 0;
}
/******************************************************************************
Function:       which_lcd_module_triple
  Description:    read LCD ID PIN status,could identify three status:high\A1\A2low\A1\A2float
  Input:           none
  Output:         none
  Return:         LCD ID1|ID0 value
  Others:
******************************************************************************/
unsigned char which_lcd_module_triple(void)
{
    unsigned char  high_read0 = 0;
    unsigned char  low_read0 = 0;
    unsigned char  high_read1 = 0;
    unsigned char  low_read1 = 0;
    unsigned char  lcd_id0 = 0;
    unsigned char  lcd_id1 = 0;
    unsigned char  lcd_id = 0;
    //Solve Coverity scan warning : check return value
    unsigned int ret = 0;
    //only recognise once
    if(0xFF != lcd_id_pins_value)
    {
        return lcd_id_pins_value;
    }
    //Solve Coverity scan warning : check return value
    ret = mt_set_gpio_mode(GPIO_DISP_ID0_PIN, GPIO_MODE_00);
    if(0 != ret)
    {
        LCD_DEBUG("ID0 mt_set_gpio_mode fail\n");
    }
    ret = mt_set_gpio_dir(GPIO_DISP_ID0_PIN, GPIO_DIR_IN);
    if(0 != ret)
    {
        LCD_DEBUG("ID0 mt_set_gpio_dir fail\n");
    }
    ret = mt_set_gpio_pull_enable(GPIO_DISP_ID0_PIN, GPIO_PULL_ENABLE);
    if(0 != ret)
    {
        LCD_DEBUG("ID0 mt_set_gpio_pull_enable fail\n");
    }
    ret = mt_set_gpio_mode(GPIO_DISP_ID1_PIN, GPIO_MODE_00);
    if(0 != ret)
    {
        LCD_DEBUG("ID1 mt_set_gpio_mode fail\n");
    }
    ret = mt_set_gpio_dir(GPIO_DISP_ID1_PIN, GPIO_DIR_IN);
    if(0 != ret)
    {
        LCD_DEBUG("ID1 mt_set_gpio_dir fail\n");
    }
    ret = mt_set_gpio_pull_enable(GPIO_DISP_ID1_PIN, GPIO_PULL_ENABLE);
    if(0 != ret)
    {
        LCD_DEBUG("ID1 mt_set_gpio_pull_enable fail\n");
    }
    //pull down ID0 ID1 PIN
    ret = mt_set_gpio_pull_select(GPIO_DISP_ID0_PIN,GPIO_PULL_DOWN);
    if(0 != ret)
    {
        LCD_DEBUG("ID0 mt_set_gpio_pull_select->Down fail\n");
    }
    ret = mt_set_gpio_pull_select(GPIO_DISP_ID1_PIN,GPIO_PULL_DOWN);
    if(0 != ret)
    {
        LCD_DEBUG("ID1 mt_set_gpio_pull_select->Down fail\n");
    }
    //delay 100ms , for discharging capacitance
    mdelay(100);
    //get ID0 ID1 status
    low_read0 = mt_get_gpio_in(GPIO_DISP_ID0_PIN);
    low_read1 = mt_get_gpio_in(GPIO_DISP_ID1_PIN);
    //pull up ID0 ID1 PIN
    ret = mt_set_gpio_pull_select(GPIO_DISP_ID0_PIN,GPIO_PULL_UP);
    if(0 != ret)
    {
        LCD_DEBUG("ID0 mt_set_gpio_pull_select->UP fail\n");
    }
    ret = mt_set_gpio_pull_select(GPIO_DISP_ID1_PIN,GPIO_PULL_UP);
    if(0 != ret)
    {
        LCD_DEBUG("ID1 mt_set_gpio_pull_select->UP fail\n");
    }
    //delay 100ms , for charging capacitance
    mdelay(100);
    //get ID0 ID1 status
    high_read0 = mt_get_gpio_in(GPIO_DISP_ID0_PIN);
    high_read1 = mt_get_gpio_in(GPIO_DISP_ID1_PIN);

    if( low_read0 != high_read0 )
    {
        /*float status , pull down ID0 ,to prevent electric leakage*/
        ret = mt_set_gpio_pull_select(GPIO_DISP_ID0_PIN,GPIO_PULL_DOWN);
        if(0 != ret)
        {
            LCD_DEBUG("ID0 mt_set_gpio_pull_select->Down fail\n");
        }
        lcd_id0 = LCD_HW_ID_STATUS_FLOAT;
    }
    else if((LCD_HW_ID_STATUS_LOW == low_read0) && (LCD_HW_ID_STATUS_LOW == high_read0))
    {
        /*low status , pull down ID0 ,to prevent electric leakage*/
        ret = mt_set_gpio_pull_select(GPIO_DISP_ID0_PIN,GPIO_PULL_DOWN);
        if(0 != ret)
        {
            LCD_DEBUG("ID0 mt_set_gpio_pull_select->Down fail\n");
        }
        lcd_id0 = LCD_HW_ID_STATUS_LOW;
    }
    else if((LCD_HW_ID_STATUS_HIGH == low_read0) && (LCD_HW_ID_STATUS_HIGH == high_read0))
    {
        /*high status , pull up ID0 ,to prevent electric leakage*/
        ret = mt_set_gpio_pull_select(GPIO_DISP_ID0_PIN,GPIO_PULL_UP);
        if(0 != ret)
        {
            LCD_DEBUG("ID0 mt_set_gpio_pull_select->UP fail\n");
        }
        lcd_id0 = LCD_HW_ID_STATUS_HIGH;
    }
    else
    {
        LCD_DEBUG(" Read LCD_id0 error\n");
        ret = mt_set_gpio_pull_select(GPIO_DISP_ID0_PIN,GPIO_PULL_DISABLE);
        if(0 != ret)
        {
            LCD_DEBUG("ID0 mt_set_gpio_pull_select->Disbale fail\n");
        }
        lcd_id0 = LCD_HW_ID_STATUS_ERROR;
    }


    if( low_read1 != high_read1 )
    {
        /*float status , pull down ID1 ,to prevent electric leakage*/
        ret = mt_set_gpio_pull_select(GPIO_DISP_ID1_PIN,GPIO_PULL_DOWN);
        if(0 != ret)
        {
            LCD_DEBUG("ID1 mt_set_gpio_pull_select->Down fail\n");
        }
        lcd_id1 = LCD_HW_ID_STATUS_FLOAT;
    }
    else if((LCD_HW_ID_STATUS_LOW == low_read1) && (LCD_HW_ID_STATUS_LOW == high_read1))
    {
        /*low status , pull down ID1 ,to prevent electric leakage*/
        ret = mt_set_gpio_pull_select(GPIO_DISP_ID1_PIN,GPIO_PULL_DOWN);
        if(0 != ret)
        {
            LCD_DEBUG("ID1 mt_set_gpio_pull_select->Down fail\n");
        }
        lcd_id1 = LCD_HW_ID_STATUS_LOW;
    }
    else if((LCD_HW_ID_STATUS_HIGH == low_read1) && (LCD_HW_ID_STATUS_HIGH == high_read1))
    {
        /*high status , pull up ID1 ,to prevent electric leakage*/
        ret = mt_set_gpio_pull_select(GPIO_DISP_ID1_PIN,GPIO_PULL_UP);
        if(0 != ret)
        {
            LCD_DEBUG("ID1 mt_set_gpio_pull_select->UP fail\n");
        }
        lcd_id1 = LCD_HW_ID_STATUS_HIGH;
    }
    else
    {

        LCD_DEBUG(" Read LCD_id1 error\n");
        ret = mt_set_gpio_pull_select(GPIO_DISP_ID1_PIN,GPIO_PULL_DISABLE);
        if(0 != ret)
        {
            LCD_DEBUG("ID1 mt_set_gpio_pull_select->Disable fail\n");
        }
        lcd_id1 = LCD_HW_ID_STATUS_ERROR;
    }
#ifdef BUILD_LK
    dprintf(CRITICAL,"which_lcd_module_triple,lcd_id0:%d\n",lcd_id0);
    dprintf(CRITICAL,"which_lcd_module_triple,lcd_id1:%d\n",lcd_id1);
#else
    printk("which_lcd_module_triple,lcd_id0:%d\n",lcd_id0);
    printk("which_lcd_module_triple,lcd_id1:%d\n",lcd_id1);
#endif
    lcd_id =  lcd_id0 | (lcd_id1 << 2);

#ifdef BUILD_LK
    dprintf(CRITICAL,"which_lcd_module_triple,lcd_id:%d\n",lcd_id);
#else
    printk("which_lcd_module_triple,lcd_id:%d\n",lcd_id);
#endif

    lcd_id_pins_value = lcd_id;
    return lcd_id;
}
int NCP6914_subPMIC_PowerOn(int opt)
{
	int ret = 0;
	u8 reg;
	u8 val;
#if ( defined(CONFIG_MACH_JANICE) || defined(CONFIG_MACH_CODINA) || defined(CONFIG_MACH_GAVINI) || defined(CONFIG_MACH_SEC_KYLE)|| defined(CONFIG_MACH_SEC_GOLDEN) || defined(CONFIG_MACH_SEC_SKOMER) || defined(CONFIG_MACH_SEC_HENDRIX))
	// TODO: TEMP DEBUG gareth.phillips
;

	if (opt == 0) {
		NCP6914_pinstate = 0;
		gpio_set_value(gpio_power_on, 0);
		mdelay(1);

		reg = NCP6914_REG_GENRAL_SETTINGS;
		val = 0x04;	/*set 0000 0100   Not use DVS */
		ret = NCP6914_i2c_write(pClient, reg, val);
		if (ret < 0) {
			// TODO: TEMP DEBUG gareth.phillips
;
			return ret;
		}

		reg = NCP6914_REG_LDO1_SETTINGS;
#if (defined(CONFIG_MACH_CODINA) || defined(CONFIG_MACH_SEC_KYLE) || defined(CONFIG_MACH_SEC_GOLDEN) || defined(CONFIG_MACH_SEC_SKOMER) || defined(CONFIG_MACH_SEC_HENDRIX))
		/* set 0000 1100  LDO1 delay 0ms, 1.8V output ->
		   1.8V, 1.3M_VDD_REG */
		val = 0x0C;
#else
		/* set 0000 0110  LDO1 delay 0ms, 1.5V output ->
		   1.5V, 1.3M_VDD_REG */
		val = 0x06;
#endif
		ret = NCP6914_i2c_write(pClient, reg, val);
		if (ret < 0) {
			return ret;
		}

		reg = NCP6914_REG_LDO2_SETTINGS;
		/*set 0000 1100   LDO2 delay 4ms, 1.8V output -> 1.8V, VDDIO */
		val = 0x0C;
		ret = NCP6914_i2c_write(pClient, reg, val);
		if (ret < 0) {
			return ret;
		}

		reg = NCP6914_REG_LDO3_SETTINGS;
		/*set 0001 1001    LDO3 delay can be control by I2C,
		   2.8V output-> 2.8V, AF */
		val = 0x19;
		ret = NCP6914_i2c_write(pClient, reg, val);
		if (ret < 0) {
			return ret;
		}

		reg = NCP6914_REG_LDO4_SETTINGS;
		/*set 0001 1110    LDO4 delay 0ms, 2.8V output -> 2.8V, VDDA */
		val = 0x1E;
		ret = NCP6914_i2c_write(pClient, reg, val);
		if (ret < 0) {
			return ret;
		}

		reg = NCP6914_REG_SPARE;
		/*set 0000 0000(default)     Spare registers, no change */
		val = 0;
		ret = NCP6914_i2c_write(pClient, reg, val);
		if (ret < 0) {
			return ret;
		}

		reg = NCP6914_REG_BUCK_SETTINGS1;
		/*set 0000 1001    Buck delay 10us can be control by I2C
		   after 1.3M_STBYN go low, 1.2V output-> 5M_VDD_REG 5M 1.2V */
		val = 0x09;
		ret = NCP6914_i2c_write(pClient, reg, val);
		if (ret < 0) {
			return ret;
		}

		reg = NCP6914_REG_BUCK_SETTINGS2;
		/*set 0010 1001   forced PWM, DVS_V2 is set 1.2V */
		val = 0x29;
		ret = NCP6914_i2c_write(pClient, reg, val);
		if (ret < 0) {
			return ret;
		}

		reg = NCP6914_REG_ENABLE_BITS;
		/*set 1000 0000   Buck Output voltage is set
		   to DVS_V1, Buck disable, LDO4 disable, LDO3 disable,
		   LDO2 disable, LDO1 disable */
		val = 0x80;
		ret = NCP6914_i2c_write(pClient, reg, val);
		if (ret < 0) {
			return ret;
		}
		NCP6914_pinstate = val;

		reg = NCP6914_REG_PULLDOWN_BITS;
		/*set 1010 1111   registers content stays
		   the same as before Thermal Shutdown,
		   active discharge enable for Buck, LDO1, LDO2, LDO3,LDO4 */
		val = 0xAF;
		ret = NCP6914_i2c_write(pClient, reg, val);
		if (ret < 0) {
			return ret;
		}

		reg = NCP6914_REG_INTERRUPT_MASK;
		/*set 1111 1111    TSD interrupt masked,
		   Thermal warning interrupt masked */
		val = 0x03;
		ret = NCP6914_i2c_write(pClient, reg, val);
		if (ret < 0) {
			return ret;
		}

		gpio_set_value(gpio_power_on, 1);
	}
#else				/*for gavini */
	if (opt == 0) {
		NCP6914_pinstate = 0;
		gpio_set_value(gpio_power_on, 0);

		reg = NCP6914_REG_GENRAL_SETTINGS;
		/*set 0000 0100   Not use DVS */
		val = 0x04;
		ret = NCP6914_i2c_write(pClient, reg, val);
		if (ret < 0) {
			return ret;
		}

		reg = NCP6914_REG_LDO1_SETTINGS;
		/* set 1010 0110  LDO1 delay 6ms, 1.5V output ->
		   1.5V, 1.3M_VDD_REG */
		val = 0xA6;
		ret = NCP6914_i2c_write(pClient, reg, val);
		if (ret < 0) {
			return ret;
		}

		reg = NCP6914_REG_LDO2_SETTINGS;
		/*set 1110 1100   LDO2 delay 8ms, 1.8V output ->
		   1.8V, VDDIO */
		val = 0xEC;
		ret = NCP6914_i2c_write(pClient, reg, val);
		if (ret < 0) {
			return ret;
		}

		reg = NCP6914_REG_LDO3_SETTINGS;
		/*set 0001 1001    LDO3 delay can be control by I2C,
		   2.8V output-> 2.8V, AF */
		val = 0x19;
		ret = NCP6914_i2c_write(pClient, reg, val);
		if (ret < 0) {
			return ret;
		}

		reg = NCP6914_REG_LDO4_SETTINGS;
		/*set 0111 1110    LDO4 delay 4ms, 2.8V output -> 2.8V, VDDA  */
		val = 0x7E;
		ret = NCP6914_i2c_write(pClient, reg, val);
		if (ret < 0) {
			return ret;
		}

		reg = NCP6914_REG_SPARE;
		/*set 0000 0000(default)     Spare registers, no change */
		val = 0;
		ret = NCP6914_i2c_write(pClient, reg, val);
		if (ret < 0)
			return ret;

		reg = NCP6914_REG_BUCK_SETTINGS1;
		/*set 0010 1001    Buck delay 2ms, 1.2V output->
		   5M_VDD_REG 5M 1.2V */
		val = 0x29;
		ret = NCP6914_i2c_write(pClient, reg, val);
		if (ret < 0)
			return ret;

		reg = NCP6914_REG_BUCK_SETTINGS2;
		/*set 0010 1001   forced PWM, DVS_V2 is set 1.2V */
		val = 0x29;
		ret = NCP6914_i2c_write(pClient, reg, val);
		if (ret < 0)
			return ret;

		reg = NCP6914_REG_ENABLE_BITS;
		/*set 1100 1011   Buck Output voltage is set to DVS_V1,
		   Buck enable, LDO4 enable, LDO3 disable, LDO2 enable,
		   LDO1 enable */
		val = 0xCB;
		ret = NCP6914_i2c_write(pClient, reg, val);
		if (ret < 0)
			return ret;
		NCP6914_pinstate = val;

		reg = NCP6914_REG_PULLDOWN_BITS;
		/*set 1010 1111   registers content stays the same
		   as before Thermal Shutdown,  active discharge enable
		   for Buck, LDO1, LDO2, LDO3,LDO4  */
		val = 0xAF;
		ret = NCP6914_i2c_write(pClient, reg, val);
		if (ret < 0)
			return ret;

		reg = NCP6914_REG_INTERRUPT_MASK;
		/*set 1111 1111    TSD interrupt masked,
		   Thermal warning interrupt masked */
		val = 0x03;
		ret = NCP6914_i2c_write(pClient, reg, val);
		if (ret < 0)
			return ret;

		gpio_set_value(gpio_power_on, 1);
	}

	if (opt == 1) {

		reg = NCP6914_REG_ENABLE_BITS;
		/*set 1010 1111   LDO3 enabled by I2C for AF */
		val = 0xAF;
		ret = NCP6914_i2c_write(pClient, reg, val);
		if (ret < 0)
			return ret;

		NCP6914_pinstate = val;
	}
#endif

	// TODO: TEMP DEBUG gareth.phillips
;

	return ret;
}
Exemple #14
0
int mp_init(struct mp_params *p)
{
	int num_aps;
	atomic_t *ap_count;
	struct udevice *cpu;
	int ret;

	/* This will cause the CPUs devices to be bound */
	struct uclass *uc;
	ret = uclass_get(UCLASS_CPU, &uc);
	if (ret)
		return ret;

#ifdef CONFIG_QFW
	ret = qemu_cpu_fixup();
	if (ret)
		return ret;
#endif

	ret = init_bsp(&cpu);
	if (ret) {
		debug("Cannot init boot CPU: err=%d\n", ret);
		return ret;
	}

	if (p == NULL || p->flight_plan == NULL || p->num_records < 1) {
		printf("Invalid MP parameters\n");
		return -1;
	}

	num_cpus = cpu_get_count(cpu);
	if (num_cpus < 0) {
		debug("Cannot get number of CPUs: err=%d\n", num_cpus);
		return num_cpus;
	}

	if (num_cpus < 2)
		debug("Warning: Only 1 CPU is detected\n");

	ret = check_cpu_devices(num_cpus);
	if (ret)
		debug("Warning: Device tree does not describe all CPUs. Extra ones will not be started correctly\n");

	/* Copy needed parameters so that APs have a reference to the plan */
	mp_info.num_records = p->num_records;
	mp_info.records = p->flight_plan;

	/* Load the SIPI vector */
	ret = load_sipi_vector(&ap_count, num_cpus);
	if (ap_count == NULL)
		return -1;

	/*
	 * Make sure SIPI data hits RAM so the APs that come up will see
	 * the startup code even if the caches are disabled
	 */
	wbinvd();

	/* Start the APs providing number of APs and the cpus_entered field */
	num_aps = num_cpus - 1;
	ret = start_aps(num_aps, ap_count);
	if (ret) {
		mdelay(1000);
		debug("%d/%d eventually checked in?\n", atomic_read(ap_count),
		      num_aps);
		return ret;
	}

	/* Walk the flight plan for the BSP */
	ret = bsp_do_flight_plan(cpu, p);
	if (ret) {
		debug("CPU init failed: err=%d\n", ret);
		return ret;
	}

	return 0;
}
Exemple #15
0
static void sunxi_mode_set(const struct ctfb_res_modes *mode,
			   unsigned int address)
{
	int __maybe_unused clk_div, clk_double;
	struct sunxi_lcdc_reg * const lcdc =
		(struct sunxi_lcdc_reg *)SUNXI_LCD0_BASE;
	struct sunxi_tve_reg * __maybe_unused const tve =
		(struct sunxi_tve_reg *)SUNXI_TVE0_BASE;

	switch (sunxi_display.monitor) {
	case sunxi_monitor_none:
		break;
	case sunxi_monitor_dvi:
	case sunxi_monitor_hdmi:
#ifdef CONFIG_VIDEO_HDMI
		sunxi_composer_mode_set(mode, address);
		sunxi_lcdc_tcon1_mode_set(mode, &clk_div, &clk_double, 0);
		sunxi_hdmi_mode_set(mode, clk_div, clk_double);
		sunxi_composer_enable();
		lcdc_enable(lcdc, sunxi_display.depth);
		sunxi_hdmi_enable();
#endif
		break;
	case sunxi_monitor_lcd:
		sunxi_lcdc_panel_enable();
		if (IS_ENABLED(CONFIG_VIDEO_LCD_PANEL_EDP_4_LANE_1620M_VIA_ANX9804)) {
			/*
			 * The anx9804 needs 1.8V from eldo3, we do this here
			 * and not via CONFIG_AXP_ELDO3_VOLT from board_init()
			 * to avoid turning this on when using hdmi output.
			 */
			axp_set_eldo(3, 1800);
			anx9804_init(CONFIG_VIDEO_LCD_I2C_BUS, 4,
				     ANX9804_DATA_RATE_1620M,
				     sunxi_display.depth);
		}
		if (IS_ENABLED(CONFIG_VIDEO_LCD_HITACHI_TX18D42VM)) {
			mdelay(50); /* Wait for lcd controller power on */
			hitachi_tx18d42vm_init();
		}
		if (IS_ENABLED(CONFIG_VIDEO_LCD_TL059WV5C0)) {
			unsigned int orig_i2c_bus = i2c_get_bus_num();
			i2c_set_bus_num(CONFIG_VIDEO_LCD_I2C_BUS);
			i2c_reg_write(0x5c, 0x04, 0x42); /* Turn on the LCD */
			i2c_set_bus_num(orig_i2c_bus);
		}
		sunxi_composer_mode_set(mode, address);
		sunxi_lcdc_tcon0_mode_set(mode, false);
		sunxi_composer_enable();
		lcdc_enable(lcdc, sunxi_display.depth);
#ifdef CONFIG_VIDEO_LCD_SSD2828
		sunxi_ssd2828_init(mode);
#endif
		sunxi_lcdc_backlight_enable();
		break;
	case sunxi_monitor_vga:
#ifdef CONFIG_VIDEO_VGA
		sunxi_composer_mode_set(mode, address);
		sunxi_lcdc_tcon1_mode_set(mode, &clk_div, &clk_double, 1);
		sunxi_tvencoder_mode_set();
		sunxi_composer_enable();
		lcdc_enable(lcdc, sunxi_display.depth);
		tvencoder_enable(tve);
#elif defined CONFIG_VIDEO_VGA_VIA_LCD
		sunxi_composer_mode_set(mode, address);
		sunxi_lcdc_tcon0_mode_set(mode, true);
		sunxi_composer_enable();
		lcdc_enable(lcdc, sunxi_display.depth);
		sunxi_vga_external_dac_enable();
#endif
		break;
	case sunxi_monitor_composite_pal:
	case sunxi_monitor_composite_ntsc:
	case sunxi_monitor_composite_pal_m:
	case sunxi_monitor_composite_pal_nc:
#ifdef CONFIG_VIDEO_COMPOSITE
		sunxi_composer_mode_set(mode, address);
		sunxi_lcdc_tcon1_mode_set(mode, &clk_div, &clk_double, 0);
		sunxi_tvencoder_mode_set();
		sunxi_composer_enable();
		lcdc_enable(lcdc, sunxi_display.depth);
		tvencoder_enable(tve);
#endif
		break;
	}
}
Exemple #16
0
void radeon_test_ring_sync(struct radeon_device *rdev,
			   struct radeon_ring *ringA,
			   struct radeon_ring *ringB)
{
	struct radeon_fence *fence1 = NULL, *fence2 = NULL;
	struct radeon_semaphore *semaphore = NULL;
	int r;

	r = radeon_semaphore_create(rdev, &semaphore);
	if (r) {
		DRM_ERROR("Failed to create semaphore\n");
		goto out_cleanup;
	}

	r = radeon_ring_lock(rdev, ringA, 64);
	if (r) {
		DRM_ERROR("Failed to lock ring A %d\n", ringA->idx);
		goto out_cleanup;
	}
	radeon_semaphore_emit_wait(rdev, ringA->idx, semaphore);
	r = radeon_fence_emit(rdev, &fence1, ringA->idx);
	if (r) {
		DRM_ERROR("Failed to emit fence 1\n");
		radeon_ring_unlock_undo(rdev, ringA);
		goto out_cleanup;
	}
	radeon_semaphore_emit_wait(rdev, ringA->idx, semaphore);
	r = radeon_fence_emit(rdev, &fence2, ringA->idx);
	if (r) {
		DRM_ERROR("Failed to emit fence 2\n");
		radeon_ring_unlock_undo(rdev, ringA);
		goto out_cleanup;
	}
	radeon_ring_unlock_commit(rdev, ringA);

	mdelay(1000);

	if (radeon_fence_signaled(fence1)) {
		DRM_ERROR("Fence 1 signaled without waiting for semaphore.\n");
		goto out_cleanup;
	}

	r = radeon_ring_lock(rdev, ringB, 64);
	if (r) {
		DRM_ERROR("Failed to lock ring B %p\n", ringB);
		goto out_cleanup;
	}
	radeon_semaphore_emit_signal(rdev, ringB->idx, semaphore);
	radeon_ring_unlock_commit(rdev, ringB);

	r = radeon_fence_wait(fence1, false);
	if (r) {
		DRM_ERROR("Failed to wait for sync fence 1\n");
		goto out_cleanup;
	}

	mdelay(1000);

	if (radeon_fence_signaled(fence2)) {
		DRM_ERROR("Fence 2 signaled without waiting for semaphore.\n");
		goto out_cleanup;
	}

	r = radeon_ring_lock(rdev, ringB, 64);
	if (r) {
		DRM_ERROR("Failed to lock ring B %p\n", ringB);
		goto out_cleanup;
	}
	radeon_semaphore_emit_signal(rdev, ringB->idx, semaphore);
	radeon_ring_unlock_commit(rdev, ringB);

	r = radeon_fence_wait(fence2, false);
	if (r) {
		DRM_ERROR("Failed to wait for sync fence 1\n");
		goto out_cleanup;
	}

out_cleanup:
	radeon_semaphore_free(rdev, &semaphore, NULL);

	if (fence1)
		radeon_fence_unref(&fence1);

	if (fence2)
		radeon_fence_unref(&fence2);

	if (r)
		printk(KERN_WARNING "Error while testing ring sync (%d).\n", r);
}
Exemple #17
0
static int ehci_mxc_drv_probe(struct platform_device *pdev)
{
	struct mxc_usbh_platform_data *pdata = pdev->dev.platform_data;
	struct usb_hcd *hcd;
	struct resource *res;
	int irq, ret, temp;
	struct ehci_mxc_priv *priv;
	struct device *dev = &pdev->dev;

	dev_info(&pdev->dev, "initializing i.MX USB Controller\n");

	if (!pdata) {
		dev_err(dev, "No platform data given, bailing out.\n");
		return -EINVAL;
	}

	irq = platform_get_irq(pdev, 0);

	hcd = usb_create_hcd(&ehci_mxc_hc_driver, dev, dev_name(dev));
	if (!hcd)
		return -ENOMEM;

	priv = kzalloc(sizeof(*priv), GFP_KERNEL);
	if (!priv) {
		ret = -ENOMEM;
		goto err_alloc;
	}

	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	if (!res) {
		dev_err(dev, "Found HC with no register addr. Check setup!\n");
		ret = -ENODEV;
		goto err_get_resource;
	}

	hcd->rsrc_start = res->start;
	hcd->rsrc_len = resource_size(res);

	if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) {
		dev_dbg(dev, "controller already in use\n");
		ret = -EBUSY;
		goto err_request_mem;
	}

	hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len);
	if (!hcd->regs) {
		dev_err(dev, "error mapping memory\n");
		ret = -EFAULT;
		goto err_ioremap;
	}

	/* call platform specific init function */
	if (pdata->init) {
		ret = pdata->init(pdev);
		if (ret) {
			dev_err(dev, "platform init failed\n");
			goto err_init;
		}
		/* platforms need some time to settle changed IO settings */
		mdelay(10);
	}

	/* enable clocks */
	priv->usbclk = clk_get(dev, "usb");
	if (IS_ERR(priv->usbclk)) {
		ret = PTR_ERR(priv->usbclk);
		goto err_clk;
	}
	clk_enable(priv->usbclk);

	if (!cpu_is_mx35()) {
		priv->ahbclk = clk_get(dev, "usb_ahb");
		if (IS_ERR(priv->ahbclk)) {
			ret = PTR_ERR(priv->ahbclk);
			goto err_clk_ahb;
		}
		clk_enable(priv->ahbclk);
	}

	/* set USBMODE to host mode */
	temp = readl(hcd->regs + USBMODE_OFFSET);
	writel(temp | USBMODE_CM_HOST, hcd->regs + USBMODE_OFFSET);

	/* set up the PORTSCx register */
	writel(pdata->portsc, hcd->regs + PORTSC_OFFSET);
	mdelay(10);

	/* setup specific usb hw */
	ret = mxc_initialize_usb_hw(pdev->id, pdata->flags);
	if (ret < 0)
		goto err_init;

	/* Initialize the transceiver */
	if (pdata->otg) {
		pdata->otg->io_priv = hcd->regs + ULPI_VIEWPORT_OFFSET;
		ret = otg_init(pdata->otg);
		if (ret) {
			dev_err(dev, "unable to init transceiver, probably missing\n");
			ret = -ENODEV;
			goto err_add;
		}
		ret = otg_set_vbus(pdata->otg, 1);
		if (ret) {
			dev_err(dev, "unable to enable vbus on transceiver\n");
			goto err_add;
		}
	}

	priv->hcd = hcd;
	platform_set_drvdata(pdev, priv);

	ret = usb_add_hcd(hcd, irq, IRQF_DISABLED | IRQF_SHARED);
	if (ret)
		goto err_add;

	return 0;

err_add:
	if (pdata && pdata->exit)
		pdata->exit(pdev);
err_init:
	if (priv->ahbclk) {
		clk_disable(priv->ahbclk);
		clk_put(priv->ahbclk);
	}
err_clk_ahb:
	clk_disable(priv->usbclk);
	clk_put(priv->usbclk);
err_clk:
	iounmap(hcd->regs);
err_ioremap:
	release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
err_request_mem:
err_get_resource:
	kfree(priv);
err_alloc:
	usb_put_hcd(hcd);
	return ret;
}
Exemple #18
0
static void radeon_test_ring_sync2(struct radeon_device *rdev,
			    struct radeon_ring *ringA,
			    struct radeon_ring *ringB,
			    struct radeon_ring *ringC)
{
	struct radeon_fence *fenceA = NULL, *fenceB = NULL;
	struct radeon_semaphore *semaphore = NULL;
	bool sigA, sigB;
	int i, r;

	r = radeon_semaphore_create(rdev, &semaphore);
	if (r) {
		DRM_ERROR("Failed to create semaphore\n");
		goto out_cleanup;
	}

	r = radeon_ring_lock(rdev, ringA, 64);
	if (r) {
		DRM_ERROR("Failed to lock ring A %d\n", ringA->idx);
		goto out_cleanup;
	}
	radeon_semaphore_emit_wait(rdev, ringA->idx, semaphore);
	r = radeon_fence_emit(rdev, &fenceA, ringA->idx);
	if (r) {
		DRM_ERROR("Failed to emit sync fence 1\n");
		radeon_ring_unlock_undo(rdev, ringA);
		goto out_cleanup;
	}
	radeon_ring_unlock_commit(rdev, ringA);

	r = radeon_ring_lock(rdev, ringB, 64);
	if (r) {
		DRM_ERROR("Failed to lock ring B %d\n", ringB->idx);
		goto out_cleanup;
	}
	radeon_semaphore_emit_wait(rdev, ringB->idx, semaphore);
	r = radeon_fence_emit(rdev, &fenceB, ringB->idx);
	if (r) {
		DRM_ERROR("Failed to create sync fence 2\n");
		radeon_ring_unlock_undo(rdev, ringB);
		goto out_cleanup;
	}
	radeon_ring_unlock_commit(rdev, ringB);

	mdelay(1000);

	if (radeon_fence_signaled(fenceA)) {
		DRM_ERROR("Fence A signaled without waiting for semaphore.\n");
		goto out_cleanup;
	}
	if (radeon_fence_signaled(fenceB)) {
		DRM_ERROR("Fence A signaled without waiting for semaphore.\n");
		goto out_cleanup;
	}

	r = radeon_ring_lock(rdev, ringC, 64);
	if (r) {
		DRM_ERROR("Failed to lock ring B %p\n", ringC);
		goto out_cleanup;
	}
	radeon_semaphore_emit_signal(rdev, ringC->idx, semaphore);
	radeon_ring_unlock_commit(rdev, ringC);

	for (i = 0; i < 30; ++i) {
		mdelay(100);
		sigA = radeon_fence_signaled(fenceA);
		sigB = radeon_fence_signaled(fenceB);
		if (sigA || sigB)
			break;
	}

	if (!sigA && !sigB) {
		DRM_ERROR("Neither fence A nor B has been signaled\n");
		goto out_cleanup;
	} else if (sigA && sigB) {
		DRM_ERROR("Both fence A and B has been signaled\n");
		goto out_cleanup;
	}

	DRM_INFO("Fence %c was first signaled\n", sigA ? 'A' : 'B');

	r = radeon_ring_lock(rdev, ringC, 64);
	if (r) {
		DRM_ERROR("Failed to lock ring B %p\n", ringC);
		goto out_cleanup;
	}
	radeon_semaphore_emit_signal(rdev, ringC->idx, semaphore);
	radeon_ring_unlock_commit(rdev, ringC);

	mdelay(1000);

	r = radeon_fence_wait(fenceA, false);
	if (r) {
		DRM_ERROR("Failed to wait for sync fence A\n");
		goto out_cleanup;
	}
	r = radeon_fence_wait(fenceB, false);
	if (r) {
		DRM_ERROR("Failed to wait for sync fence B\n");
		goto out_cleanup;
	}

out_cleanup:
	radeon_semaphore_free(rdev, &semaphore, NULL);

	if (fenceA)
		radeon_fence_unref(&fenceA);

	if (fenceB)
		radeon_fence_unref(&fenceB);

	if (r)
		printk(KERN_WARNING "Error while testing ring sync (%d).\n", r);
}
void kfm701a21_1a_panel_display_on(void)
{
	mdelay(120);
	serial_puts_info("kfm701a21_1a panel display on\n");
}
int bcm_hsotgctrl_phy_init(bool id_device)
{
	int val;
	int rc=0;
	struct bcm_hsotgctrl_drv_data *bcm_hsotgctrl_handle =
		local_hsotgctrl_handle;

	if (NULL == local_hsotgctrl_handle)
		return -ENODEV;

	if ((!bcm_hsotgctrl_handle->otg_clk) ||
		  (!bcm_hsotgctrl_handle->hsotg_ctrl_base) ||
		  (!bcm_hsotgctrl_handle->dev))
		return -EIO;

	bcm_hsotgctrl_handle->usb_active = true;
	rc = bcm_hsotgctrl_en_clock(true);
	if(rc){
		printk("%s-Fail to Enable CLK\n",__func__);
		return -EBUSY;
	}
	
	
	mdelay(HSOTGCTRL_STEP_DELAY_IN_MS);
	/* clear bit 15 RDB error */
	val = readl(bcm_hsotgctrl_handle->hsotg_ctrl_base +
		HSOTG_CTRL_PHY_P1CTL_OFFSET);
	val &= ~HSOTG_CTRL_PHY_P1CTL_USB11_OEB_IS_TXEB_MASK;
	writel(val, bcm_hsotgctrl_handle->hsotg_ctrl_base +
			HSOTG_CTRL_PHY_P1CTL_OFFSET);

	mdelay(HSOTGCTRL_STEP_DELAY_IN_MS);

	/* Enable software control of PHY-PM */
	bcm_hsotgctrl_set_soft_ldo_pwrdn(true);

	/* Put PHY in reset state */
	bcm_hsotgctrl_set_phy_resetb(false);

	/* Reset PHY and AHB clock domain */
	bcm_hsotgctrl_reset_clk_domain();

	/* Power up ALDO */
	bcm_hsotgctrl_set_aldo_pdn(true);
	mdelay(PHY_PM_DELAY_IN_MS);

	/* Enable pad, internal PLL etc */
	bcm_hsotgctrl_set_phy_off(false);

	bcm_hsotgctrl_set_ldo_suspend_mask();

	/* Remove PHY isolation */
	bcm_hsotgctrl_set_phy_iso(false);
	mdelay(PHY_PM_DELAY_IN_MS);

	/* PHY clock request */
	bcm_hsotgctrl_set_phy_clk_request(true);
	mdelay(PHY_PLL_DELAY_MS);

	/* Bring Put PHY out of reset state */
	bcm_hsotgctrl_set_phy_resetb(true);

	/* Don't disable software control of PHY-PM
	 * We want to control the PHY LDOs from software
	 */
	bcm_hsotgctrl_phy_mdio_initialization();

	if (id_device) {
		/* Set correct ID value */
		bcm_hsotgctrl_phy_set_id_stat(true);

		/* Set Vbus valid state */
		bcm_hsotgctrl_phy_set_vbus_stat(true);
	} else {
		/* Set correct ID value */
		bcm_hsotgctrl_phy_set_id_stat(false);
		/* Clear non-driving */
		bcm_hsotgctrl_phy_set_non_driving(false);
	}

	msleep(HSOTGCTRL_ID_CHANGE_DELAY_IN_MS);

	return 0;

}
int PIPEnsControlIn(
     PSDevice     pDevice,
     BYTE         byRequest,
     WORD         wValue,
     WORD         wIndex,
     WORD         wLength,
       PBYTE   pbyBuffer
    )
{
	int ntStatus = 0;
    int ii;

    if (pDevice->Flags & fMP_DISCONNECTED)
        return STATUS_FAILURE;

    if (pDevice->Flags & fMP_CONTROL_READS)
	return STATUS_FAILURE;

	if (pDevice->Flags & fMP_CONTROL_WRITES)
		return STATUS_FAILURE;

	MP_SET_FLAG(pDevice, fMP_CONTROL_READS);

	pDevice->sUsbCtlRequest.bRequestType = 0xC0;
	pDevice->sUsbCtlRequest.bRequest = byRequest;
	pDevice->sUsbCtlRequest.wValue = cpu_to_le16p(&wValue);
	pDevice->sUsbCtlRequest.wIndex = cpu_to_le16p(&wIndex);
	pDevice->sUsbCtlRequest.wLength = cpu_to_le16p(&wLength);
	pDevice->pControlURB->transfer_flags |= URB_ASYNC_UNLINK;
    pDevice->pControlURB->actual_length = 0;
	usb_fill_control_urb(pDevice->pControlURB, pDevice->usb,
			 usb_rcvctrlpipe(pDevice->usb , 0), (char *) &pDevice->sUsbCtlRequest,
			 pbyBuffer, wLength, s_nsControlInUsbIoCompleteRead, pDevice);

	ntStatus = usb_submit_urb(pDevice->pControlURB, GFP_ATOMIC);
	if (ntStatus != 0) {
		DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO
			"control request submission failed: %d\n", ntStatus);
		MP_CLEAR_FLAG(pDevice, fMP_CONTROL_READS);
		return STATUS_FAILURE;
	}

	spin_unlock_irq(&pDevice->lock);
    for (ii = 0; ii <= USB_CTL_WAIT; ii ++) {

	if (pDevice->Flags & fMP_CONTROL_READS)
		mdelay(1);
	else
		break;

	if (ii >= USB_CTL_WAIT) {
		DBG_PRT(MSG_LEVEL_DEBUG,
			KERN_INFO "control rcv request submission timeout\n");
            spin_lock_irq(&pDevice->lock);
            MP_CLEAR_FLAG(pDevice, fMP_CONTROL_READS);
            return STATUS_FAILURE;
        }
    }
	spin_lock_irq(&pDevice->lock);

    return ntStatus;
}
static int __devinit bcm_hsotgctrl_probe(struct platform_device *pdev)
{
	int error = 0;
	int val;
	struct bcm_hsotgctrl_drv_data *hsotgctrl_drvdata;
	struct bcm_hsotgctrl_platform_data *plat_data =
	  (struct bcm_hsotgctrl_platform_data *)pdev->dev.platform_data;

	if (plat_data == NULL) {
		dev_err(&pdev->dev, "platform_data failed\n");
		return -ENODEV;
	}

	hsotgctrl_drvdata = kzalloc(sizeof(*hsotgctrl_drvdata), GFP_KERNEL);
	if (!hsotgctrl_drvdata) {
		dev_warn(&pdev->dev, "Memory allocation failed\n");
		return -ENOMEM;
	}

	local_hsotgctrl_handle = hsotgctrl_drvdata;

	hsotgctrl_drvdata->hsotg_ctrl_base =
		(void *)plat_data->hsotgctrl_virtual_mem_base;
	if (!hsotgctrl_drvdata->hsotg_ctrl_base) {
		dev_warn(&pdev->dev, "No vaddr for HSOTGCTRL!\n");
		kfree(hsotgctrl_drvdata);
		return -ENOMEM;
	}

	hsotgctrl_drvdata->chipregs_base =
		(void *)plat_data->chipreg_virtual_mem_base;
	if (!hsotgctrl_drvdata->chipregs_base) {
		dev_warn(&pdev->dev, "No vaddr for CHIPREG!\n");
		kfree(hsotgctrl_drvdata);
		return -ENOMEM;
	}

	hsotgctrl_drvdata->dev = &pdev->dev;
	hsotgctrl_drvdata->otg_clk = clk_get(NULL,
		plat_data->usb_ahb_clk_name);

	if (IS_ERR(hsotgctrl_drvdata->otg_clk)) {
		error = PTR_ERR(hsotgctrl_drvdata->otg_clk);
		dev_warn(&pdev->dev, "OTG clock allocation failed\n");
		kfree(hsotgctrl_drvdata);
		return error;
	}

	hsotgctrl_drvdata->mdio_master_clk = clk_get(NULL,
		plat_data->mdio_mstr_clk_name);

	if (IS_ERR(hsotgctrl_drvdata->mdio_master_clk)) {
		error = PTR_ERR(hsotgctrl_drvdata->mdio_master_clk);
		dev_warn(&pdev->dev, "MDIO Mst clk alloc failed\n");
		kfree(hsotgctrl_drvdata);
		return error;
	}

	hsotgctrl_drvdata->allow_suspend = true;
	platform_set_drvdata(pdev, hsotgctrl_drvdata);

	/* Init the PHY */
	hsotgctrl_drvdata->usb_active = true;
	bcm_hsotgctrl_en_clock(true);

	mdelay(HSOTGCTRL_STEP_DELAY_IN_MS);

	/* clear bit 15 RDB error */
	val = readl(hsotgctrl_drvdata->hsotg_ctrl_base +
			HSOTG_CTRL_PHY_P1CTL_OFFSET);
	val &= ~HSOTG_CTRL_PHY_P1CTL_USB11_OEB_IS_TXEB_MASK;
	writel(val, hsotgctrl_drvdata->hsotg_ctrl_base +
			HSOTG_CTRL_PHY_P1CTL_OFFSET);
	mdelay(HSOTGCTRL_STEP_DELAY_IN_MS);

	/* S/W reset Phy, active low */
	val = readl(hsotgctrl_drvdata->hsotg_ctrl_base +
			HSOTG_CTRL_PHY_P1CTL_OFFSET);
	val &= ~HSOTG_CTRL_PHY_P1CTL_SOFT_RESET_MASK;
	writel(val, hsotgctrl_drvdata->hsotg_ctrl_base +
			HSOTG_CTRL_PHY_P1CTL_OFFSET);

	mdelay(HSOTGCTRL_STEP_DELAY_IN_MS);

	/* bring Phy out of reset */
	val = readl(hsotgctrl_drvdata->hsotg_ctrl_base +
			HSOTG_CTRL_PHY_P1CTL_OFFSET);
	val &= ~HSOTG_CTRL_PHY_P1CTL_PHY_MODE_MASK;
	val |= HSOTG_CTRL_PHY_P1CTL_SOFT_RESET_MASK;
	/* use OTG mode */
	val |= PHY_MODE_OTG << HSOTG_CTRL_PHY_P1CTL_PHY_MODE_SHIFT;
	writel(val, hsotgctrl_drvdata->hsotg_ctrl_base +
		HSOTG_CTRL_PHY_P1CTL_OFFSET);

	mdelay(HSOTGCTRL_STEP_DELAY_IN_MS);

	/* Enable pad, internal PLL etc */
	bcm_hsotgctrl_set_phy_off(false);

	mdelay(HSOTGCTRL_STEP_DELAY_IN_MS);

	/*Come up as device until we check PMU ID status
	 * to avoid turning on Vbus before checking
	 */
	val =	HSOTG_CTRL_USBOTGCONTROL_OTGSTAT_CTRL_MASK |
			HSOTG_CTRL_USBOTGCONTROL_UTMIOTG_IDDIG_SW_MASK |
			HSOTG_CTRL_USBOTGCONTROL_USB_HCLK_EN_DIRECT_MASK |
			HSOTG_CTRL_USBOTGCONTROL_USB_ON_IS_HCLK_EN_MASK |
			HSOTG_CTRL_USBOTGCONTROL_USB_ON_MASK |
			HSOTG_CTRL_USBOTGCONTROL_PRST_N_SW_MASK |
			HSOTG_CTRL_USBOTGCONTROL_HRESET_N_SW_MASK;

	writel(val, hsotgctrl_drvdata->hsotg_ctrl_base +
			HSOTG_CTRL_USBOTGCONTROL_OFFSET);

	mdelay(HSOTGCTRL_STEP_DELAY_IN_MS);

	error = device_create_file(&pdev->dev, &dev_attr_hsotgctrldump);

	if (error) {
		dev_warn(&pdev->dev, "Failed to create HOST file\n");
		goto Error_bcm_hsotgctrl_probe;
	}


#ifndef CONFIG_USB_OTG_UTILS
	/* Clear non-driving as default in case there
	 * is no transceiver hookup */
	bcm_hsotgctrl_phy_set_non_driving(false);
#endif

#ifdef CONFIG_NOP_USB_XCEIV
	/* Clear non-driving as default in case there
	 * is no transceiver hookup */
	bcm_hsotgctrl_phy_set_non_driving(false);
#endif

	pm_runtime_set_active(&pdev->dev);
	pm_runtime_enable(&pdev->dev);

	hsotgctrl_drvdata->hsotgctrl_irq = platform_get_irq(pdev, 0);

	/* Create a work queue for wakeup work items */
	hsotgctrl_drvdata->bcm_hsotgctrl_work_queue =
		create_workqueue("bcm_hsotgctrl_events");

	if (hsotgctrl_drvdata->bcm_hsotgctrl_work_queue == NULL) {
		dev_warn(&pdev->dev,
			 "BCM HSOTGCTRL events work queue creation failed\n");
		/* Treat this as non-fatal error */
	}

	INIT_DELAYED_WORK(&hsotgctrl_drvdata->wakeup_work,
			  bcm_hsotgctrl_delayed_wakeup_handler);

	/* request_irq enables irq */
	hsotgctrl_drvdata->irq_enabled = true;
	error = request_irq(hsotgctrl_drvdata->hsotgctrl_irq,
			bcm_hsotgctrl_wake_irq,
			IRQF_TRIGGER_HIGH | IRQF_NO_SUSPEND,
			"bcm_hsotgctrl", (void *)hsotgctrl_drvdata);
	if (error) {
		hsotgctrl_drvdata->irq_enabled = false;
		hsotgctrl_drvdata->hsotgctrl_irq = 0;
		dev_warn(&pdev->dev, "Failed to request IRQ for wakeup\n");
	}

	local_wakeup_core_cb = NULL;
	return 0;

Error_bcm_hsotgctrl_probe:
	clk_put(hsotgctrl_drvdata->otg_clk);
	clk_put(hsotgctrl_drvdata->mdio_master_clk);
	kfree(hsotgctrl_drvdata);
	return error;
}
Exemple #23
0
static int gp2a_opt_probe(struct i2c_client *client,
			 const struct i2c_device_id *id)
{
	int err = 0;
	int i;
#if USE_INTERRUPT
	int irq;
#endif
	int config;
    int ret;
	int a;

	struct gp2a_data *gp2a;
#ifdef STM_DEBUG
	printk(KERN_INFO "%s\n",__FUNCTION__);
#endif


#if defined(CONFIG_MACH_VASTO)
	vreg_proximity = vreg_get(NULL, "vcama");
	ret = vreg_set_level(vreg_proximity, 3000); // 2800 -> 3000 H/W requeset
	if (ret) {
		printk(KERN_ERR "%s: vreg set level failed (%d)\n", __func__, ret);
		return -EIO;
	}

	ret = vreg_enable(vreg_proximity);
	if (ret) {
		printk(KERN_ERR "%s: vreg enable failed (%d)\n", __func__, ret);
		return -EIO;
	}
#else  
	if( board_hw_revision < 3 )
	{
		vreg_proximity = vreg_get(0, "vcama");
		if (IS_ERR(vreg_proximity))
		{	
			printk("===== [PROXIMITY] proximity IS_ERR TEST =====\n");
			return PTR_ERR(vreg_proximity);
		}
	
	vreg_set_level(vreg_proximity, 12); // set to 3.0V voltage 
		vreg_enable(vreg_proximity); // voltage 
	}
	else
	{
		gpio_set_value(VIR_LED_EN, 1);
	}
#endif
	if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
	{
		printk(KERN_INFO "[GP2A] i2c_check_functionality error\n");
		err = -ENODEV;
		goto exit;
	}
	if ( !i2c_check_functionality(client->adapter,I2C_FUNC_SMBUS_BYTE_DATA) ) {
		printk(KERN_INFO "[GP2A] byte op is not permited.\n");
		goto exit;
	}

	/* OK. For now, we presume we have a valid client. We now create the
	client structure, even though we cannot fill it completely yet. */
	if (!(gp2a = kzalloc(sizeof(struct gp2a_data), GFP_KERNEL)))
	{
		err = -ENOMEM;
		goto exit;
	}
	memset(gp2a, 0, sizeof(struct gp2a_data));
	gp2a->client = client;
	i2c_set_clientdata(client, gp2a);

	opt_i2c_client = client;

	if (i2c_smbus_read_byte(client) < 0)
	{
		printk(KERN_ERR "[GP2A] i2c_smbus_read_byte error!!\n");
		goto exit_kfree;
	}
	else
	{
		printk("GP2A Device detected!\n");
	}

	printk("[%s] slave addr = %x\n", __func__, client->addr);
	
	/* Input device Settings */
	if(USE_INPUT_DEVICE)
	{
		gp2a->input_dev = input_allocate_device();
		if (gp2a->input_dev == NULL) 
		{
			pr_err("Failed to allocate input device\n");
			return -ENOMEM;
		}
		gp2a->input_dev->name = "proximity";
	
		set_bit(EV_SYN,gp2a->input_dev->evbit);
		set_bit(EV_ABS,gp2a->input_dev->evbit);
		
 	       input_set_abs_params(gp2a->input_dev, ABS_DISTANCE, 0, 1, 0, 0);
		
	
		err = input_register_device(gp2a->input_dev);
		if (err) 
		{
			pr_err("Unable to register %s input device\n", gp2a->input_dev->name);
			input_free_device(gp2a->input_dev);
			kfree(gp2a);
			return -1;
		}

	}

#if USE_INTERRUPT
	/* WORK QUEUE Settings */
	gp2a_wq = create_singlethread_workqueue("gp2a_wq");
	if (!gp2a_wq)
		return -ENOMEM;
	INIT_WORK(&gp2a->work_prox, gp2a_work_func_prox);
	gprintk("Workqueue Settings complete\n");
#endif

	/* misc device Settings */
	err = misc_register(&proximity_device);
	if(err) {
		pr_err(KERN_ERR "misc_register failed - prox \n");
	}

	/* wake lock init */
	wake_lock_init(&prx_wake_lock, WAKE_LOCK_SUSPEND, "prx_wake_lock");

	/* set sysfs for light sensor */
	proxsensor_class = class_create(THIS_MODULE, "proxsensor");
	if (IS_ERR(proxsensor_class))
		pr_err("Failed to create class(proxsensor)!\n");

	switch_cmd_dev = device_create(proxsensor_class, NULL, 0, NULL, "switch_cmd");	
	if (device_create_file(switch_cmd_dev, &dev_attr_proxsensor_file_state) < 0)
		pr_err("Failed to create device file(%s)!\n", dev_attr_proxsensor_file_state.attr.name);
	
	dev_set_drvdata(switch_cmd_dev,gp2a);
	
	/* ktime init */

	timeA = ktime_set(0,0);
	timeB = ktime_set(0,0);
	
	/* gpio config */ // set in board file
	config = GPIO_CFG(GPIO_SENSE_OUT, 0, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA);
	err = gpio_tlmm_config(config, GPIO_CFG_ENABLE);
	if (err) 
		printk(KERN_ERR "%s: gpio_tlmm_config(%#x)=%d\n", __func__, GPIO_SENSE_OUT, err);

//for(a = 0; a < 10 ; a++)
//{
	/* GP2A Regs INIT SETTINGS */
	for(i=1;i<5;i++)
	{
		opt_i2c_write((u8)(i),&gp2a_original_image[i]);
		mdelay(5);
		mdelay(5);
	//	printk("%d",i);
	}
//}
	mdelay(2);
#if USE_INTERRUPT
	/* INT Settings */	
	irq = gpio_to_irq(GPIO_SENSE_OUT);
	gp2a->irq = -1;
	set_irq_type(irq, IRQ_TYPE_EDGE_BOTH);

	err = request_irq(irq, gp2a_irq_handler, IRQF_DISABLED, "gp2a_int", gp2a);
	if (err)
	{
		printk("[GP2A] request_irq failed for gp2a\n");
		goto exit_kfree;
	}

	printk("[GP2A] register irq = %d\n",irq);
	err = set_irq_wake(irq, 1);
	printk("[GP2A] register wakeup source = %d\n",err);
	if (err) 
		printk("[GP2A] register wakeup source failed\n");
	
	gp2a->irq = irq;
	gprintk("INT Settings complete\n");
#endif
	
	// maintain power-down mode before using sensor
	gp2a_off(gp2a,ALL);
	
//++	// test for sensor 

/*
	printk("[GP2A] curr prox value = %d\n", gpio_get_value(GPIO_SENSE_OUT));
	gp2a_on(gp2a,PROXIMITY);
	printk("[GP2A] curr prox value = %d\n", gpio_get_value(GPIO_SENSE_OUT));
	
//--

	// maintain power-down mode before using sensor
	//ESD test sleep
	gp2a_off(gp2a,ALL);
*/

	printk("gp2a_opt_probe is OK!!\n");
	return 0;
	
exit_kfree:
	kfree(gp2a);
exit:
	return err;
}
static int msm8930_s5k6a2ya_vreg_on(void)
{
	int rc;
	pr_info("[CAM] %s\n", __func__);

	rc = camera_sensor_power_enable("8038_l17", 2850000, &reg_8038_l17);
	pr_info("[CAM] sensor_power_enable(\"8038_l17\", 2.85V) == %d\n", rc);
	if (rc < 0) {
		pr_err("[CAM] sensor_power_enable(\"8038_l17\", 2.85V) FAILED %d\n", rc);
		goto enable_s5k6a2ya_vcm_fail;
	}
	udelay(50);

	rc = gpio_request(MSM_CAM_VCM_PD, "CAM_VCM_PD");
	pr_info("[CAM] vcm pd gpio_request, %d\n", MSM_CAM_VCM_PD);
	if (rc < 0) {
		pr_err("[CAM] GPIO(%d) request failed", MSM_CAM_VCM_PD);
		goto enable_s5k6a2ya_vcm_pd;
	}
	gpio_direction_output(MSM_CAM_VCM_PD, 1);
	gpio_free(MSM_CAM_VCM_PD);

	udelay(500);

	rc = camera_sensor_power_enable("8038_l8", 2900000, &reg_8038_l8);
	pr_info("[CAM] sensor_power_enable(\"8038_l8\", 2.9V) == %d\n", rc);
	if (rc < 0) {
		pr_err("[CAM] sensor_power_enable(\"8038_l8\", 2.9V) FAILED %d\n", rc);
		goto enable_s5k6a2ya_analog_fail;
	}
	udelay(50);

	rc = gpio_request(MSM_CAMIO_1V8_EN, "V_CAMIO_1V8_EN");
	pr_info("[CAM] cam iogcaa gpio_request, %d\n", MSM_CAMIO_1V8_EN);
	if (rc < 0) {
		pr_err("[CAM] GPIO(%d) request failed", MSM_CAMIO_1V8_EN);
		goto enable_s5k6a2ya_io_fail;
	}
	gpio_direction_output(MSM_CAMIO_1V8_EN, 1);
	gpio_free(MSM_CAMIO_1V8_EN);
	udelay(50);

	rc = gpio_request(MSM_CAM2_RSTz, "s5k6a2ya");
	pr_info("[CAM] reset pin gpio_request, %d\n", MSM_CAM2_RSTz);
	if (rc < 0) {
		pr_err("[CAM] GPIO(%d) request failed", MSM_CAM2_RSTz);
		goto enable_s5k6a2ya_rst_fail;
	}
	gpio_direction_output(MSM_CAM2_RSTz, 1);
	gpio_free(MSM_CAM2_RSTz);
	mdelay(1);

	return rc;

enable_s5k6a2ya_rst_fail:
	rc = gpio_request(MSM_CAMIO_1V8_EN, "V_CAMIO_1V8_EN");
	if (rc < 0)
		pr_err("[CAM] GPIO(%d) request failed", MSM_CAMIO_1V8_EN);
	else {
		gpio_direction_output(MSM_CAMIO_1V8_EN, 0);
		gpio_free(MSM_CAMIO_1V8_EN);
	}

enable_s5k6a2ya_io_fail:
	camera_sensor_power_disable(reg_8038_l8);
enable_s5k6a2ya_analog_fail:
	rc = gpio_request(MSM_CAM_VCM_PD, "CAM_VCM_PD");
	if (rc < 0)
		pr_err("[CAM] GPIO(%d) request failed", MSM_CAM_VCM_PD);
	else {
		gpio_direction_output(MSM_CAM_VCM_PD, 0);
		gpio_free(MSM_CAM_VCM_PD);
	}
enable_s5k6a2ya_vcm_pd:
	camera_sensor_power_disable(reg_8038_l17);
enable_s5k6a2ya_vcm_fail:
	return rc;
}
Exemple #25
0
static int cypress_touchkey_probe(struct i2c_client *client,
		const struct i2c_device_id *id)
{
	struct device *dev = &client->dev;
	struct input_dev *input_dev;

	u8 data[6];
	int err;
	int cnt;
	int touch_auto_calibration_on_off = 0;
#if defined(TOUCH_UPDATE)
	int ret;
	int retry = 10;
#endif
	printk(" cypress_touchkey_probe\n");

	gpio_set_value(TOUCHKEY_VDD_EN, 1);
	msleep(5);

	if (!dev->platform_data) {
		dev_err(dev, "%s: Platform data is NULL\n", __func__);
		return -EINVAL;
	}

	devdata = kzalloc(sizeof(*devdata), GFP_KERNEL);
	if (devdata == NULL) {
		dev_err(dev, "%s: failed to create our state\n", __func__);
		return -ENODEV;
	}

	devdata->client = client;
	i2c_set_clientdata(client, devdata);

	devdata->pdata = client->dev.platform_data;
	if (!devdata->pdata->keycode) {
		dev_err(dev, "%s: Invalid platform data\n", __func__);
		err = -EINVAL;
		goto err_null_keycodes;
	}

	strlcpy(devdata->client->name, DEVICE_NAME, I2C_NAME_SIZE);

	input_dev = input_allocate_device();
	if (!input_dev) {
		err = -ENOMEM;
		goto err_input_alloc_dev;
	}

	devdata->input_dev = input_dev;
	dev_set_drvdata(&input_dev->dev, devdata);
	input_dev->name = "sec_touchkey";
	input_dev->id.bustype = BUS_HOST;

	for (cnt = 0; cnt < devdata->pdata->keycode_cnt; cnt++)
		input_set_capability(input_dev, EV_KEY,
					devdata->pdata->keycode[cnt]);

	err = input_register_device(input_dev);
	if (err)
		goto err_input_reg_dev;

	devdata->is_powering_on = true;

	devdata->pdata->touchkey_onoff(TOUCHKEY_ON);
	msleep(50);

	err = i2c_master_recv(client, data, sizeof(data));
	if (err < (int)sizeof(data)) {
		printk(KERN_DEBUG"[Touchkey] i2c master recv error %d\n", err);
		if (err >= 0)
			err = -EIO;
		dev_err(dev, "%s: error reading hardware version\n", __func__);
		goto err_read;
	}

	dev_info(dev, "%s: hardware rev1 = %#02x, rev2 = %#02x\n", __func__,
				data[1], data[2]);

	devdata->backlight_on = BACKLIGHT_ON;
	devdata->backlight_off = BACKLIGHT_OFF;

	devdata->has_legacy_keycode = 1;
#if 0
	err = i2c_touchkey_write_byte(devdata, devdata->backlight_on);
	if (err) {
		dev_err(dev, "%s: touch keypad backlight on failed\n",
				__func__);
		goto err_backlight_on;
	}
#endif
	set_irq_type((IRQ_EINT_GROUP18_BASE + 6), IRQ_TYPE_LEVEL_LOW); // IRQ_TYPE_EDGE_FALLING);
	s3c_gpio_cfgpin(_3_GPIO_TOUCH_INT, S3C_GPIO_SFN(0xf));
	s3c_gpio_setpull(_3_GPIO_TOUCH_INT, S3C_GPIO_PULL_NONE);

	if (request_threaded_irq(client->irq, touchkey_interrupt_handler,
				touchkey_interrupt_thread, IRQF_TRIGGER_FALLING,
				DEVICE_NAME, devdata)) {
		dev_err(dev, "%s: Can't allocate irq.\n", __func__);
		goto err_req_irq;
	}
	mdelay(50); 
	touchkey_auto_calibration(1);
	mdelay(200); 
	i2c_touchkey_read	(devdata,0x00, data, 6);
	touch_auto_calibration_on_off = (data[5] & 0x80)>>7;
	printk("touchkey_auto_calibration=%d,data=%x \n",touch_auto_calibration_on_off,data[5]);

#ifdef CONFIG_HAS_EARLYSUSPEND
	devdata->early_suspend.suspend = cypress_touchkey_early_suspend;
	devdata->early_suspend.resume = cypress_touchkey_early_resume;
#endif
	register_early_suspend(&devdata->early_suspend);

	devdata->is_powering_on = false;
#if defined(TOUCH_UPDATE)
	ret = misc_register(&touchkey_update_device);
	if (ret) {
		printk("%s misc_register fail\n", __FUNCTION__);
		goto err_misc_reg;
	}

	dev_set_drvdata(touchkey_update_device.this_device, devdata);

	if (device_create_file
	    (touchkey_update_device.this_device, &dev_attr_touch_version) < 0) {
		printk("%s device_create_file fail dev_attr_touch_version\n",
		       __FUNCTION__);
		pr_err("Failed to create device file(%s)!\n",
		       dev_attr_touch_version.attr.name);
	}

	if (device_create_file
	    (touchkey_update_device.this_device, &dev_attr_touch_update) < 0) {
		printk("%s device_create_file fail dev_attr_touch_update\n",
		       __FUNCTION__);
		pr_err("Failed to create device file(%s)!\n",
		       dev_attr_touch_update.attr.name);
	}

	if (device_create_file
	    (touchkey_update_device.this_device, &dev_attr_brightness) < 0) {
		printk("%s device_create_file fail dev_attr_touch_update\n",
		       __FUNCTION__);
		pr_err("Failed to create device file(%s)!\n",
		       dev_attr_brightness.attr.name);
	}

	if (device_create_file
	    (touchkey_update_device.this_device,
	     &dev_attr_enable_disable) < 0) {
		printk("%s device_create_file fail dev_attr_touch_update\n",
		       __FUNCTION__);
		pr_err("Failed to create device file(%s)!\n",
		       dev_attr_enable_disable.attr.name);
	}

	if (device_create_file
	    (touchkey_update_device.this_device, &dev_attr_touchkey_menu) < 0) {
		printk("%s device_create_file fail dev_attr_touch_version\n",
		       __FUNCTION__);
		pr_err("Failed to create device file(%s)!\n",
		       dev_attr_touch_version.attr.name);
	}

	if (device_create_file
	    (touchkey_update_device.this_device, &dev_attr_touchkey_home) < 0) {
		printk("%s device_create_file fail dev_attr_touch_version\n",
		       __FUNCTION__);
		pr_err("Failed to create device file(%s)!\n",
		       dev_attr_touch_version.attr.name);
	}

	if (device_create_file
	    (touchkey_update_device.this_device, &dev_attr_touchkey_back) < 0) {
		printk("%s device_create_file fail dev_attr_touch_version\n",
		       __FUNCTION__);
		pr_err("Failed to create device file(%s)!\n",
		       dev_attr_touch_version.attr.name);
	}

	if (device_create_file
	    (touchkey_update_device.this_device, &dev_attr_touchkey_search) < 0) {
		printk("%s device_create_file fail dev_attr_touch_version\n",
		       __FUNCTION__);
		pr_err("Failed to create device file(%s)!\n",
		       dev_attr_touch_version.attr.name);
	}

	if (device_create_file
	    (touchkey_update_device.this_device, &dev_attr_touch_sensitivity) < 0) {
		printk("%s device_create_file fail dev_attr_touch_version\n",
		       __FUNCTION__);
		pr_err("Failed to create device file(%s)!\n",
		       dev_attr_touch_version.attr.name);
	}

	if (device_create_file
	    (touchkey_update_device.this_device, &dev_attr_touchkey_idac0) < 0) {
		printk("%s device_create_file fail dev_attr_touch_version\n",
		       __FUNCTION__);
		pr_err("Failed to create device file(%s)!\n",
		       dev_attr_touch_version.attr.name);
	}

	if (device_create_file
	    (touchkey_update_device.this_device, &dev_attr_touchkey_idac1) < 0) {
		printk("%s device_create_file fail dev_attr_touch_version\n",
		       __FUNCTION__);
		pr_err("Failed to create device file(%s)!\n",
		       dev_attr_touch_version.attr.name);
	}

	if (device_create_file
	    (touchkey_update_device.this_device, &dev_attr_touchkey_idac2) < 0) {
		printk("%s device_create_file fail dev_attr_touch_version\n",
		       __FUNCTION__);
		pr_err("Failed to create device file(%s)!\n",
		       dev_attr_touch_version.attr.name);
	}

	if (device_create_file
	    (touchkey_update_device.this_device, &dev_attr_touchkey_idac3) < 0) {
		printk("%s device_create_file fail dev_attr_touch_version\n",
		       __FUNCTION__);
		pr_err("Failed to create device file(%s)!\n",
		       dev_attr_touch_version.attr.name);
	}

	touchkey_wq = create_singlethread_workqueue(DEVICE_NAME);
	if (!touchkey_wq)
		goto err_create_wq;

	while (retry--) {
		if (get_touchkey_firmware(data) == 0)	//melfas need delay for multiple read
			break;
	}
	printk("%s F/W version: 0x%x, Module version:0x%x\n", __FUNCTION__,
	       data[1], data[2]);
#endif

	return 0;

err_create_wq:
#if defined(TOUCH_UPDATE)
	misc_deregister(&touchkey_update_device);
#endif
err_misc_reg:
err_req_irq:
err_backlight_on:
err_read:
	devdata->pdata->touchkey_onoff(TOUCHKEY_OFF);
	input_unregister_device(input_dev);
	goto err_input_alloc_dev;
err_input_reg_dev:
	input_free_device(input_dev);
err_input_alloc_dev:
err_null_keycodes:
	kfree(devdata);
	return err;
}
static int msm8930_mt9v113_vreg_on(void)
{
	int rc;
	pr_info("%s\n", __func__);

	rc = camera_sensor_power_enable("8038_l17", 2800000, &reg_8038_l17);
	pr_info("sensor_power_enable(\"8038_l17\", 2.8V) == %d\n", rc);
	if (rc < 0) {
		pr_err("sensor_power_enable(\"8038_l17\", 2.8V) FAILED %d\n", rc);
		goto enable_mt9v113_vcm_fail;
	}
	udelay(50);

	rc = gpio_request(MSM_CAM2_RSTz, "mt9v113");
	pr_info("reset pin gpio_request, %d\n", MSM_CAM2_RSTz);
	if (rc < 0) {
		pr_err("GPIO(%d) request failed", MSM_CAM2_RSTz);
		goto enable_mt9v113_rst_fail;
	}
	gpio_direction_output(MSM_CAM2_RSTz, 1);
	gpio_free(MSM_CAM2_RSTz);
	mdelay(1);

	rc = gpio_request(MSM_V_CAM_D1V8_EN, "V_CAM_D1V8_EN");
	pr_info("digital gpio_request, %d\n", MSM_V_CAM_D1V8_EN);
	if (rc < 0) {
		pr_err("GPIO(%d) request failed", MSM_V_CAM_D1V8_EN);
		goto enable_mt9v113_digital_fail;
	}
	gpio_direction_output(MSM_V_CAM_D1V8_EN, 1);
	gpio_free(MSM_V_CAM_D1V8_EN);

	mdelay(1);

	rc = camera_sensor_power_enable("8038_l8", 2800000, &reg_8038_l8);
	pr_info("sensor_power_enable(\"8038_l8\", 2.8V) == %d\n", rc);
	if (rc < 0) {
		pr_err("sensor_power_enable(\"8038_l8\", 2.8V) FAILED %d\n", rc);
		goto enable_mt9v113_analog_fail;
	}
	udelay(50);

	rc = gpio_request(MSM_CAMIO_1V8_EN, "V_CAMIO_1V8_EN");
	pr_info("cam io gpio_request, %d\n", MSM_CAMIO_1V8_EN);
	if (rc < 0) {
		pr_err("GPIO(%d) request failed", MSM_CAMIO_1V8_EN);
		goto enable_mt9v113_io_fail;
	}
	gpio_direction_output(MSM_CAMIO_1V8_EN, 1);
	gpio_free(MSM_CAMIO_1V8_EN);
	udelay(50);

	rc = gpio_request(MSM_CAM_VCM_PD, "CAM_VCM_PD");
	pr_info("vcm pd gpio_request, %d\n", MSM_CAM_VCM_PD);
	if (rc < 0 && rc != -EBUSY) {
		pr_err("GPIO(%d) request failed", MSM_CAM_VCM_PD);
		goto enable_mt9v113_vcm_pd_fail;
	} else {
		gpio_direction_output(MSM_CAM_VCM_PD, 1);
		gpio_free(MSM_CAM_VCM_PD);
		rc = 0;
	}

	return rc;

enable_mt9v113_vcm_pd_fail:
	rc = gpio_request(MSM_CAMIO_1V8_EN, "V_CAMIO_1V8_EN");
	if (rc < 0)
		pr_err("GPIO(%d) request failed", MSM_CAMIO_1V8_EN);
	else {
		gpio_direction_output(MSM_CAMIO_1V8_EN, 0);
		gpio_free(MSM_CAMIO_1V8_EN);
	}
enable_mt9v113_io_fail:
	camera_sensor_power_disable(reg_8038_l8);
enable_mt9v113_analog_fail:
	rc = gpio_request(MSM_V_CAM_D1V8_EN, "V_CAM_D1V8_EN");
	if (rc < 0)
		pr_err("GPIO(%d) request failed", MSM_V_CAM_D1V8_EN);
	else {
		gpio_direction_output(MSM_V_CAM_D1V8_EN, 0);
		gpio_free(MSM_V_CAM_D1V8_EN);
	}
enable_mt9v113_digital_fail:
	rc = gpio_request(MSM_CAM2_RSTz, "mt9v113");
	if (rc < 0)
		pr_err("GPIO(%d) request failed", MSM_CAM2_RSTz);
	else {
		gpio_direction_output(MSM_CAM2_RSTz, 0);
		gpio_free(MSM_CAM2_RSTz);
	}
enable_mt9v113_rst_fail:
	camera_sensor_power_disable(reg_8038_l17);
enable_mt9v113_vcm_fail:
	return rc;
}
Exemple #27
0
//============================================================
//
//	Delay Function
//
//============================================================
 void mcsdl_delay(UINT32 nCount)
{

		switch(nCount)
	{
		case MCSDL_DELAY_1US :
			udelay(1);
			break;
		case MCSDL_DELAY_2US :
			udelay(2);
			break;
		case MCSDL_DELAY_3US :
			udelay(3);
			break;
		case MCSDL_DELAY_5US :
			udelay(5);
			break;
		case MCSDL_DELAY_7US :
			udelay(7);
			break;
		case MCSDL_DELAY_10US :
			udelay(10);
			break;
		case MCSDL_DELAY_15US :
			udelay(15);
			break;
		case MCSDL_DELAY_20US :
			udelay(20);
			break;
		case MCSDL_DELAY_100US :
			udelay(100);
			break;
		case MCSDL_DELAY_150US :
			udelay(150);
			break;
		case MCSDL_DELAY_500US :
			udelay(500);
			break;
		case MCSDL_DELAY_800US :
			udelay(800);
			break;
		case MCSDL_DELAY_1MS :
			msleep(1);
			break;
		case MCSDL_DELAY_5MS :
			msleep(5);
			break;
		case MCSDL_DELAY_10MS :
			msleep(10);
			break;
		case MCSDL_DELAY_25MS :
			msleep(25);
			break;
		case MCSDL_DELAY_30MS :
			msleep(30);
			break;
		case MCSDL_DELAY_40MS :
			msleep(40);
			break;
		case MCSDL_DELAY_45MS :
			msleep(45);
			break;
//start ADD DELAY
        case MCSDL_DELAY_100MS :
      		mdelay(100);
            break;
        case MCSDL_DELAY_300US :
      		udelay(300);
            break;
        case MCSDL_DELAY_60MS :
            msleep(60);
            break;
        case MCSDL_DELAY_40US :
            udelay(40);
            break;
        case MCSDL_DELAY_50MS :
            mdelay(50);
            break;
		case MCSDL_DELAY_70US :
			udelay(70);
			break;
//end del
		default :
			break;
	}// Please, Use your delay function


}
Exemple #28
0
static bool rtl8192_radio_on_off_checking(struct net_device *dev)
{
	struct r8192_priv *priv = (struct r8192_priv *)rtllib_priv(dev);
	u8      u1Tmp = 0;
	u8 	gpio;
	
	if (priv->pwrdown) {
		u1Tmp = read_nic_byte(dev, 0x06);
		gpio = u1Tmp & BIT6;
	} else	
#ifdef CONFIG_BT_COEXIST
	if (pHalData->bt_coexist.BluetoothCoexist) {
		if (pHalData->bt_coexist.BT_CoexistType == BT_2Wire) {
			PlatformEFIOWrite1Byte(pAdapter, MAC_PINMUX_CFG, 0xa);
			u1Tmp = PlatformEFIORead1Byte(pAdapter, GPIO_IO_SEL);
			delay_us(100);
			u1Tmp = PlatformEFIORead1Byte(pAdapter, GPIO_IN);
			RTPRINT(FPWR, PWRHW, ("GPIO_IN=%02x\n", u1Tmp));
			retval = (u1Tmp & HAL_8192S_HW_GPIO_OFF_BIT) ? eRfOn : eRfOff;
		} else if ((pHalData->bt_coexist.BT_CoexistType == BT_ISSC_3Wire) ||
				(pHalData->bt_coexist.BT_CoexistType == BT_Accel) ||
				(pHalData->bt_coexist.BT_CoexistType == BT_CSR_BC4)) {
			u4tmp = PHY_QueryBBReg(pAdapter, 0x87c, bMaskDWord);
			if ((u4tmp & BIT17) != 0) {
				PHY_SetBBReg(pAdapter, 0x87c, bMaskDWord, u4tmp & ~BIT17);
				delay_us(50);
				RTPRINT(FBT, BT_RFPoll, ("BT write 0x87c (~BIT17) = 0x%x\n", u4tmp &~BIT17));
			}
			u4tmp = PHY_QueryBBReg(pAdapter, 0x8e0, bMaskDWord);
			RTPRINT(FBT, BT_RFPoll, ("BT read 0x8e0 (BIT24)= 0x%x\n", u4tmp));
			retval = (u4tmp & BIT24) ? eRfOn : eRfOff;
			RTPRINT(FBT, BT_RFPoll, ("BT check RF state to %s\n", (retval==eRfOn)? "ON":"OFF"));
		}
	} else 
#endif
	{
		write_nic_byte(dev, MAC_PINMUX_CFG, (GPIOMUX_EN | GPIOSEL_GPIO));
		u1Tmp = read_nic_byte(dev, GPIO_IO_SEL);

		u1Tmp &= HAL_8192S_HW_GPIO_OFF_MASK;
		write_nic_byte(dev, GPIO_IO_SEL, u1Tmp);

		mdelay(10);

		u1Tmp = read_nic_byte(dev, GPIO_IN);
		gpio = u1Tmp & HAL_8192S_HW_GPIO_OFF_BIT;
	}
#ifdef DEBUG_RFKILL 
	{
		static u8 	gpio_test;
		printk("%s: gpio = %x\n", __FUNCTION__, gpio);
		if(gpio_test % 5 == 0) {
			gpio = 0;
		} else {
			gpio = 1;
		}
		printk("%s: gpio_test = %d, gpio = %x\n", __FUNCTION__, gpio_test++ % 20, gpio);
	}
#endif 

	return gpio;
}
Exemple #29
0
static void twl4030_poweroff(void)
{
	u8 val;
	int err;

    // Clear IT_ALARM bit in RTC_INTERRUPTS_REG [+]
	err = twl_i2c_read_u8(TWL4030_MODULE_RTC, &val,
                    REG_RTC_INTERRUPT_REG);
	if (err) {
		printk(KERN_WARNING "I2C error %d while reading TWL4030"
					"REG_RTC_INTERRUPT_REG\n", err);
		return ;
	}

	val &= ~(0x01<<3);
	err = twl_i2c_write_u8(TWL4030_MODULE_RTC, val,
                    REG_RTC_INTERRUPT_REG);
	if (err) {
		printk(KERN_WARNING "I2C error %d while writing TWL4030"
					"REG_RTC_INTERRUPT_REG\n", err);
		return ;
	}

#if 0
	err = twl_i2c_read_u8(TWL4030_MODULE_RTC, &val,
                    REG_RTC_INTERRUPT_REG);
	if (err) {
		printk(KERN_WARNING "I2C error %d while reading TWL4030"
					"REG_RTC_INTERRUPT_REG\n", err);
		return ;
	}
	printk("Clear IT ALARM bit in RTC INTERRUPT REG( = 0x%02x) Done!\n", val);
#endif
    // Clear IT_ALARM bit in RTC_INTERRUPTS_REG [-]

	err = twl_i2c_read_u8(TWL4030_MODULE_PM_MASTER, &val,
				  PWR_P1_SW_EVENTS);
	if (err) {
		printk(KERN_WARNING "I2C error %d while reading TWL4030"
					"PM_MASTER P1_SW_EVENTS\n", err);
		return ;
	}

	val |= PWR_DEVOFF;

#if 0
	err = twl_i2c_write_u8(TWL4030_MODULE_PM_MASTER, val,
				   PWR_P1_SW_EVENTS);

	if (err) {
		printk(KERN_WARNING "I2C error %d while writing TWL4030"
					"PM_MASTER P1_SW_EVENTS\n", err);
		return ;
	}
#else
    while(1) {
    	err = twl_i2c_write_u8(TWL4030_MODULE_PM_MASTER, val,
    				   PWR_P1_SW_EVENTS);
        mdelay(500);
    };
#endif

	return;
}
//Div2-SW6-MM-MC-BringUpHM0357ForSF5PCR-00*{
static int tcm9001md_sensor_probe(const struct msm_camera_sensor_info *info,
				struct msm_sensor_ctrl *s)
{
    unsigned char v;
    int rc = i2c_add_driver(&tcm9001md_i2c_driver);

    printk(KERN_INFO "tcm9001md_sensor_probe: Called.....\n");

    if (rc < 0 || tcm9001md_client == NULL) {
        rc = -ENOTSUPP;
        goto probe_done;
    }
    tcm9001mdinfo= info;

    v = 0;
    /* Init VGA pins state */
#if 0
    gpio_tlmm_config(GPIO_CFG(tcm9001mdinfo->vga_rst_pin, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA), GPIO_CFG_ENABLE);
    printk(KERN_INFO "%s: Re-set config for gpio %d .\n", __func__, tcm9001mdinfo->vga_rst_pin);

    gpio_tlmm_config(GPIO_CFG(tcm9001mdinfo->vga_pwdn_pin, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA), GPIO_CFG_ENABLE);
    printk(KERN_INFO "%s: Re-set config for gpio %d .\n", __func__, tcm9001mdinfo->vga_pwdn_pin);

    gpio_tlmm_config(GPIO_CFG(tcm9001mdinfo->vga_power_en_pin, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA), GPIO_CFG_ENABLE);
    printk(KERN_INFO "%s: Re-set config for gpio %d .\n", __func__, tcm9001mdinfo->vga_power_en_pin);
#endif
    
    rc = fih_cam_output_gpio_control(tcm9001mdinfo->vga_rst_pin, "tcm9001md", 0);
    if (rc)
        return rc;
    
    rc = fih_cam_output_gpio_control(tcm9001mdinfo->vga_pwdn_pin, "tcm9001md", 0);
    if (rc)
        return rc;
    
    rc = fih_cam_output_gpio_control(tcm9001mdinfo->vga_power_en_pin, "tcm9001md", 0);
    if (rc)
        return rc;

    /* Here to check sensor is existence */
    msm_camio_clk_enable(CAMIO_CAM_MCLK_CLK);
    msleep(30);

    /* Setting MCLK = 24MHz */
    msm_camio_clk_rate_set(24000000);
    //msm_camio_camif_pad_reg_reset();
    printk(KERN_INFO "%s: Setting MCLK = 24MHz \n", __func__);

    /* Pull hight power enable = GPIO98  */
    rc = fih_cam_output_gpio_control(tcm9001mdinfo->vga_power_en_pin, "tcm9001md", 1);
    if (rc)
        return rc;

    mdelay(1);  //t1+t2+t3 = 1ms

    /* Pull hight PWRDWN = CAM_VGA_STANDBY  */
    rc = fih_cam_output_gpio_control(tcm9001mdinfo->vga_pwdn_pin, "tcm9001md", 1);
    if (rc)
        return rc;

    mdelay(2);  //t4 = 1ms

    /* Enable  MCLK = 24MHz */
    gpio_tlmm_config(GPIO_CFG(tcm9001mdinfo->MCLK_PIN, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), GPIO_CFG_ENABLE);//Div2-SW6-MM-MC-Camera-ModifiedPowerSequence-01*
    printk(KERN_INFO "%s: Output MCLK end.  \n", __func__);

    mdelay(2);

    /* Pull Low PWRDWN = CAM_VGA_STANDBY  */
    rc = fih_cam_output_gpio_control(tcm9001mdinfo->vga_pwdn_pin, "tcm9001md", 0);
    if (rc)
        return rc;

    mdelay(2);  //t5 = 2ms

    /* Pull High REDET = CAM_VGA_RST_N  */
    rc = fih_cam_output_gpio_control(tcm9001mdinfo->vga_rst_pin, "tcm9001md", 1);
    if (rc)
        return rc;

    mdelay(2);  //t6 > 2ms

    // Here to check chip version identification.
    rc = tcm9001md_i2c_read(tcm9001md_client, REG_TCM9001MD_MODEL_ID_1, &v);
    if (rc < 0 || v != TCM9001MD_MODEL_ID_1)
    {
        printk("tcm9001md_sensor_probe: ERR: Red MODEL_ID_1 = 0x%x failed !\n", v);
        goto probe_done;
    }
    printk("tcm9001md_sensor_probe: MODEL_ID_1 = 0x%x .\n", v);

    rc = tcm9001md_i2c_read(tcm9001md_client, REG_TCM9001MD_MODEL_ID_2, &v);
    if (rc < 0 || v != TCM9001MD_MODEL_ID_2)
    {
        printk("tcm9001md_sensor_probe: ERR: Red MODEL_ID_2 = 0x%x failed !\n", v);
        goto probe_done;
    }
    printk("tcm9001md_sensor_probe: MODEL_ID_2 = 0x%x .\n", v);

    s->s_init = tcm9001md_sensor_init;
    s->s_release = tcm9001md_sensor_release;
    s->s_config  = tcm9001md_sensor_config;

probe_done:
    tcm9001md_power_off();
    msm_camio_clk_disable(CAMIO_CAM_MCLK_CLK);
    CDBG("%s %s:%d\n", __FILE__, __func__, __LINE__);
    return rc;
}