static int __init msecure_init(void) { int ret = 0; #ifdef CONFIG_RTC_DRV_TWL4030 void __iomem *msecure_pad_config_reg = omap_ctrl_base_get() + 0x192; int mux_mask = 0x04; u16 tmp; ret = gpio_request(TWL4030_MSECURE_GPIO, "msecure"); if (ret < 0) { printk(KERN_ERR "msecure_init: can't" "reserve GPIO:%d !\n", TWL4030_MSECURE_GPIO); goto out; } /* * TWL4030 will be in secure mode if msecure line from OMAP * is low. Make msecure line high in order to change the * TWL4030 RTC time and calender registers. */ tmp = __raw_readw(msecure_pad_config_reg); tmp &= 0xF8; /* To enable mux mode 03/04 = GPIO_RTC */ tmp |= mux_mask;/* To enable mux mode 03/04 = GPIO_RTC */ __raw_writew(tmp, msecure_pad_config_reg); gpio_direction_output(TWL4030_MSECURE_GPIO, 1); out: #endif return ret; }
static int __init msecure_init(void) { int ret = 0; #ifdef CONFIG_RTC_DRV_TWL4030 /* 3430ES2.0 doesn't have msecure/gpio-22 line connected to T2 */ if (omap_type() == OMAP2_DEVICE_TYPE_GP && omap_rev() < OMAP3430_REV_ES2_0) { void __iomem *msecure_pad_config_reg = omap_ctrl_base_get() + 0xA3C; int mux_mask = 0x04; u16 tmp; ret = gpio_request(TWL4030_MSECURE_GPIO, "msecure"); if (ret < 0) { printk(KERN_ERR "msecure_init: can't" "reserve GPIO:%d !\n", TWL4030_MSECURE_GPIO); goto out; } /* * TWL4030 will be in secure mode if msecure line from OMAP * is low. Make msecure line high in order to change the * TWL4030 RTC time and calender registers. */ tmp = __raw_readw(msecure_pad_config_reg); tmp &= 0xF8; /* To enable mux mode 03/04 = GPIO_RTC */ tmp |= mux_mask;/* To enable mux mode 03/04 = GPIO_RTC */ __raw_writew(tmp, msecure_pad_config_reg); gpio_direction_output(TWL4030_MSECURE_GPIO, 1); } out: #endif return ret; }
void __init_or_module omap2_cfg_debug(const struct pin_config *cfg, u8 reg) { u16 orig; u8 warn = 0, debug = 0; orig = omap_ctrl_readb(cfg->mux_reg); #ifdef CONFIG_OMAP_MUX_DEBUG debug = cfg->debug; #endif warn = (orig != reg); if (debug || warn) printk(KERN_WARNING "MUX: setup %s (0x%08x): 0x%02x -> 0x%02x\n", cfg->name, omap_ctrl_base_get() + cfg->mux_reg, orig, reg); }
static int __init msecure_init(void) { int ret = 0; //printk("*****msecure_init++\n"); //TI Patch: MSECURE Pin mode change #ifdef CONFIG_RTC_DRV_TWL4030 /* 3430ES2.0 doesn't have msecure/gpio-22 line connected to T2 */ if (omap_type() == OMAP2_DEVICE_TYPE_GP || GPIO_MSECURE_PIN_ON_HS) //TI Patch: MSECURE Pin mode change { void __iomem *msecure_pad_config_reg = omap_ctrl_base_get() + 0x5EC; int mux_mask = 0x04; u16 tmp; printk("msecure_pin setting: GPIO %d, %d\n", omap_type(), GPIO_MSECURE_PIN_ON_HS); //TI Patch: MSECURE Pin mode change ret = gpio_request(OMAP_GPIO_SYS_DRM_MSECURE, "msecure"); if (ret < 0) { printk(KERN_ERR "msecure_init: can't" "reserve GPIO:%d !\n", OMAP_GPIO_SYS_DRM_MSECURE); goto out; } /* * TWL4030 will be in secure mode if msecure line from OMAP * is low. Make msecure line high in order to change the * TWL4030 RTC time and calender registers. */ tmp = __raw_readw(msecure_pad_config_reg); tmp &= 0xF8; /* To enable mux mode 03/04 = GPIO_RTC */ tmp |= mux_mask; /* To enable mux mode 03/04 = GPIO_RTC */ __raw_writew(tmp, msecure_pad_config_reg); gpio_direction_output(OMAP_GPIO_SYS_DRM_MSECURE, 1); } out: //printk("*****msecure_init--\n"); //TI Patch: MSECURE Pin mode change #endif return ret; }
static int __init omap_l3_init(void) { int ret; /* Static mapping. Never released map it for 1M*/ l3_base[0] = ioremap(L3_44XX_BASE_CLK1, SZ_1M); l3_base[1] = ioremap(L3_44XX_BASE_CLK2, SZ_1M); l3_base[2] = ioremap(L3_44XX_BASE_CLK3, SZ_1M); l3_base[3] = ioremap(L3_44XX_BASE_FIREWALL, SZ_1M); if ((!l3_base[0]) || (!l3_base[1]) || (!l3_base[2]) || (!l3_base[3])) { pr_crit("Could not ioremap L3 address space\n"); return -ENOMEM; } ctrl_base = omap_ctrl_base_get(); /* * Setup interrupt Handlers */ ret = request_irq(OMAP44XX_IRQ_L3_DBG, (irq_handler_t)l3_interrupt_handler, IRQF_DISABLED, "l3_debug_error", NULL); if (ret) { pr_crit("L3: request_irq failed to register for 0x%x\n", OMAP44XX_IRQ_L3_DBG); return ret; } ret = request_irq(OMAP44XX_IRQ_L3_APP, (irq_handler_t)l3_interrupt_handler, IRQF_DISABLED, "l3_app_error", NULL); if (ret) { pr_crit("L3: request_irq failed to register for 0x%x\n", OMAP44XX_IRQ_L3_APP); return ret; } return 0; }