/* This function also initializes the data and code heaps */ void load_image(F_PARAMETERS *p) { FILE *file = OPEN_READ(p->image); if(file == NULL) { FPRINTF(stderr,"Cannot open image file: %s\n",p->image); fprintf(stderr,"%s\n",strerror(errno)); exit(1); } F_HEADER h; fread(&h,sizeof(F_HEADER),1,file); if(h.magic != IMAGE_MAGIC) fatal_error("Bad image: magic number check failed",h.magic); if(h.version != IMAGE_VERSION) fatal_error("Bad image: version number check failed",h.version); load_data_heap(file,&h,p); load_code_heap(file,&h,p); fclose(file); init_objects(&h); relocate_data(); relocate_code(); /* Store image path name */ userenv[IMAGE_ENV] = tag_object(from_native_string(p->image)); }
void board_init_f(ulong bootflag) { u32 plat_ratio; ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR; #if defined(CONFIG_SYS_NAND_BR_PRELIM) && defined(CONFIG_SYS_NAND_OR_PRELIM) set_lbc_br(0, CONFIG_SYS_NAND_BR_PRELIM); set_lbc_or(0, CONFIG_SYS_NAND_OR_PRELIM); #endif /* initialize selected port with appropriate baud rate */ plat_ratio = in_be32(&gur->porpllsr) & MPC85xx_PORPLLSR_PLAT_RATIO; plat_ratio >>= 1; gd->bus_clk = CONFIG_SYS_CLK_FREQ * plat_ratio; NS16550_init((NS16550_t)CONFIG_SYS_NS16550_COM1, gd->bus_clk / 16 / CONFIG_BAUDRATE); puts("\nNAND boot...\n"); /* copy code to RAM and jump to it - this should not return */ /* NOTE - code has to be copied out of NAND buffer before * other blocks can be read. */ relocate_code(CONFIG_SPL_RELOC_STACK, 0, CONFIG_SPL_RELOC_TEXT_BASE); }
void board_init_f(ulong bootflag) { u32 plat_ratio, ddr_ratio; unsigned long bus_clk; ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR; /* initialize selected port with appropriate baud rate */ plat_ratio = in_be32(&gur->porpllsr) & MPC85xx_PORPLLSR_PLAT_RATIO; plat_ratio >>= 1; bus_clk = CONFIG_SYS_CLK_FREQ * plat_ratio; ddr_ratio = in_be32(&gur->porpllsr) & MPC85xx_PORPLLSR_DDR_RATIO; ddr_ratio = ddr_ratio >> MPC85xx_PORPLLSR_DDR_RATIO_SHIFT; ddr_freq_mhz = (CONFIG_SYS_CLK_FREQ * ddr_ratio) / 0x1000000; NS16550_init((NS16550_t)CONFIG_SYS_NS16550_COM1, bus_clk / 16 / CONFIG_BAUDRATE); puts("\nNAND boot... "); /* Initialize the DDR3 */ sdram_init(); /* copy code to RAM and jump to it - this should not return */ /* NOTE - code has to be copied out of NAND buffer before * other blocks can be read. */ relocate_code(CONFIG_SYS_NAND_U_BOOT_RELOC_SP, 0, CONFIG_SYS_NAND_U_BOOT_RELOC); }
/* This function also initializes the data and code heaps */ void load_image(vm_parameters *p) { FILE *file = OPEN_READ(p->image_path); if(file == NULL) { print_string("Cannot open image file: "); print_native_string(p->image_path); nl(); print_string(strerror(errno)); nl(); exit(1); } image_header h; if(fread(&h,sizeof(image_header),1,file) != 1) fatal_error("Cannot read image header",0); if(h.magic != image_magic) fatal_error("Bad image: magic number check failed",h.magic); if(h.version != image_version) fatal_error("Bad image: version number check failed",h.version); load_data_heap(file,&h,p); load_code_heap(file,&h,p); fclose(file); init_objects(&h); relocate_data(); relocate_code(); /* Store image path name */ userenv[IMAGE_ENV] = allot_alien(F,(cell)p->image_path); }
static int jump_to_copy(void) { if (gd->flags & GD_FLG_SKIP_RELOC) return 0; /* * x86 is special, but in a nice way. It uses a trampoline which * enables the dcache if possible. * * For now, other archs use relocate_code(), which is implemented * similarly for all archs. When we do generic relocation, hopefully * we can make all archs enable the dcache prior to relocation. */ #if defined(CONFIG_X86) || defined(CONFIG_ARC) /* * SDRAM and console are now initialised. The final stack can now * be setup in SDRAM. Code execution will continue in Flash, but * with the stack in SDRAM and Global Data in temporary memory * (CPU cache) */ arch_setup_gd(gd->new_gd); board_init_f_r_trampoline(gd->start_addr_sp); #else relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr); #endif return 0; }
void board_init_f(ulong bootflag) { int px_spd; u32 plat_ratio, bus_clk, sys_clk; ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR; #if defined(CONFIG_SYS_BR3_PRELIM) && defined(CONFIG_SYS_OR3_PRELIM) /* for FPGA */ set_lbc_br(3, CONFIG_SYS_BR3_PRELIM); set_lbc_or(3, CONFIG_SYS_OR3_PRELIM); #else #error CONFIG_SYS_BR3_PRELIM, CONFIG_SYS_OR3_PRELIM must be defined #endif /* initialize selected port with appropriate baud rate */ px_spd = in_8((unsigned char *)(PIXIS_BASE + PIXIS_SPD)); sys_clk = sysclk_tbl[px_spd & PIXIS_SPD_SYSCLK_MASK]; plat_ratio = in_be32(&gur->porpllsr) & MPC85xx_PORPLLSR_PLAT_RATIO; bus_clk = sys_clk * plat_ratio / 2; NS16550_init((NS16550_t)CONFIG_SYS_NS16550_COM1, bus_clk / 16 / CONFIG_BAUDRATE); puts("\nNAND boot... "); /* copy code to RAM and jump to it - this should not return */ /* NOTE - code has to be copied out of NAND buffer before * other blocks can be read. */ relocate_code(CONFIG_SYS_NAND_U_BOOT_RELOC_SP, 0, CONFIG_SYS_NAND_U_BOOT_RELOC); }
void board_init_f(ulong bootflag) { uint plat_ratio, bus_clk, sys_clk = 0; volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); volatile ccsr_gpio_t *pgpio = (void *)(CONFIG_SYS_MPC85xx_GPIO_ADDR); uint val, sysclk_mask; val = pgpio->gpdat; sysclk_mask = val & SYSCLK_MASK; if(sysclk_mask == 0) sys_clk = SYSCLK_66; else sys_clk = SYSCLK_100; plat_ratio = gur->porpllsr & 0x0000003e; plat_ratio >>= 1; bus_clk = plat_ratio * sys_clk; NS16550_init((NS16550_t)CONFIG_SYS_NS16550_COM1, bus_clk / 16 / CONFIG_BAUDRATE); puts("\nNAND boot... "); #ifdef CONFIG_SYS_FSL_BOOT_DDR /* board specific DDR initialization */ initsdram(); #endif /* copy code to DDR and jump to it - this should not return */ /* NOTE - code has to be copied out of NAND buffer before * other blocks can be read. */ relocate_code(CONFIG_SYS_NAND_U_BOOT_RELOC_SP, 0, CONFIG_SYS_NAND_U_BOOT_RELOC); }
void board_init_f(ulong bootflag) { u32 plat_ratio; ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR; struct fsl_ifc ifc = {(void *)CONFIG_SYS_IFC_ADDR, (void *)NULL}; console_init_f(); /* Clock configuration to access CPLD using IFC(GPCM) */ setbits_be32(&ifc.gregs->ifc_gcr, 1 << IFC_GCR_TBCTL_TRN_TIME_SHIFT); #ifdef CONFIG_TARGET_P1010RDB_PB setbits_be32(&gur->pmuxcr2, MPC85xx_PMUXCR2_GPIO01_DRVVBUS); #endif /* initialize selected port with appropriate baud rate */ plat_ratio = in_be32(&gur->porpllsr) & MPC85xx_PORPLLSR_PLAT_RATIO; plat_ratio >>= 1; gd->bus_clk = CONFIG_SYS_CLK_FREQ * plat_ratio; NS16550_init((NS16550_t)CONFIG_SYS_NS16550_COM1, gd->bus_clk / 16 / CONFIG_BAUDRATE); #ifdef CONFIG_SPL_MMC_BOOT puts("\nSD boot...\n"); #elif defined(CONFIG_SPL_SPI_BOOT) puts("\nSPI Flash boot...\n"); #endif /* copy code to RAM and jump to it - this should not return */ /* NOTE - code has to be copied out of NAND buffer before * other blocks can be read. */ relocate_code(CONFIG_SPL_RELOC_STACK, 0, CONFIG_SPL_RELOC_TEXT_BASE); }
void board_init_f(unsigned long bootflag) { /*relocate_code(CONFIG_SYS_TEXT_BASE - TOTAL_MALLOC_LEN, NULL, CONFIG_SYS_TEXT_BASE); */ relocate_code(8 * 1024, NULL, CONFIG_SYS_TEXT_BASE); }
void board_init_f(ulong bootflag) { u32 plat_ratio; ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR; #ifndef CONFIG_QE ccsr_gpio_t *pgpio = (void *)(CONFIG_SYS_MPC85xx_GPIO_ADDR); #elif defined(CONFIG_P1021RDB) par_io_t *par_io = (par_io_t *) &(gur->qe_par_io); #endif /* initialize selected port with appropriate baud rate */ plat_ratio = in_be32(&gur->porpllsr) & MPC85xx_PORPLLSR_PLAT_RATIO; plat_ratio >>= 1; bus_clk = CONFIG_SYS_CLK_FREQ * plat_ratio; NS16550_init((NS16550_t)CONFIG_SYS_NS16550_COM1, bus_clk / 16 / CONFIG_BAUDRATE); puts("\nNAND boot... "); #ifndef CONFIG_QE /* init DDR3 reset signal */ puts("\nDDR & BCM56445 reset... "); __raw_writel(0x02210000, &pgpio->gpdir); __raw_writel(0x00210000, &pgpio->gpodr); __raw_writel(0x00000000, &pgpio->gpdat); udelay(20000); __raw_writel(0x00210000, &pgpio->gpdat); udelay(20000); __raw_writel(0x00000000, &pgpio->gpdir); #elif defined(CONFIG_P1021RDB) /* init DDR3 reset signal CE_PB8 */ out_be32(&par_io[1].cpdir1, 0x00004000); out_be32(&par_io[1].cpodr, 0x00800000); out_be32(&par_io[1].cppar1, 0x00000000); /* reset DDR3 */ out_be32(&par_io[1].cpdat, 0x00800000); udelay(1000); out_be32(&par_io[1].cpdat, 0x00000000); udelay(1000); out_be32(&par_io[1].cpdat, 0x00800000); /* disable the CE_PB8 */ out_be32(&par_io[1].cpdir1, 0x00000000); #endif //sdram_reset(); /* Initialize the DDR3 */ sdram_init(); puts("\nsdram_init ok... "); /* copy code to RAM and jump to it - this should not return */ /* NOTE - code has to be copied out of NAND buffer before * other blocks can be read. */ relocate_code(CONFIG_SYS_NAND_U_BOOT_RELOC_SP, 0, CONFIG_SYS_NAND_U_BOOT_RELOC); }
/* * Miscellaneous late-boot configurations * * If a VSC7385 microcode image is present, then upload it. */ int misc_init_r(void) { int rc = 0; #ifdef CONFIG_VSC7385_IMAGE if (vsc7385_upload_firmware((void *) CONFIG_VSC7385_IMAGE, CONFIG_VSC7385_IMAGE_SIZE)) { puts("Failure uploading VSC7385 microcode.\n"); rc = 1; } #endif return rc; } #if defined(CONFIG_OF_BOARD_SETUP) int ft_board_setup(void *blob, bd_t *bd) { ft_cpu_setup(blob, bd); #ifdef CONFIG_PCI ft_pci_setup(blob, bd); #endif return 0; } #endif #else /* CONFIG_SPL_BUILD */ void board_init_f(ulong bootflag) { board_early_init_f(); NS16550_init((NS16550_t)(CONFIG_SYS_IMMR + 0x4500), CONFIG_SYS_NS16550_CLK / 16 / CONFIG_BAUDRATE); puts("NAND boot... "); timer_init(); dram_init(); relocate_code(CONFIG_SYS_NAND_U_BOOT_RELOC_SP, (gd_t *)gd, CONFIG_SYS_NAND_U_BOOT_RELOC); }
void board_init_f(ulong dummy) { /* * We call relocate_code() with relocation target same as the * CONFIG_SYS_SPL_TEXT_BASE. This will result in relocation getting * skipped. Instead, only .bss initialization will happen. That's * all we need */ debug(">>board_init_f()\n"); relocate_code(CONFIG_SPL_STACK, &gdata, CONFIG_SPL_TEXT_BASE); }
// relocate a general instruction. Called by ChangeWiden class bool Relocator::handle_widen(int bci, int new_ilen, u_char inst_buffer[]) { int ilen = rc_instr_len(bci); if (!relocate_code(bci, ilen, new_ilen - ilen)) return false; // Insert new bytecode(s) for(int k = 0; k < new_ilen; k++) { code_at_put(bci + k, (Bytecodes::Code)inst_buffer[k]); } return true; }
/* Load U-Boot into RAM, initialize BSS, perform relocation adjustments */ void board_init_f(ulong boot_flags) { init_fnc_t **init_fnc_ptr; gd->flags = boot_flags; for (init_fnc_ptr = init_sequence_f; *init_fnc_ptr; ++init_fnc_ptr) { if ((*init_fnc_ptr)() != 0) hang(); } gd->flags |= GD_FLG_RELOC; /* Enter the relocated U-Boot! */ relocate_code(gd->start_addr_sp, gd, gd->relocaddr); /* NOTREACHED - relocate_code() does not return */ while(1); }
/* Load U-Boot into RAM, initialize BSS, perform relocation adjustments */ void board_init_f(ulong boot_flags) { init_fnc_t **init_fnc_ptr; /* * It's ok to have it on the stack as the stack is not going to be changed * until board_init_r() is invoked, and the first thing it does - is copying * *gd to the new location. */ gd_t gd_data_f; gd = &gd_data_f; memset(gd, 0, sizeof(*gd)); gd->flags = boot_flags; #ifdef CONFIG_OF_EMBED /* Get a pointer to the FDT */ gd->fdt_blob = _binary_dt_dtb_start; #elif defined CONFIG_OF_SEPARATE /* FDT is at end of image */ gd->fdt_blob = (ulong *)&__end; #endif /* Allow the early environment to override the fdt address */ gd->fdt_blob = (void *)getenv_ulong("fdtcontroladdr", 16, (uintptr_t)gd->fdt_blob); for (init_fnc_ptr = init_sequence_f; *init_fnc_ptr; ++init_fnc_ptr) { if ((*init_fnc_ptr)() != 0) hang(); } printf("Relocating to %p\n", (void *)gd->relocaddr); gd->flags |= GD_FLG_RELOC; /* Enter the relocated U-Boot! */ relocate_code(gd->start_addr_sp, gd, gd->relocaddr); /* NOTREACHED - relocate_code() does not return */ while (1) ; }
// handle lookup/table switch instructions. Called be ChangeSwitchPad class bool Relocator::handle_switch_pad(int bci, int old_pad, bool is_lookup_switch) { int ilen = rc_instr_len(bci); int new_pad = align(bci+1) - (bci+1); int pad_delta = new_pad - old_pad; if (pad_delta != 0) { int len; if (!is_lookup_switch) { int low = int_at(bci+1+old_pad+4); int high = int_at(bci+1+old_pad+8); len = high-low+1 + 3; // 3 for default, hi, lo. } else { int npairs = int_at(bci+1+old_pad+4); len = npairs*2 + 2; // 2 for default, npairs. } // Because "relocateCode" does a "changeJumps" loop, // which parses instructions to determine their length, // we need to call that before messing with the current // instruction. Since it may also overwrite the current // instruction when moving down, remember the possibly // overwritten part. // Move the code following the instruction... if (!relocate_code(bci, ilen, pad_delta)) return false; if (pad_delta < 0) { // Move the shrunken instruction down. memmove(addr_at(bci + 1 + new_pad), addr_at(bci + 1 + old_pad), len * 4 + pad_delta); memmove(addr_at(bci + 1 + new_pad + len*4 + pad_delta), _overwrite, -pad_delta); } else { assert(pad_delta > 0, "check"); // Move the expanded instruction up. memmove(addr_at(bci +1 + new_pad), addr_at(bci +1 + old_pad), len * 4); memset(addr_at(bci + 1), 0, new_pad); // pad must be 0 } } return true; }
void board_init_f(ulong dummy) { board_init_uart_f(); /* Initialize periph GPIOs */ #ifdef CONFIG_SPI_UART_SWITCH gpio_early_init_uart(); #else gpio_config_uart(); #endif /* * We call relocate_code() with relocation target same as the * CONFIG_SYS_SPL_TEXT_BASE. This will result in relocation getting * skipped. Instead, only .bss initialization will happen. That's * all we need */ debug(">>board_init_f()\n"); relocate_code(CONFIG_SPL_STACK, &gdata, CONFIG_SPL_TEXT_BASE); }
void board_init_f(ulong bootflag) { int px_spd; u32 plat_ratio, sys_clk, bus_clk; ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR; console_init_f(); /* Set pmuxcr to allow both i2c1 and i2c2 */ setbits_be32(&gur->pmuxcr, in_be32(&gur->pmuxcr) | 0x1000); setbits_be32(&gur->pmuxcr, in_be32(&gur->pmuxcr) | MPC85xx_PMUXCR_SD_DATA); #ifdef CONFIG_SPL_SPI_BOOT /* Enable the SPI */ clrsetbits_8(&pixis->brdcfg0, PIXIS_ELBC_SPI_MASK, PIXIS_SPI); #endif /* Read back the register to synchronize the write. */ in_be32(&gur->pmuxcr); /* initialize selected port with appropriate baud rate */ px_spd = in_8((unsigned char *)(PIXIS_BASE + PIXIS_SPD)); sys_clk = sysclk_tbl[px_spd & PIXIS_SPD_SYSCLK_MASK]; plat_ratio = in_be32(&gur->porpllsr) & MPC85xx_PORPLLSR_PLAT_RATIO; bus_clk = sys_clk * plat_ratio / 2; NS16550_init((NS16550_t)CONFIG_SYS_NS16550_COM1, bus_clk / 16 / CONFIG_BAUDRATE); #ifdef CONFIG_SPL_MMC_BOOT puts("\nSD boot...\n"); #elif defined(CONFIG_SPL_SPI_BOOT) puts("\nSPI Flash boot...\n"); #endif /* copy code to RAM and jump to it - this should not return */ /* NOTE - code has to be copied out of NAND buffer before * other blocks can be read. */ relocate_code(CONFIG_SPL_RELOC_STACK, 0, CONFIG_SPL_RELOC_TEXT_BASE); }
void board_init_f(ulong bootflag) { uint plat_ratio, bus_clk, sys_clk; volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); sys_clk = SYSCLK_66; plat_ratio = gur->porpllsr & 0x0000003e; plat_ratio >>= 1; bus_clk = plat_ratio * sys_clk; NS16550_init((NS16550_t)CONFIG_SYS_NS16550_COM1, bus_clk / 16 / CONFIG_BAUDRATE); puts("\nNAND boot... "); /* copy code to DDR and jump to it - this should not return */ /* NOTE - code has to be copied out of NAND buffer before * other blocks can be read. */ relocate_code(CONFIG_SYS_NAND_U_BOOT_RELOC_SP, 0, CONFIG_SYS_NAND_U_BOOT_RELOC); }
void board_init_f(ulong bootflag) { bd_t *bd; ulong len, addr, addr_sp; ulong *s; gd_t *id; init_fnc_t **init_fnc_ptr; #ifdef CONFIG_PRAM ulong reg; #endif /* Pointer is writable since we allocated a register for it */ gd = (gd_t *) (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET); /* compiler optimization barrier needed for GCC >= 3.4 */ __asm__ __volatile__("":::"memory"); #if !defined(CONFIG_CPM2) && !defined(CONFIG_MPC512X) && \ !defined(CONFIG_MPC83xx) && !defined(CONFIG_MPC85xx) && \ !defined(CONFIG_MPC86xx) /* Clear initial global data */ memset((void *) gd, 0, sizeof(gd_t)); #endif gd->flags = bootflag; for (init_fnc_ptr = init_sequence; *init_fnc_ptr; ++init_fnc_ptr) if ((*init_fnc_ptr) () != 0) hang(); #ifdef CONFIG_POST post_bootmode_init(); post_run(NULL, POST_ROM | post_bootmode_get(NULL)); #endif WATCHDOG_RESET(); /* * Now that we have DRAM mapped and working, we can * relocate the code and continue running from DRAM. * * Reserve memory at end of RAM for (top down in that order): * - area that won't get touched by U-Boot and Linux (optional) * - kernel log buffer * - protected RAM * - LCD framebuffer * - monitor code * - board info struct */ len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE; /* * Subtract specified amount of memory to hide so that it won't * get "touched" at all by U-Boot. By fixing up gd->ram_size * the Linux kernel should now get passed the now "corrected" * memory size and won't touch it either. This should work * for arch/ppc and arch/powerpc. Only Linux board ports in * arch/powerpc with bootwrapper support, that recalculate the * memory size from the SDRAM controller setup will have to * get fixed. */ gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE; addr = CONFIG_SYS_SDRAM_BASE + get_effective_memsize(); #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500)) /* * We need to make sure the location we intend to put secondary core * boot code is reserved and not used by any part of u-boot */ if (addr > determine_mp_bootpg(NULL)) { addr = determine_mp_bootpg(NULL); debug("Reserving MP boot page to %08lx\n", addr); } #endif #ifdef CONFIG_LOGBUFFER #ifndef CONFIG_ALT_LB_ADDR /* reserve kernel log buffer */ addr -= (LOGBUFF_RESERVE); debug("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN, addr); #endif #endif #ifdef CONFIG_PRAM /* * reserve protected RAM */ reg = getenv_ulong("pram", 10, CONFIG_PRAM); addr -= (reg << 10); /* size is in kB */ debug("Reserving %ldk for protected RAM at %08lx\n", reg, addr); #endif /* CONFIG_PRAM */ /* round down to next 4 kB limit */ addr &= ~(4096 - 1); debug("Top of RAM usable for U-Boot at: %08lx\n", addr); #ifdef CONFIG_LCD #ifdef CONFIG_FB_ADDR gd->fb_base = CONFIG_FB_ADDR; #else /* reserve memory for LCD display (always full pages) */ addr = lcd_setmem(addr); gd->fb_base = addr; #endif /* CONFIG_FB_ADDR */ #endif /* CONFIG_LCD */ #if defined(CONFIG_VIDEO) && defined(CONFIG_8xx) /* reserve memory for video display (always full pages) */ addr = video_setmem(addr); gd->fb_base = addr; #endif /* CONFIG_VIDEO */ /* * reserve memory for U-Boot code, data & bss * round down to next 4 kB limit */ addr -= len; addr &= ~(4096 - 1); #ifdef CONFIG_E500 /* round down to next 64 kB limit so that IVPR stays aligned */ addr &= ~(65536 - 1); #endif debug("Reserving %ldk for U-Boot at: %08lx\n", len >> 10, addr); /* * reserve memory for malloc() arena */ addr_sp = addr - TOTAL_MALLOC_LEN; debug("Reserving %dk for malloc() at: %08lx\n", TOTAL_MALLOC_LEN >> 10, addr_sp); /* * (permanently) allocate a Board Info struct * and a permanent copy of the "global" data */ addr_sp -= sizeof(bd_t); bd = (bd_t *) addr_sp; memset(bd, 0, sizeof(bd_t)); gd->bd = bd; debug("Reserving %zu Bytes for Board Info at: %08lx\n", sizeof(bd_t), addr_sp); addr_sp -= sizeof(gd_t); id = (gd_t *) addr_sp; debug("Reserving %zu Bytes for Global Data at: %08lx\n", sizeof(gd_t), addr_sp); /* * Finally, we set up a new (bigger) stack. * * Leave some safety gap for SP, force alignment on 16 byte boundary * Clear initial stack frame */ addr_sp -= 16; addr_sp &= ~0xF; s = (ulong *) addr_sp; *s = 0; /* Terminate back chain */ *++s = 0; /* NULL return address */ debug("Stack Pointer at: %08lx\n", addr_sp); /* * Save local variables to board info struct */ bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of memory */ bd->bi_memsize = gd->ram_size; /* size in bytes */ #ifdef CONFIG_SYS_SRAM_BASE bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */ bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */ #endif #if defined(CONFIG_8xx) || defined(CONFIG_MPC8260) || defined(CONFIG_5xx) || \ defined(CONFIG_E500) || defined(CONFIG_MPC86xx) bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */ #endif #if defined(CONFIG_MPC5xxx) bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */ #endif #if defined(CONFIG_MPC83xx) bd->bi_immrbar = CONFIG_SYS_IMMR; #endif WATCHDOG_RESET(); bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */ bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */ #if defined(CONFIG_CPM2) bd->bi_cpmfreq = gd->arch.cpm_clk; bd->bi_brgfreq = gd->arch.brg_clk; bd->bi_sccfreq = gd->arch.scc_clk; bd->bi_vco = gd->arch.vco_out; #endif /* CONFIG_CPM2 */ #if defined(CONFIG_MPC512X) bd->bi_ipsfreq = gd->arch.ips_clk; #endif /* CONFIG_MPC512X */ #if defined(CONFIG_MPC5xxx) bd->bi_ipbfreq = gd->arch.ipb_clk; bd->bi_pcifreq = gd->pci_clk; #endif /* CONFIG_MPC5xxx */ #ifdef CONFIG_SYS_EXTBDINFO strncpy((char *) bd->bi_s_version, "1.2", sizeof(bd->bi_s_version)); strncpy((char *) bd->bi_r_version, U_BOOT_VERSION, sizeof(bd->bi_r_version)); bd->bi_procfreq = gd->cpu_clk; /* Processor Speed, In Hz */ bd->bi_plb_busfreq = gd->bus_clk; #if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \ defined(CONFIG_440EP) || defined(CONFIG_440GR) || \ defined(CONFIG_440EPX) || defined(CONFIG_440GRX) bd->bi_pci_busfreq = get_PCI_freq(); bd->bi_opbfreq = get_OPB_freq(); #elif defined(CONFIG_XILINX_405) bd->bi_pci_busfreq = get_PCI_freq(); #endif #endif debug("New Stack Pointer is: %08lx\n", addr_sp); WATCHDOG_RESET(); gd->relocaddr = addr; /* Store relocation addr, useful for debug */ memcpy(id, (void *) gd, sizeof(gd_t)); relocate_code(addr_sp, id, addr); /* NOTREACHED - relocate_code() does not return */ }
void board_init_f(ulong bootflag) { relocate_code(CONFIG_SPL_TEXT_BASE); asm volatile("ldr pc, =nand_boot"); }
void board_init_f(ulong bootflag) { bd_t *bd; init_fnc_t **init_fnc_ptr; gd_t *id; ulong addr, addr_sp; /* Pointer is writable since we allocated a register for it */ gd = (gd_t *) ((CONFIG_SYS_INIT_SP_ADDR) & ~0x07); memset((void *)gd, 0, GENERATED_GBL_DATA_SIZE); gd->mon_len = (unsigned int)(&__bss_end__) - (unsigned int)(&_start); for (init_fnc_ptr = init_sequence; *init_fnc_ptr; ++init_fnc_ptr) { if ((*init_fnc_ptr)() != 0) hang(); } debug("monitor len: %08lX\n", gd->mon_len); /* * Ram is setup, size stored in gd !! */ debug("ramsize: %08lX\n", gd->ram_size); addr = CONFIG_SYS_SDRAM_BASE + gd->ram_size; #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) /* reserve TLB table */ addr -= (4096 * 4); /* round down to next 64 kB limit */ addr &= ~(0x10000 - 1); gd->tlb_addr = addr; debug("TLB table at: %08lx\n", addr); #endif /* round down to next 4 kB limit */ addr &= ~(4096 - 1); debug("Top of RAM usable for U-Boot at: %08lx\n", addr); #ifdef CONFIG_LCD #ifdef CONFIG_FB_ADDR gd->fb_base = CONFIG_FB_ADDR; #else /* reserve memory for LCD display (always full pages) */ addr = lcd_setmem(addr); gd->fb_base = addr; #endif /* CONFIG_FB_ADDR */ #endif /* CONFIG_LCD */ /* * reserve memory for U-Boot code, data & bss * round down to next 4 kB limit */ addr -= gd->mon_len; addr &= ~(4096 - 1); debug("Reserving %ldk for U-Boot at: %08lx\n", gd->mon_len >> 10, addr); /* * reserve memory for malloc() arena */ addr_sp = addr - TOTAL_MALLOC_LEN; debug("Reserving %dk for malloc() at: %08lx\n", TOTAL_MALLOC_LEN >> 10, addr_sp); /* * (permanently) allocate a Board Info struct * and a permanent copy of the "global" data */ addr_sp -= GENERATED_BD_INFO_SIZE; bd = (bd_t *) addr_sp; gd->bd = bd; memset((void *)bd, 0, GENERATED_BD_INFO_SIZE); debug("Reserving %zu Bytes for Board Info at: %08lx\n", GENERATED_BD_INFO_SIZE, addr_sp); addr_sp -= GENERATED_GBL_DATA_SIZE; id = (gd_t *) addr_sp; debug("Reserving %zu Bytes for Global Data at: %08lx\n", GENERATED_GBL_DATA_SIZE, addr_sp); /* setup stackpointer for exeptions */ gd->irq_sp = addr_sp; #ifdef CONFIG_USE_IRQ addr_sp -= (CONFIG_STACKSIZE_IRQ + CONFIG_STACKSIZE_FIQ); debug("Reserving %zu Bytes for IRQ stack at: %08lx\n", CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ, addr_sp); #endif /* leave 3 words for abort-stack */ addr_sp -= 12; /* 8-byte alignment for ABI compliance */ addr_sp &= ~0x07; debug("New Stack Pointer is: %08lx\n", addr_sp); gd->bd->bi_baudrate = gd->baudrate; /* Ram isn't board specific, so move it to board code ... */ dram_init_banksize(); display_dram_config(); /* and display it */ gd->relocaddr = addr; gd->start_addr_sp = addr_sp; gd->reloc_off = addr - _TEXT_BASE; debug("relocation Offset is: %08lx\n", gd->reloc_off); memcpy(id, (void *)gd, GENERATED_GBL_DATA_SIZE); relocate_code(addr_sp, id, addr); /* NOTREACHED - relocate_code() does not return */ }
// handle jump_widen instruction. Called be ChangeJumpWiden class bool Relocator::handle_jump_widen(int bci, int delta) { int ilen = rc_instr_len(bci); Bytecodes::Code bc = code_at(bci); switch (bc) { case Bytecodes::_ifeq: case Bytecodes::_ifne: case Bytecodes::_iflt: case Bytecodes::_ifge: case Bytecodes::_ifgt: case Bytecodes::_ifle: case Bytecodes::_if_icmpeq: case Bytecodes::_if_icmpne: case Bytecodes::_if_icmplt: case Bytecodes::_if_icmpge: case Bytecodes::_if_icmpgt: case Bytecodes::_if_icmple: case Bytecodes::_if_acmpeq: case Bytecodes::_if_acmpne: case Bytecodes::_ifnull: case Bytecodes::_ifnonnull: { const int goto_length = Bytecodes::length_for(Bytecodes::_goto); // If 'if' points to the next bytecode after goto, it's already handled. // it shouldn't be. assert (short_at(bci+1) != ilen+goto_length, "if relocation already handled"); assert(ilen == 3, "check length"); // Convert to 0 if <cond> goto 6 // 3 _goto 11 // 6 _goto_w <wide delta offset> // 11 <else code> const int goto_w_length = Bytecodes::length_for(Bytecodes::_goto_w); const int add_bci = goto_length + goto_w_length; if (!relocate_code(bci, 3, /*delta*/add_bci)) return false; // if bytecode points to goto_w instruction short_at_put(bci + 1, ilen + goto_length); int cbci = bci + ilen; // goto around code_at_put(cbci, Bytecodes::_goto); short_at_put(cbci + 1, add_bci); // goto_w <wide delta> cbci = cbci + goto_length; code_at_put(cbci, Bytecodes::_goto_w); if (delta > 0) { delta += 2; // goto_w is 2 bytes more than "if" code } else { delta -= ilen+goto_length; // branch starts at goto_w offset } int_at_put(cbci + 1, delta); break; } case Bytecodes::_goto: case Bytecodes::_jsr: assert(ilen == 3, "check length"); if (!relocate_code(bci, 3, 2)) return false; if (bc == Bytecodes::_goto) code_at_put(bci, Bytecodes::_goto_w); else code_at_put(bci, Bytecodes::_jsr_w); // If it's a forward jump, add 2 for the widening. if (delta > 0) delta += 2; int_at_put(bci + 1, delta); break; default: ShouldNotReachHere(); } return true; }
void board_init_f(ulong board_type) { gd_t gd_data; gd_t *new_gd; bd_t *bd; unsigned long *new_sp; unsigned long monitor_len; unsigned long monitor_addr; unsigned long addr; long sdram_size; /* Initialize the global data pointer */ memset(&gd_data, 0, sizeof(gd_data)); gd = &gd_data; /* Perform initialization sequence */ board_early_init_f(); cpu_init(); board_postclk_init(); env_init(); init_baudrate(); serial_init(); console_init_f(); display_banner(); sdram_size = initdram(board_type); /* If we have no SDRAM, we can't go on */ if (sdram_size <= 0) panic("No working SDRAM available\n"); /* * Now that we have DRAM mapped and working, we can * relocate the code and continue running from DRAM. * * Reserve memory at end of RAM for (top down in that order): * - u-boot image * - heap for malloc() * - board info struct * - global data struct * - stack */ addr = CONFIG_SYS_SDRAM_BASE + sdram_size; monitor_len = __bss_end__ - _text; /* * Reserve memory for u-boot code, data and bss. * Round down to next 4 kB limit. */ addr -= monitor_len; addr &= ~(4096UL - 1); monitor_addr = addr; /* Reserve memory for malloc() */ addr -= CONFIG_SYS_MALLOC_LEN; #ifdef CONFIG_SYS_DMA_ALLOC_LEN /* Reserve DMA memory (must be cache aligned) */ addr &= ~(CONFIG_SYS_DCACHE_LINESZ - 1); addr -= CONFIG_SYS_DMA_ALLOC_LEN; #endif #ifdef CONFIG_LCD #ifdef CONFIG_FB_ADDR printf("LCD: Frame buffer allocated at preset 0x%08x\n", CONFIG_FB_ADDR); gd->fb_base = (void *)CONFIG_FB_ADDR; #else addr = lcd_setmem(addr); printf("LCD: Frame buffer allocated at 0x%08lx\n", addr); gd->fb_base = (void *)addr; #endif /* CONFIG_FB_ADDR */ #endif /* CONFIG_LCD */ /* Allocate a Board Info struct on a word boundary */ addr -= sizeof(bd_t); addr &= ~3UL; gd->bd = bd = (bd_t *)addr; /* Allocate a new global data copy on a 8-byte boundary. */ addr -= sizeof(gd_t); addr &= ~7UL; new_gd = (gd_t *)addr; /* And finally, a new, bigger stack. */ new_sp = (unsigned long *)addr; gd->stack_end = addr; *(--new_sp) = 0; *(--new_sp) = 0; /* * Initialize the board information struct with the * information we have. */ bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; bd->bi_dram[0].size = sdram_size; bd->bi_baudrate = gd->baudrate; memcpy(new_gd, gd, sizeof(gd_t)); relocate_code((unsigned long)new_sp, new_gd, monitor_addr); }
static void relocate_db(prolog_database *db, block_info *old_blocks) { int i; /* Do offsets */ #define FIX_OFFSET(p) fix_offset(((void **)p), db, old_blocks) /* Fix pointers in amheader */ FIX_OFFSET(&db->als_mem->freelist); { long *p; for (p = db->als_mem->freelist; p; p = FB_NEXT(p)) { if (FB_NEXT(p)) FIX_OFFSET(&FB_NEXT(p)); } } /* Fix db pointers */ FIX_OFFSET(&db->top_module); FIX_OFFSET(&db->module_stack); FIX_OFFSET(&db->top_clausegroup); FIX_OFFSET(&db->clausegroup_stack); FIX_OFFSET(&db->module_table); FIX_OFFSET(&db->use_table); FIX_OFFSET(&db->default_uses); FIX_OFFSET(&db->default_procs); FIX_OFFSET(&db->toktable); FIX_OFFSET(&db->hashtable); for (i = 0; i < db->ts_prime; i++) { FIX_OFFSET(&db->toktable[i].tkname); if (db->hashtable[i]) FIX_OFFSET(&db->hashtable[i]); } FIX_OFFSET(&db->strings); FIX_OFFSET(&db->strings_last); FIX_OFFSET(&db->strings_next); FIX_OFFSET(&db->char_to_tok_map); FIX_OFFSET(&db->w_freeptr); { long *p; for (p = db->w_freeptr; 1; ) { FIX_OFFSET((long **)p+WCI_BLINK); FIX_OFFSET((long **)p+WCI_FLINK); p = *((long **) p + WCI_FLINK); if (p == db->w_freeptr) break; } } FIX_OFFSET(&db->w_tofreelist); { long *p; p = db->w_tofreelist; while (p) { if (*((long **) p + WCI_NEXTCLAUSEADDR)) FIX_OFFSET((long **) p + WCI_NEXTCLAUSEADDR); p = *((long **) p + WCI_NEXTCLAUSEADDR); } } FIX_OFFSET(&db->w_nametable); { for (i = 0; i < NTBL_SIZE; i++) { if (db->w_nametable[i]) { FIX_OFFSET(&db->w_nametable[i]); if (db->w_nametable[i]->first_clause) { long *p; FIX_OFFSET(&db->w_nametable[i]->first_clause); p = db->w_nametable[i]->first_clause; while (p) { FIX_OFFSET(&nextClauseAddr(p)); relocate_code(choiceEntry(p), sizeCode(p), db, old_blocks); p = next_clause(p); } } if (db->w_nametable[i]->last_clause) FIX_OFFSET(&db->w_nametable[i]->last_clause); if (db->w_nametable[i]->index_block) { long *p; FIX_OFFSET(&db->w_nametable[i]->index_block); p = db->w_nametable[i]->index_block; relocate_code(choiceEntry(p)+2, sizeCode(p), db, old_blocks); } relocate_code(db->w_nametable[i]->overflow, (int) (NTBL_OVERFLOWSIZE + NTBL_CALLENTRYSIZE + NTBL_EXECENTRYSIZE + NTBL_CODESIZE), db, old_blocks); } } } FIX_OFFSET(&db->codeblock_list); { struct codeblock *p; for (p = db->codeblock_list; p; p = p->next) { FIX_OFFSET(&p->addr); FIX_OFFSET(&p->next); } } FIX_OFFSET(&db->ane_entbase); FIX_OFFSET(&db->ane_entptr); FIX_OFFSET(&db->wm_fail); relocate_code(db->wm_fail, 64, db, old_blocks); FIX_OFFSET(&db->wm_trust_fail); FIX_OFFSET(&db->wm_return_success); FIX_OFFSET(&db->wm_special); FIX_OFFSET(&db->wm_rungoal_code); FIX_OFFSET(&db->wm_panic); FIX_OFFSET(&db->wm_cutaddr); FIX_OFFSET(&db->wm_overcode); FIX_OFFSET(&db->rungoal_modpatch); FIX_OFFSET(&db->rungoal_goalpatch); #undef FIX_OFFSET }
void board_init_f(ulong bootflag) { gd_t gd_data, *id; bd_t *bd; init_fnc_t **init_fnc_ptr; ulong addr, addr_sp, len = (ulong)&uboot_end - CONFIG_SYS_MONITOR_BASE; ulong *s; /* Pointer is writable since we allocated a register for it. */ gd = &gd_data; /* compiler optimization barrier needed for GCC >= 3.4 */ __asm__ __volatile__("" : : : "memory"); memset((void *)gd, 0, sizeof(gd_t)); for (init_fnc_ptr = init_sequence; *init_fnc_ptr; ++init_fnc_ptr) { if ((*init_fnc_ptr)() != 0) hang(); } /* * Now that we have DRAM mapped and working, we can * relocate the code and continue running from DRAM. */ addr = CONFIG_SYS_SDRAM_BASE + gd->ram_size; /* We can reserve some RAM "on top" here. */ /* round down to next 4 kB limit. */ addr &= ~(4096 - 1); debug("Top of RAM usable for U-Boot at: %08lx\n", addr); /* Reserve memory for U-Boot code, data & bss * round down to next 16 kB limit */ addr -= len; addr &= ~(16 * 1024 - 1); debug("Reserving %ldk for U-Boot at: %08lx\n", len >> 10, addr); /* Reserve memory for malloc() arena. */ addr_sp = addr - TOTAL_MALLOC_LEN; debug("Reserving %dk for malloc() at: %08lx\n", TOTAL_MALLOC_LEN >> 10, addr_sp); /* * (permanently) allocate a Board Info struct * and a permanent copy of the "global" data */ addr_sp -= sizeof(bd_t); bd = (bd_t *)addr_sp; gd->bd = bd; debug("Reserving %zu Bytes for Board Info at: %08lx\n", sizeof(bd_t), addr_sp); addr_sp -= sizeof(gd_t); id = (gd_t *)addr_sp; debug("Reserving %zu Bytes for Global Data at: %08lx\n", sizeof(gd_t), addr_sp); /* Reserve memory for boot params. */ addr_sp -= CONFIG_SYS_BOOTPARAMS_LEN; bd->bi_boot_params = addr_sp; debug("Reserving %dk for boot params() at: %08lx\n", CONFIG_SYS_BOOTPARAMS_LEN >> 10, addr_sp); /* * Finally, we set up a new (bigger) stack. * * Leave some safety gap for SP, force alignment on 16 byte boundary * Clear initial stack frame */ addr_sp -= 16; addr_sp &= ~0xF; s = (ulong *)addr_sp; *s-- = 0; *s-- = 0; addr_sp = (ulong)s; debug("Stack Pointer at: %08lx\n", addr_sp); /* * Save local variables to board info struct */ bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of DRAM */ bd->bi_memsize = gd->ram_size; /* size of DRAM in bytes */ bd->bi_baudrate = gd->baudrate; /* Console Baudrate */ memcpy(id, (void *)gd, sizeof(gd_t)); relocate_code(addr_sp, id, addr); /* NOTREACHED - relocate_code() does not return */ }
/* 划分系统内存使用 初始化设备,开发板,打印提示信息 */ void board_init_f(ulong bootflag) { bd_t *bd; init_fnc_t **init_fnc_ptr; gd_t *id; ulong addr, addr_sp;/*addr将指向用户正常访问的最高地址+1的位置;addr_sp指向堆起始位置 */ #ifdef CONFIG_PRAM ulong reg; #endif bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f"); /* Pointer is writable since we allocated a register for it */ gd = (gd_t *) ((CONFIG_SYS_INIT_SP_ADDR) & ~0x07); /* compiler optimization barrier needed for GCC >= 3.4 */ __asm__ __volatile__("": : :"memory");//告诉编译器内存已被修改 memset((void *)gd, 0, sizeof(gd_t)); gd->mon_len = _bss_end_ofs;// data & bss段大小总和 #ifdef CONFIG_OF_EMBED /* Get a pointer to the FDT */ gd->fdt_blob = _binary_dt_dtb_start; #elif defined CONFIG_OF_SEPARATE /* FDT is at end of image */ gd->fdt_blob = (void *)(_end_ofs + _TEXT_BASE); #endif /* Allow the early environment to override the fdt address */ gd->fdt_blob = (void *)getenv_ulong("fdtcontroladdr", 16, (uintptr_t)gd->fdt_blob); //执行init_fnc_ptr函数指针数组中的各个初始化函数 for (init_fnc_ptr = init_sequence; *init_fnc_ptr; ++init_fnc_ptr) { if ((*init_fnc_ptr)() != 0) { //如果板的初始化函数序列出错,死循环 hang (); } } #ifdef CONFIG_OF_CONTROL /* For now, put this check after the console is ready */ if (fdtdec_prepare_fdt()) { panic("** CONFIG_OF_CONTROL defined but no FDT - please see " "doc/README.fdt-control"); } #endif debug("monitor len: %08lX\n", gd->mon_len); /* * Ram is setup, size stored in gd !! */ debug("ramsize: %08lX\n", gd->ram_size); #if defined(CONFIG_SYS_MEM_TOP_HIDE) /* * Subtract specified amount of memory to hide so that it won't * get "touched" at all by U-Boot. By fixing up gd->ram_size * the Linux kernel should now get passed the now "corrected" * memory size and won't touch it either. This should work * for arch/ppc and arch/powerpc. Only Linux board ports in * arch/powerpc with bootwrapper support, that recalculate the * memory size from the SDRAM controller setup will have to * get fixed. */ gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE; #endif /*设置addr = SDRAM起始地址+SDRAM_SIZE*/ addr = CONFIG_SYS_SDRAM_BASE + gd->ram_size; #ifdef CONFIG_LOGBUFFER #ifndef CONFIG_ALT_LB_ADDR /* reserve kernel log buffer */ addr -= (LOGBUFF_RESERVE); debug("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN, addr); #endif #endif #ifdef CONFIG_PRAM /* * reserve protected RAM */ reg = getenv_ulong("pram", 10, CONFIG_PRAM); addr -= (reg << 10); /* size is in kB */ debug("Reserving %ldk for protected RAM at %08lx\n", reg, addr); #endif /* CONFIG_PRAM */ #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) /* reserve TLB table */ addr -= (4096 * 4); /* round down to next 64 kB limit */ addr &= ~(0x10000 - 1); gd->tlb_addr = addr; debug("TLB table at: %08lx\n", addr); #endif /* round down to next 4 kB limit */ addr &= ~(4096 - 1); debug("Top of RAM usable for U-Boot at: %08lx\n", addr); #ifdef CONFIG_LCD #ifdef CONFIG_FB_ADDR gd->fb_base = CONFIG_FB_ADDR; #else /* reserve memory for LCD display (always full pages) */ addr = lcd_setmem(addr); gd->fb_base = addr; #endif /* CONFIG_FB_ADDR */ #endif /* CONFIG_LCD */ /* * reserve memory for U-Boot code, data & bss * round down to next 4 kB limit */ addr -= gd->mon_len; addr &= ~(4096 - 1); debug("Reserving %ldk for U-Boot at: %08lx\n", gd->mon_len >> 10, addr); #ifndef CONFIG_SPL_BUILD /* * reserve memory for malloc() arena */ addr_sp = addr - TOTAL_MALLOC_LEN; debug("Reserving %dk for malloc() at: %08lx\n", TOTAL_MALLOC_LEN >> 10, addr_sp); /* * (permanently) allocate a Board Info struct * and a permanent copy of the "global" data */ addr_sp -= sizeof (bd_t); bd = (bd_t *) addr_sp; gd->bd = bd; debug("Reserving %zu Bytes for Board Info at: %08lx\n", sizeof (bd_t), addr_sp); #ifdef CONFIG_MACH_TYPE gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */ #endif addr_sp -= sizeof (gd_t);/*为gd在DRAM中保留存储空间*/ id = (gd_t *) addr_sp; debug("Reserving %zu Bytes for Global Data at: %08lx\n", sizeof (gd_t), addr_sp); /* setup stackpointer for exeptions */ gd->irq_sp = addr_sp; #ifdef CONFIG_USE_IRQ addr_sp -= (CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ); debug("Reserving %zu Bytes for IRQ stack at: %08lx\n", CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ, addr_sp); #endif /* leave 3 words for abort-stack */ addr_sp -= 12; /* 8-byte alignment for ABI compliance */ addr_sp &= ~0x07; #else addr_sp += 128; /* leave 32 words for abort-stack */ gd->irq_sp = addr_sp; #endif debug("New Stack Pointer is: %08lx\n", addr_sp); #ifdef CONFIG_POST post_bootmode_init(); post_run(NULL, POST_ROM | post_bootmode_get(0)); #endif gd->bd->bi_baudrate = gd->baudrate; /* Ram ist board specific, so move it to board code ... */ dram_init_banksize(); display_dram_config(); /* and display it */ gd->relocaddr = addr; gd->start_addr_sp = addr_sp; gd->reloc_off = addr - _TEXT_BASE; debug("relocation Offset is: %08lx\n", gd->reloc_off); memcpy(id, (void *)gd, sizeof(gd_t)); relocate_code(addr_sp, id, addr); /* NOTREACHED - relocate_code() does not return */ }
void board_init_f (ulong bootflag) { relocate_code (CONFIG_SYS_TEXT_BASE - TOTAL_MALLOC_LEN, NULL, CONFIG_SYS_TEXT_BASE); }
void board_init_f(ulong bootflag) { bd_t *bd; init_fnc_t **init_fnc_ptr; gd_t *id; ulong addr, addr_sp; /* Pointer is writable since we allocated a register for it */ gd = (gd_t *) ((CONFIG_SYS_INIT_SP_ADDR) & ~0x07); /* compiler optimization barrier needed for GCC >= 3.4 */ __asm__ __volatile__("": : :"memory"); memset((void *)gd, 0, sizeof(gd_t)); gd->mon_len = _bss_end_ofs; #ifdef CONFIG_MACH_TYPE gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */ #endif for (init_fnc_ptr = init_sequence; *init_fnc_ptr; ++init_fnc_ptr) { if ((*init_fnc_ptr)() != 0) { hang (); } } debug("monitor len: %08lX\n", gd->mon_len); /* * Ram is setup, size stored in gd !! */ debug("ramsize: %08lX\n", gd->ram_size); #if defined(CONFIG_SYS_MEM_TOP_HIDE) /* * Subtract specified amount of memory to hide so that it won't * get "touched" at all by U-Boot. By fixing up gd->ram_size * the Linux kernel should now get passed the now "corrected" * memory size and won't touch it either. This should work * for arch/ppc and arch/powerpc. Only Linux board ports in * arch/powerpc with bootwrapper support, that recalculate the * memory size from the SDRAM controller setup will have to * get fixed. */ gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE; #endif addr = CONFIG_SYS_SDRAM_BASE + gd->ram_size; #ifdef CONFIG_LOGBUFFER #ifndef CONFIG_ALT_LB_ADDR /* reserve kernel log buffer */ addr -= (LOGBUFF_RESERVE); debug("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN, addr); #endif #endif #ifdef CONFIG_PRAM /* * reserve protected RAM */ i = getenv_r("pram", (char *)tmp, sizeof(tmp)); reg = (i > 0) ? simple_strtoul((const char *)tmp, NULL, 10) : CONFIG_PRAM; addr -= (reg << 10); /* size is in kB */ debug("Reserving %ldk for protected RAM at %08lx\n", reg, addr); #endif /* CONFIG_PRAM */ #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) /* reserve TLB table */ addr -= (4096 * 4); /* round down to next 64 kB limit */ addr &= ~(0x10000 - 1); gd->tlb_addr = addr; debug("TLB table at: %08lx\n", addr); #endif /* round down to next 4 kB limit */ addr &= ~(4096 - 1); debug("Top of RAM usable for U-Boot at: %08lx\n", addr); #ifdef CONFIG_LCD #ifdef CONFIG_FB_ADDR gd->fb_base = CONFIG_FB_ADDR; #else /* reserve memory for LCD display (always full pages) */ addr = lcd_setmem(addr); gd->fb_base = addr; #endif /* CONFIG_FB_ADDR */ #endif /* CONFIG_LCD */ /* * reserve memory for U-Boot code, data & bss * round down to next 4 kB limit */ addr -= gd->mon_len; addr &= ~(4096 - 1); debug("Reserving %ldk for U-Boot at: %08lx\n", gd->mon_len >> 10, addr); #ifndef CONFIG_SPL_BUILD /* * reserve memory for malloc() arena */ addr_sp = addr - TOTAL_MALLOC_LEN; debug("Reserving %dk for malloc() at: %08lx\n", TOTAL_MALLOC_LEN >> 10, addr_sp); /* * (permanently) allocate a Board Info struct * and a permanent copy of the "global" data */ addr_sp -= sizeof (bd_t); bd = (bd_t *) addr_sp; gd->bd = bd; debug("Reserving %zu Bytes for Board Info at: %08lx\n", sizeof (bd_t), addr_sp); addr_sp -= sizeof (gd_t); id = (gd_t *) addr_sp; debug("Reserving %zu Bytes for Global Data at: %08lx\n", sizeof (gd_t), addr_sp); /* setup stackpointer for exeptions */ gd->irq_sp = addr_sp; #ifdef CONFIG_USE_IRQ addr_sp -= (CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ); debug("Reserving %zu Bytes for IRQ stack at: %08lx\n", CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ, addr_sp); #endif /* leave 3 words for abort-stack */ addr_sp -= 12; /* 8-byte alignment for ABI compliance */ addr_sp &= ~0x07; #else addr_sp += 128; /* leave 32 words for abort-stack */ gd->irq_sp = addr_sp; #endif debug("New Stack Pointer is: %08lx\n", addr_sp); #ifdef CONFIG_POST post_bootmode_init(); post_run(NULL, POST_ROM | post_bootmode_get(0)); #endif gd->bd->bi_baudrate = gd->baudrate; /* Ram ist board specific, so move it to board code ... */ dram_init_banksize(); display_dram_config(); /* and display it */ gd->relocaddr = addr; gd->start_addr_sp = addr_sp; gd->reloc_off = addr - _TEXT_BASE; debug("relocation Offset is: %08lx\n", gd->reloc_off); memcpy(id, (void *)gd, sizeof(gd_t)); relocate_code(addr_sp, id, addr); /* NOTREACHED - relocate_code() does not return */ }
void board_init_f(ulong dummy) { dm36x_lowlevel_init(0); relocate_code(CONFIG_SPL_STACK, NULL, CONFIG_SPL_TEXT_BASE); }