static noinline int tegra_cpu_speed_balance(void)
{
    unsigned long highest_speed = tegra_cpu_highest_speed();
    unsigned long balanced_speed = highest_speed * balance_level / 100;
    unsigned long skewed_speed = balanced_speed / 2;
    unsigned int nr_cpus = num_online_cpus();
    unsigned int max_cpus = pm_qos_request(PM_QOS_MAX_ONLINE_CPUS) ? : 4;
    unsigned int min_cpus = pm_qos_request(PM_QOS_MIN_ONLINE_CPUS);

    /* balanced: freq targets for all CPUs are above 50% of highest speed
       biased: freq target for at least one CPU is below 50% threshold
       skewed: freq targets for at least 2 CPUs are below 25% threshold */
    if (((tegra_count_slow_cpus(skewed_speed) >= 2) ||
            tegra_cpu_edp_favor_down(nr_cpus, mp_overhead) ||
            (highest_speed <= idle_bottom_freq) || (nr_cpus > max_cpus)) &&
            (nr_cpus > min_cpus))
        return TEGRA_CPU_SPEED_SKEWED;

    if (((tegra_count_slow_cpus(balanced_speed) >= 1) ||
            (!tegra_cpu_edp_favor_up(nr_cpus, mp_overhead)) ||
            (highest_speed <= idle_bottom_freq) || (nr_cpus == max_cpus)) &&
            (nr_cpus >= min_cpus))
        return TEGRA_CPU_SPEED_BIASED;

    return TEGRA_CPU_SPEED_BALANCED;
}
static noinline int tegra_cpu_speed_balance(void)
{
	unsigned long highest_speed = tegra_cpu_highest_speed();
	unsigned long balanced_speed = highest_speed * balance_level / 100;
	unsigned long skewed_speed = balanced_speed / 2;
	unsigned int nr_cpus = num_online_cpus();
	unsigned int max_cpus = pm_qos_request(PM_QOS_MAX_ONLINE_CPUS) ? : 4;
	unsigned int min_cpus = pm_qos_request(PM_QOS_MIN_ONLINE_CPUS);
	unsigned int avg_nr_run = avg_nr_running();
	unsigned int nr_run;

	/* Evaluate:
	 * - distribution of freq targets for already on-lined CPUs
	 * - average number of runnable threads
	 * - effective MIPS available within EDP frequency limits,
	 * and return:
	 * TEGRA_CPU_SPEED_BALANCED to bring one more CPU core on-line
	 * TEGRA_CPU_SPEED_BIASED to keep CPU core composition unchanged
	 * TEGRA_CPU_SPEED_SKEWED to remove CPU core off-line
	 */

	unsigned int *current_profile = rt_profiles[rt_profile_sel];
	for (nr_run = 1; nr_run < ARRAY_SIZE(rt_profile_default); nr_run++) {
		unsigned int nr_threshold = current_profile[nr_run - 1];
		if (nr_run_last <= nr_run)
			nr_threshold += nr_run_hysteresis;
		if (avg_nr_run <= (nr_threshold << (FSHIFT - NR_FSHIFT)))
			break;
	}
	nr_run_last = nr_run;

//                           
#ifdef CONFIG_MACH_X3
	if(threads_count_hotplug_control_enable == 0 && highest_speed >= 640000 )
		nr_run++;
#endif

	if (((tegra_count_slow_cpus(skewed_speed) >= 2) ||
	     (nr_run < nr_cpus) ||
	     tegra_cpu_edp_favor_down(nr_cpus, mp_overhead) ||
	     (highest_speed <= idle_bottom_freq) || (nr_cpus > max_cpus)) &&
	    (nr_cpus > min_cpus))
		return TEGRA_CPU_SPEED_SKEWED;

	if (((tegra_count_slow_cpus(balanced_speed) >= 1) ||
	     (nr_run <= nr_cpus) ||
	     (!tegra_cpu_edp_favor_up(nr_cpus, mp_overhead)) ||
	     (highest_speed <= idle_bottom_freq) || (nr_cpus == max_cpus)) &&
	    (nr_cpus >= min_cpus))
		return TEGRA_CPU_SPEED_BIASED;

	return TEGRA_CPU_SPEED_BALANCED;
}