Exemple #1
0
/**
 * Debug a transfer request block (TRB).
 */
void xhci_debug_trb(struct xhci_hcd *xhci, union xhci_trb *trb)
{
	u64	address;
	u32	type = le32_to_cpu(trb->link.control) & TRB_TYPE_BITMASK;

	switch (type) {
	case TRB_TYPE(TRB_LINK):
		xhci_dbg(xhci, "Link TRB:\n");
		xhci_print_trb_offsets(xhci, trb);

		address = le64_to_cpu(trb->link.segment_ptr);
		xhci_dbg(xhci, "Next ring segment DMA address = 0x%llx\n", address);

		xhci_dbg(xhci, "Interrupter target = 0x%x\n",
			 GET_INTR_TARGET(le32_to_cpu(trb->link.intr_target)));
		xhci_dbg(xhci, "Cycle bit = %u\n",
			 le32_to_cpu(trb->link.control) & TRB_CYCLE);
		xhci_dbg(xhci, "Toggle cycle bit = %u\n",
			 le32_to_cpu(trb->link.control) & LINK_TOGGLE);
		xhci_dbg(xhci, "No Snoop bit = %u\n",
			 le32_to_cpu(trb->link.control) & TRB_NO_SNOOP);
		break;
	case TRB_TYPE(TRB_TRANSFER):
		address = le64_to_cpu(trb->trans_event.buffer);
		/*
		 * FIXME: look at flags to figure out if it's an address or if
		 * the data is directly in the buffer field.
		 */
		xhci_dbg(xhci, "DMA address or buffer contents= %llu\n", address);
		break;
	case TRB_TYPE(TRB_COMPLETION):
		address = le64_to_cpu(trb->event_cmd.cmd_trb);
		xhci_dbg(xhci, "Command TRB pointer = %llu\n", address);
		xhci_dbg(xhci, "Completion status = %u\n",
			 GET_COMP_CODE(le32_to_cpu(trb->event_cmd.status)));
		xhci_dbg(xhci, "Flags = 0x%x\n",
			 le32_to_cpu(trb->event_cmd.flags));
		break;
	default:
		xhci_dbg(xhci, "Unknown TRB with TRB type ID %u\n",
				(unsigned int) type>>10);
		xhci_print_trb_offsets(xhci, trb);
		break;
	}
}
Exemple #2
0
/**
 * Debug a transfer request block (TRB).
 */
void xhci_debug_trb(struct xhci_hcd *xhci, union xhci_trb *trb)
{
	u64	address;
#if 0   /* original code */
	u32	type = xhci_readl(xhci, &trb->link.control) & TRB_TYPE_BITMASK;
#else /* 2010/6/28,2010/7/16 modified by Panasonic for little-endian
         access to the data structures in host memory */
	u32	type = xhci_desc_readl(xhci, &trb->link.control) & TRB_TYPE_BITMASK;
#endif

	switch (type) {
	case TRB_TYPE(TRB_LINK):
		xhci_dbg(xhci, "Link TRB:\n");
		xhci_print_trb_offsets(xhci, trb);

#if 0   /* original code */
		address = trb->link.segment_ptr;
		xhci_dbg(xhci, "Next ring segment DMA address = 0x%llx\n", address);
		xhci_dbg(xhci, "Interrupter target = 0x%x\n",
				GET_INTR_TARGET(trb->link.intr_target));
		xhci_dbg(xhci, "Cycle bit = %u\n",
				(unsigned int) (trb->link.control & TRB_CYCLE));
		xhci_dbg(xhci, "Toggle cycle bit = %u\n",
				(unsigned int) (trb->link.control & LINK_TOGGLE));
		xhci_dbg(xhci, "No Snoop bit = %u\n",
				(unsigned int) (trb->link.control & TRB_NO_SNOOP));
#else /* 2010/6/28,2010/7/16 modified by Panasonic for little-endian
         access to the data structures in host memory */
		address = xhci_desc_read_64(xhci, &trb->link.segment_ptr);
		xhci_dbg(xhci, "Next ring segment DMA address = 0x%llx\n", address);
		xhci_dbg(xhci, "Interrupter target = 0x%x\n",
                 GET_INTR_TARGET(xhci_desc_readl(xhci, &trb->link.intr_target)));
		xhci_dbg(xhci, "Cycle bit = %u\n",
                 (unsigned int) (xhci_desc_readl(xhci, &trb->link.control) & TRB_CYCLE));
		xhci_dbg(xhci, "Toggle cycle bit = %u\n",
                 (unsigned int) (xhci_desc_readl(xhci, &trb->link.control) & LINK_TOGGLE));
		xhci_dbg(xhci, "No Snoop bit = %u\n",
                 (unsigned int) (xhci_desc_readl(xhci, &trb->link.control) & TRB_NO_SNOOP));
#endif
		break;
	case TRB_TYPE(TRB_TRANSFER):
#if 0 /* original code */
		address = trb->trans_event.buffer;
#else /* 2010/6/28,2010/7/16 modified by Panasonic for little-endian
         access to the data structures in host memory */
		address = xhci_desc_read_64(xhci, &trb->trans_event.buffer);
#endif
		/*
		 * FIXME: look at flags to figure out if it's an address or if
		 * the data is directly in the buffer field.
		 */
		xhci_dbg(xhci, "DMA address or buffer contents= %llu\n", address);
		break;
	case TRB_TYPE(TRB_COMPLETION):
#if 0 /* original code */
		address = trb->event_cmd.cmd_trb;
		xhci_dbg(xhci, "Command TRB pointer = %llu\n", address);
		xhci_dbg(xhci, "Completion status = %u\n",
				(unsigned int) GET_COMP_CODE(trb->event_cmd.status));
		xhci_dbg(xhci, "Flags = 0x%x\n", (unsigned int) trb->event_cmd.flags);
#else /* 2010/6/28,2010/7/16 modified by Panasonic for little-endian
         access to the data structures in host memory */
		address = xhci_desc_read_64(xhci, &trb->event_cmd.cmd_trb);
		xhci_dbg(xhci, "Command TRB pointer = %llu\n", address);
		xhci_dbg(xhci, "Completion status = %u\n",
                 (unsigned int) GET_COMP_CODE(xhci_desc_readl(xhci, &trb->event_cmd.status)));
		xhci_dbg(xhci, "Flags = 0x%x\n", (unsigned int) xhci_desc_readl(xhci, &trb->event_cmd.flags));
#endif
		break;
	default:
		xhci_dbg(xhci, "Unknown TRB with TRB type ID %u\n",
				(unsigned int) type>>10);
		xhci_print_trb_offsets(xhci, trb);
		break;
	}
}