// Initialize all IEC lines to idle
struct ProtocolFunctions *
iec_init()
{
iec_release(IO_ATN | IO_CLK | IO_DATA | IO_RESET);
DELAY_US(10);
return &iecFunctions;
}
//
// SCI_SendPacket - Sends a Packet to the host which contains
// status in the data and address. It sends the
// statusCode global variable contents. It then waits
// for an ACK or NAK from the host.
//
Uint16 SCI_SendPacket(Uint16 command, Uint16 status, Uint16 length,
Uint16* data)
{
int i;
SCIA_Flush();
DELAY_US(100000);
SCI_SendWord(0x1BE4);
SCI_SendWord(length);
checksum = 0;
SCI_SendWord(command);
SCI_SendWord(status);
for(i = 0; i < (length-2)/2; i++)
{
SCI_SendWord(*(data + i));
}
SCI_SendChecksum();
SCI_SendWord(0xE41B);
//
// Receive an ACK or NAK
//
return SCIA_GetACK();
}
void InitADC(void)
{
EALLOW;
//write configurations
AdcaRegs.ADCCTL2.bit.PRESCALE = 0X2; //set ADCCLK divider to /4
AdcbRegs.ADCCTL2.bit.PRESCALE = 0X2; //set ADCCLK divider to /4
AdccRegs.ADCCTL2.bit.PRESCALE = 0X2; //set ADCCLK divider to /4
AdcdRegs.ADCCTL2.bit.PRESCALE = 0X2; //set ADCCLK divider to /4
AdcSetMode(ADC_ADCA, ADC_RESOLUTION_12BIT, ADC_SIGNALMODE_SINGLE);
AdcSetMode(ADC_ADCB, ADC_RESOLUTION_12BIT, ADC_SIGNALMODE_SINGLE);
AdcSetMode(ADC_ADCC, ADC_RESOLUTION_12BIT, ADC_SIGNALMODE_SINGLE);
AdcSetMode(ADC_ADCD, ADC_RESOLUTION_12BIT, ADC_SIGNALMODE_SINGLE);
//Set pulse positions to late
AdcaRegs.ADCCTL1.bit.INTPULSEPOS = 1;
AdcbRegs.ADCCTL1.bit.INTPULSEPOS = 1;
AdccRegs.ADCCTL1.bit.INTPULSEPOS = 1;
AdcdRegs.ADCCTL1.bit.INTPULSEPOS = 1;
//power up the ADC
AdcaRegs.ADCCTL1.bit.ADCPWDNZ = 1;
AdcbRegs.ADCCTL1.bit.ADCPWDNZ = 1;
AdccRegs.ADCCTL1.bit.ADCPWDNZ = 1;
AdcdRegs.ADCCTL1.bit.ADCPWDNZ = 1;
//delay for 1ms to allow ADC time to power up
DELAY_US(1000);
EDIS;
SetupADC();
}
//---------------------------------------------------------------------------
// InitAdc:
//---------------------------------------------------------------------------
// This function initializes ADC to a known state.
//
void InitAdc(void)
{
extern void DSP28x_usDelay(Uint32 Count);
// *IMPORTANT*
// The ADC_cal function, which copies the ADC calibration values from TI reserved
// OTP into the ADCREFSEL and ADCOFFTRIM registers, occurs automatically in the
// Boot ROM. If the boot ROM code is bypassed during the debug process, the
// following function MUST be called for the ADC to function according
// to specification. The clocks to the ADC MUST be enabled before calling this
// function.
// See the device data manual and/or the ADC Reference
// Manual for more information.
EALLOW;
SysCtrlRegs.PCLKCR0.bit.ADCENCLK = 1;
ADC_cal();
EDIS;
// To powerup the ADC the ADCENCLK bit should be set first to enable
// clocks, followed by powering up the bandgap, reference circuitry, and ADC core.
// Before the first conversion is performed a 5ms delay must be observed
// after power up to give all analog circuits time to power up and settle
// Please note that for the delay function below to operate correctly the
// CPU_CLOCK_SPEED define statement in the DSP2833x_Examples.h file must
// contain the correct CPU clock period in nanoseconds.
AdcRegs.ADCTRL3.all = 0x00E0; // Power up bandgap/reference/ADC circuits
DELAY_US(ADC_usDELAY); // Delay before converting ADC channels
}
void rtty_txbit (int bit)
{
/*
* Sends one bit of data
*
*/
if (bit)
{
/* mark */
RTTY_PORT |= RTTY_MARK_PIN;
RTTY_PORT &= ~(RTTY_SPACE_PIN);
}
else
{
/* space */
RTTY_PORT |= RTTY_SPACE_PIN;
RTTY_PORT &= ~(RTTY_MARK_PIN);
}
// __delay_cycles(RTTY_BAUDRATE/2); /* depends on configuration */
// __delay_cycles(RTTY_BAUDRATE/2);
// @1Mhz, delay == 20000 == 50baud
// @8Mhz, delay == ? == 50 baud
//P1OUT ^= BIT3;
DELAY_US(20000);// 1/50*1000000 - (1/t)*f
// DELAY_US(7000);
// DELAY_US(15800); //47.5 baud
}
static void switch_pll_on(void)
{
trx_irq_reason_t irq_status;
uint8_t poll_counter = 0;
/* Check if trx is in TRX_OFF; only from PLL_ON the following procedure is applicable */
if (pal_trx_bit_read(SR_TRX_STATUS) != TRX_OFF) {
Assert("Switch PLL_ON failed, because trx is not in TRX_OFF" ==
0);
return;
}
pal_trx_reg_read(RG_IRQ_STATUS); /* clear PLL lock bit */
/* Switch PLL on */
pal_trx_reg_write(RG_TRX_STATE, CMD_PLL_ON);
/* Check if PLL has been locked. */
do {
irq_status = (trx_irq_reason_t) pal_trx_reg_read(RG_IRQ_STATUS);
if (irq_status & TRX_IRQ_PLL_LOCK) {
return; // PLL is locked now
}
/* Wait a time interval of typical value for state change. */
DELAY_US(TRX_OFF_TO_PLL_ON_TIME_US);
poll_counter++;
} while (poll_counter < PLL_LOCK_ATTEMPTS);
}
//
// ConfigureADC - Write ADC configurations and power up the ADC for both
// ADC A and ADC B
//
void ConfigureADC(void)
{
EALLOW;
//
//write configurations
//
AdcaRegs.ADCCTL2.bit.PRESCALE = 6; //set ADCCLK divider to /4
AdcSetMode(ADC_ADCA, ADC_RESOLUTION_12BIT, ADC_SIGNALMODE_SINGLE);
//
//Set pulse positions to late
//
AdcaRegs.ADCCTL1.bit.INTPULSEPOS = 1;
//
//power up the ADC
//
AdcaRegs.ADCCTL1.bit.ADCPWDNZ = 1;
//
//delay for 1ms to allow ADC time to power up
//
DELAY_US(1000);
EDIS;
}
void LTC_discharge_cells_3_4()
{
//The discharge duration only lasts for a couple of seconds on the LED. Need confirmation.
void LTC_wakeup(void);
LTC_wakeup();
SpiaRegs.SPITXBUF = ((unsigned)0x80) << 8;
SpiaRegs.SPITXBUF = ((unsigned)0x01) << 8;
SpiaRegs.SPITXBUF = ((unsigned)0x4D) << 8;
SpiaRegs.SPITXBUF = ((unsigned)0x7A) << 8;
while(SpiaRegs.SPIFFTX.bit.TXFFST != 0) {} //wait
SpiaRegs.SPITXBUF = ((unsigned)0xE1) << 8;
SpiaRegs.SPITXBUF = ((unsigned)0xE2) << 8;
SpiaRegs.SPITXBUF = ((unsigned)0x44) << 8;
SpiaRegs.SPITXBUF = ((unsigned)0x9C) << 8;
while(SpiaRegs.SPIFFTX.bit.TXFFST != 0) {} //wait
SpiaRegs.SPITXBUF = ((unsigned)0x0C) << 8;
SpiaRegs.SPITXBUF = ((unsigned)0xF0) << 8;
//calculated PECs
SpiaRegs.SPITXBUF = ((unsigned)0xD2) << 8;
SpiaRegs.SPITXBUF = ((unsigned)0xA4) << 8;
DELAY_US(100);
}
void InitSPIConfig() {
EALLOW;
ClkCfgRegs.LOSPCP.bit.LSPCLKDIV = 0;
EDIS;
// Initialize SPI FIFO registers
SpiaRegs.SPIFFTX.all = 0xE040;
SpiaRegs.SPIFFRX.all = 0x2044;
SpiaRegs.SPIFFCT.all = 0x0;
SpiaRegs.SPICCR.bit.SPISWRESET = 0; // SPI on reset,must be set to 1
SpiaRegs.SPICTL.all = 0x0006; // Enable master mode, normal phase,
// enable talk, and SPI int disabled.
// SpiaRegs.SPIBRR.all = 0x007F;
SpiaRegs.SPIBRR.bit.SPI_BIT_RATE = 0; // SPICLK set to /SPI_BIT_RATE+1
SpiaRegs.SPICCR.bit.CLKPOLARITY = 1;// Data is output on the rising edge of the SPICLK signal
SpiaRegs.SPICCR.bit.HS_MODE = 0; // disable High Mode
SpiaRegs.SPICCR.bit.SPILBK = 0; // disable SPI lookback
SpiaRegs.SPICCR.bit.SPICHAR = 7; // transmit 8-bit data
SpiaRegs.SPICCR.bit.SPISWRESET = 1; // disable SPI on reset
SpiaRegs.SPIPRI.bit.FREE = 1; // Set so breakpoints don't disturb xmission
DELAY_US(1);
}
//
// Check if device is connected to IEEE-488 port (device pullups)
// This function needs to run quickly so it won't delay IEC initialization
// if no IEEE device is attached and powered on.
//
static bool IeeeDetect(void)
{
bool flg;
#ifdef DEBUG_LED
debug_LED_blink(10);
#endif
// reset pullups and test IO
IeeeDav(0);
IeeeEoi(0);
//IeeeRen(0);
IeeeSetPullup(0, IEEE_DAV_I, IEEE_DAV_O);
IeeeSetPullup(0, IEEE_EOI_I, IEEE_EOI_O);
//IeeeSetPullup(0, IEEE_REN_I, IEEE_REN_O);
DELAY_US(100);
//flg = (IEEE_REN && IEEE_DAV && IEEE_EOI);
flg = (IEEE_DAV && IEEE_EOI);
if(flg)
{
#ifdef DEBUG_LED
debug_LED_blink(5);
#endif
}
else
{
#ifdef DEBUG_LED
debug_LED_blink(1);
#endif
}
return (flg);
}
radio_cca_t radio_do_cca(void)
{
uint8_t tmp, trxcmd, trxstatus;
radio_cca_t ret = RADIO_CCA_FREE;
trxcmd = trx_reg_read(RG_TRX_STATE);
trx_reg_write(RG_TRX_STATE, CMD_RX_ON);
tmp = 130;
do
{
trxstatus = trx_bit_read(SR_TRX_STATUS);
if ((RX_ON == trxstatus) || (BUSY_RX == trxstatus))
{
break;
}
DELAY_US(32); /* wait for one octett */
}
while(--tmp);
trx_reg_write(RG_TRX_STATE, CMD_PLL_ON);
trx_reg_write(RG_TRX_STATE, CMD_RX_ON);
trx_bit_write(SR_CCA_REQUEST,1);
DELAY_US(140);
/* we need to read the whole status register
* because CCA_DONE and CCA_STATUS are valid
* only for one read, after the read they are reset
*/
tmp = trx_reg_read(RG_TRX_STATUS);
if(0 == (tmp & 0x80))
{
ret = RADIO_CCA_FAIL;
}
else if (tmp & 0x40)
{
ret = RADIO_CCA_FREE;
}
else
{
ret = RADIO_CCA_BUSY;
}
trx_reg_write(RG_TRX_STATE, trxcmd);
return ret;
}
void MaquinaEstadoDetecaoRogowiski(Uint16 valorIn)
{
static Uint16 i = 0;
static float tensao = 0;
Uint16 valor;
//return 1; //enquanto o circuito nao eh ajeitado, mantem desabilitada a funcionalidade
//CpuTimer0Regs.TCR.bit.TIE = 0; // 0 = Disable/ 1 = Enable Timer Interrupt
if(FlagDetectandoBobina == 1)
{
if(PinoDetecaoRogowiski == 0) {
//LIBERA_INTEGRADOR;
RESETA_INTEGRADOR;
DELAY_US(2);
i = 0;
tensao = 0;
PinoDetecaoRogowiski_ligaFonteC; //Habilita fonte de corrente
}
tensao += (float)valorIn - Adc_offset[0];
if(++i > 100)
{
tensao = tensao / 100.0;
tensao *= 2.0;
if(tensao >= LIMIAR_SUPERIOR_BOBINA) {
GpioDataRegs.GPBDAT.bit.GPIO34 = 0;
//SciReportarErro(ERRO_AUSENCIA_BOBINA);
FlagResultadoDetecaoBobina = 0; //Bobina Ausente
}
if(tensao < LIMIAR_SUPERIOR_BOBINA) {
GpioDataRegs.GPBDAT.bit.GPIO34 = 1;
FlagResultadoDetecaoBobina = 1; //Bobina Presente
}
PinoDetecaoRogowiski_deslFonteC; //Desabilita fonte de corrente
DELAY_US(2);
RESETA_INTEGRADOR;
DELAY_US(2);
FlagDetectandoBobina = 0; //Termina algoritmo de detecao
}
}
}
// Wait up to 400 us for CLK to be pulled by the drive.
static void
iec_wait_clk(void)
{
uint8_t count = 200;
while (iec_get(IO_CLK) == 0 && count-- != 0)
DELAY_US(2);
}
/**
* Enable control ISR
*/
static void enable_controller()
{
stop_DMA();
DELAY_US(5);
start_DMA();
HRADCs_Info.enable_Sampling = 1;
enable_pwm_tbclk();
}
void Iw7027_writeSingleByte(uint8 chipsel, uint8 regaddress, uint8 txdata)
{
//Selest chip
Hal_SpiMaster_setCsPin(chipsel);
DELAY_US(IW_SPI_MASTER_TRANS_START_DELAY);
//Send Head & address
Hal_SpiMaster_sendSingleByte(0xC0);
Hal_SpiMaster_sendSingleByte(regaddress);
//Send Data
Hal_SpiMaster_sendSingleByte(txdata);
//Unselest all chip
DELAY_US(IW_SPI_MASTER_TRANS_STOP_DELAY);
Hal_SpiMaster_setCsPin(0x00);
}
/*
* Чтение регистров детектора
*/
u_int16 Detector::ReadReg(u_int16 addr)
{
addr &= 0x7F;
PLD_REGS.SPW_DEV_DATA.reg = addr | 0x80;
PLD_REGS.SPW_DEV_DATA.action = 1;
//TODO: сколько ждать
DELAY_US(100);
return PLD_REGS.SPW_DEV_DATA.readed_data;
}
//
// configureDAC - Configure specified DAC output
//
void configureDAC(Uint16 dac_num)
{
EALLOW;
DAC_PTR[dac_num]->DACCTL.bit.DACREFSEL = REFERENCE;
DAC_PTR[dac_num]->DACOUTEN.bit.DACOUTEN = 1;
DAC_PTR[dac_num]->DACVALS.all = 0;
DELAY_US(10); // Delay for buffered DAC to power up
EDIS;
}
//---------------------------------------------------------------------------
// InitAdc:
//---------------------------------------------------------------------------
// This function initializes ADC to a known state.
//
void InitAdc(void)
{
extern void DSP28x_usDelay(Uint32 Count);
// To powerup the ADC the ADCENCLK bit should be set first to enable
// clocks, followed by powering up the bandgap and reference circuitry.
// After a 5ms delay the rest of the ADC can be powered up. After ADC
// powerup, another 20us delay is required before performing the first
// ADC conversion. Please note that for the delay function below to
// operate correctly the CPU_CLOCK_SPEED define statement in the
// DSP28_Examples.h file must contain the correct CPU clock period in
// nanoseconds. For example:
AdcRegs.ADCTRL3.bit.ADCBGRFDN = 0x3; // Power up bandgap/reference circuitry
DELAY_US(ADC_usDELAY); // Delay before powering up rest of ADC
AdcRegs.ADCTRL3.bit.ADCPWDN = 1; // Power up rest of ADC
DELAY_US(ADC_usDELAY2); // Delay after powering up ADC
}
// Wait up to 2 ms for any of the masked lines to become active.
static uint8_t
iec_wait_timeout_2ms(uint8_t mask, uint8_t state)
{
uint8_t count = 200;
while ((iec_poll_pins() & mask) == state && count-- != 0)
DELAY_US(10);
return ((iec_poll_pins() & mask) != state);
}
static bool Reset()
{
pullUp();
DELAY_US(10);
pullDown();
DELAY_US(480);
pullUp();
DELAY_US(60);
if (isBusHigh())
{
return false;
}
DELAY_US(300);
return isBusHigh();
}
bool OW_Reset()
{
OW_pullUp();
DELAY_US(10);
OW_setLow();
DELAY_US(480);
OW_pullUp();
DELAY_US(60);
if (OW_isHigh())
{
return false;
}
DELAY_US(300);
return OW_isHigh();
}
void mpu_setup()
{
devAddr = MPU6050_DEFAULT_ADDRESS;
//switchSPIEnabled(true);
DELAY_US(1*1000);
setClockSource(MPU6050_CLOCK_PLL_XGYRO);
setFullScaleGyroRange(MPU6050_GYRO_FS_250);
setFullScaleAccelRange(MPU6050_ACCEL_FS_2);
setSleepEnabled(false); // thanks to Jack Elston for pointing this one out!
}
void Iw7027_writeMultiByte(uint8 chipsel, uint8 regaddress, uint8 length, uint8 *txdata)
{
//Selest chip
Hal_SpiMaster_setCsPin(chipsel);
DELAY_US(IW_SPI_MASTER_TRANS_START_DELAY);
//Send Head & address
Hal_SpiMaster_sendSingleByte(0x01);
Hal_SpiMaster_sendSingleByte(length);
Hal_SpiMaster_sendSingleByte(regaddress);
//Send multi data
Hal_SpiMaster_sendMultiByte(txdata, length);
//Unselest all chip
DELAY_US(IW_SPI_MASTER_TRANS_STOP_DELAY);
Hal_SpiMaster_setCsPin(0x00);
}
static void handler (void)
{
// Disable interrupt temp
extint_disable (extint1);
irq_clear (AT91C_ID_IRQ1);
uint8_t addr;
uint8_t buffer[2];
i2c_ret_t ret;
DELAY_US (4);
//pio_output_toggle (LED1_PIO);
ret = i2c_slave_read (i2c_slave1, buffer, sizeof (buffer), 10000);
addr = buffer[0] - ARRAY_OFFSET;
if (addr >= sizeof (comms_data))
addr = 0;
if (ret == 1)
{
// Have not received photo line command.
if (buffer[0] != CD_PHOTO_LINE)
ret = i2c_slave_write (i2c_slave1, comms_data[addr], 130, 1000); // Return data requested.
else
{
// check if photo ready.
if (comms_data[CD_PHOTO_READY-ARRAY_OFFSET])
{
ret = i2c_slave_write (i2c_slave1, comms_data[CD_PHOTO_NEXT_LINE-ARRAY_OFFSET], 130, 1000);
if (ret > 0)
{
ret++;
*comms_data[CD_FAULT - ARRAY_OFFSET] = ret;
comms_data[CD_PHOTO_NEXT_LINE-ARRAY_OFFSET] += ret;
if ((comms_data[CD_PHOTO_NEXT_LINE-ARRAY_OFFSET] - image) == image_size)
{
// We have sent the entire picture
comms_data[CD_PHOTO_NEXT_LINE-ARRAY_OFFSET] = image;
comms_data[CD_PHOTO_READY-ARRAY_OFFSET] = 0;
}
}
}
}
}
if (ret == 2)
{
if (buffer[0] == COMMS_COMMAND)
next_command = buffer[1];
}
extint_enable (extint1);
}
/**
* @brief 初始化PWM模块
*
* @param None
*
* @retval None
*
* @note
* @verbatim
*
* Phase U : EPWM3
* Phase V : EPWM2
* Phase W : EPWM1
*
* Symmetrical mode
*
* EN : GPIO34
*
* TZ1(Fault) : EPWM输出高电平，对应IR2316后结果为输出悬空
*
* @endverbatim
*/
void InverterInit(void)
{
EALLOW;
/* EPWM Clock */
SysCtrlRegs.PCLKCR1.bit.EPWM1ENCLK = 1;
SysCtrlRegs.PCLKCR1.bit.EPWM2ENCLK = 1;
SysCtrlRegs.PCLKCR1.bit.EPWM3ENCLK = 1;
SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 0;
EPWMGPIOInit();
EPWNBaseInit(&EPwm1Regs);
EPwm1Regs.TBCTL.bit.PHSEN = TB_DISABLE; // Master module
EPwm1Regs.TBCTL.bit.SYNCOSEL = TB_CTR_ZERO; // Sync down-stream module, Time-base counter equal to zero
EPWNBaseInit(&EPwm2Regs);
EPwm2Regs.TBCTL.bit.PHSEN = TB_ENABLE; // Slave module
EPwm2Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_IN; // sync flow-through
EPWNBaseInit(&EPwm3Regs);
EPwm2Regs.TBCTL.bit.PHSEN = TB_ENABLE; // Slave module
EPwm2Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_IN; // sync flow-through
/* EPWM clock synchronize enable */
SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 1;
/* Pre-Charge */
EnableInverter();
Uint16 i = 0;
for (i = 0; i < EPWM_PRECHARGE; i++) {
DELAY_US(1000);
}
DisableInverter();
// Clear any spurious OV trip
EPwm1Regs.TZCLR.bit.OST = 1;
EPwm2Regs.TZCLR.bit.OST = 1;
EPwm3Regs.TZCLR.bit.OST = 1;
/* Enable TZ */
EPwm1Regs.TZSEL.bit.OSHT1 = TZ_ENABLE; // ePWM1 TZ1 Enable, overcurrent
EPwm2Regs.TZSEL.bit.OSHT1 = TZ_ENABLE; // ePWM2 TZ1 Enable, overcurrent
EPwm3Regs.TZSEL.bit.OSHT1 = TZ_ENABLE; // ePWM3 TZ1 Enable, overcurrent
// INT
PieVectTable.EPWM1_TZINT = &TZ_ISR;
PieCtrlRegs.PIEIER2.bit.INTx1 = 1; // Enable INT 2.1 in the PIE
IER |= M_INT2; // Enable CPU Interrupt 2
// SOC
EPwm1Regs.ETSEL.bit.SOCASEL = 2; // Enable event time-base counter equal to period (TBCTR = TBPRD)
EPwm1Regs.ETPS.bit.SOCAPRD = 1; // Generate pulse on 1st event
EDIS;
}
void main()
{
memcpy(&RamfuncsRunStart, &RamfuncsLoadStart, (size_t)&RamfuncsLoadSize);
WDOG_Handle myWDog;
myWDog = WDOG_init((void *)WDOG_BASE_ADDR, sizeof(WDOG_Obj));
WDOG_disable(myWDog);
CLK_Handle myClk;
PLL_Handle myPll;
myClk = CLK_init((void *)CLK_BASE_ADDR, sizeof(CLK_Obj));
myPll = PLL_init((void *)PLL_BASE_ADDR, sizeof(PLL_Obj));
CLK_setOscSrc(myClk, CLK_OscSrc_Internal);
PLL_setup(myPll, PLL_Multiplier_12, PLL_DivideSelect_ClkIn_by_2);
GPIO_Handle myGpio;
myGpio = GPIO_init((void *)GPIO_BASE_ADDR, sizeof(GPIO_Obj));
GPIO_setMode(myGpio, GPIO_Number_0, GPIO_0_Mode_GeneralPurpose);
GPIO_setDirection(myGpio, GPIO_Number_0, GPIO_Direction_Output);
GPIO_setMode(myGpio, GPIO_Number_1, GPIO_1_Mode_GeneralPurpose);
GPIO_setDirection(myGpio, GPIO_Number_1, GPIO_Direction_Output);
GPIO_setMode(myGpio, GPIO_Number_2, GPIO_2_Mode_GeneralPurpose);
GPIO_setDirection(myGpio, GPIO_Number_2, GPIO_Direction_Output);
GPIO_setMode(myGpio, GPIO_Number_3, GPIO_3_Mode_GeneralPurpose);
GPIO_setDirection(myGpio, GPIO_Number_3, GPIO_Direction_Output);
GPIO_setHigh(myGpio, GPIO_Number_0);
GPIO_setHigh(myGpio, GPIO_Number_1);
GPIO_setHigh(myGpio, GPIO_Number_2);
GPIO_setHigh(myGpio, GPIO_Number_3);
while(1)
{
GPIO_setLow(myGpio, GPIO_Number_3);
DELAY_US(1000000);
GPIO_setHigh(myGpio, GPIO_Number_3);
DELAY_US(1000000);
}
}
void radio_init(uint8_t * rxbuf, uint8_t rxbufsz)
{
trx_regval_t status;
/* init cpu peripherals and global IRQ enable */
radiostatus.rxframe = rxbuf;
radiostatus.rxframesz = rxbufsz;
trx_io_init(DEFAULT_SPI_RATE);
trx_set_irq_handler(radio_irq_handler);
/* transceiver initialization */
TRX_RESET_LOW();
TRX_SLPTR_LOW();
DELAY_US(TRX_RESET_TIME_US);
#if defined(CUSTOM_RESET_TIME_MS)
DELAY_MS(CUSTOM_RESET_TIME_MS);
#endif
TRX_RESET_HIGH();
/* disable IRQ and clear any pending IRQs */
trx_reg_write(RG_IRQ_MASK, 0);
trx_reg_read(RG_IRQ_STATUS);
#if RADIO_TYPE == RADIO_AT86RF212
trx_reg_write(RG_TRX_CTRL_0, 0x19);
trx_reg_write(RG_TRX_STATE, CMD_FORCE_TRX_OFF);
DELAY_US(510);
#else
trx_bit_write(SR_TRX_CMD, CMD_TRX_OFF);
DELAY_US(510);
#endif
do
{
status = trx_bit_read(SR_TRX_STATUS);
}
while (status != TRX_OFF);
trx_bit_write(SR_TX_AUTO_CRC_ON, 1);
trx_reg_write(RG_IRQ_MASK, TRX_IRQ_TRX_END);
radiostatus.state = STATE_OFF;
radiostatus.idle_state = STATE_OFF;
}
static uint8_t recv_byte(void)
{
uint8_t c;
uint8_t i;
IO = 1;
c = 0;
for (i = 8; i != 0; i--) {
c >>= 1;
DELAY_US(1);
if (IO) {
c |= 0x80;
}
SCLK = 1;
DELAY_US(1);
SCLK = 0;
}
return c;
}
void SerialRD(double * buf)
{
unsigned char j, k;
unsigned short int TempA, TempB;
/* 转换开始 */
AD7606_CNVST_LOW;
DELAY_US(1); // *
AD7606_CNVST_HIGH;
DELAY_US(1);
while(AD7606_BUSY_READ==1)
{
}
/* 片选信号有效 */
//AD7606_SCS_LOW;
for(j=0; j<Nospl / 2; j++)
{
TempA=0;
TempB=0;
for(k=0; k<16; k++)
{
AD7606_SCK_LOW;
TempA=(TempA<<1) + AD7606_DOUTA_READ;
TempB=(TempB<<1) + AD7606_DOUTB_READ;
AD7606_SCK_HIGH;
}
buf[2 * j]=(int)TempA * (sRange * 2 / 65536.0);
buf[2 * j + 1]=(int)TempB * (sRange * 2 / 65536.0); //数字量转换为模拟量,输入范围是正负10V,精度为16位
//相当于将20V分成了65536份,公式为A=(20.0/65536.0)*D;A为模拟量值，D为数字量值;
//如果输入范围是正负5V则公式为A=(10.0/65536.0)*D
}
AD7606_SCS_HIGH;
conv_flg=1;
}
/*! \brief Reads data into buffer.
\param data Pointer to data buffer
\param bytes Number of bytes to read
\param slave_adr Slave address on I2C bus
\param slave_reg Slave memory address from which the reading is started
\return 1 if successful, otherwise 0
*/
u8 I2C_ReadBytes(u8* data, u8 bytes, u8 slave_adr, u8 slave_reg)
{
u8 index, success = 0;
if(!I2C_StartCond())
{
return 0;
}
if(!I2C_WriteByte((u8)(slave_adr | WRITE)))
{
return 0;
}
if(!I2C_WriteByte(slave_reg))
{
return 0;
}
write_scl(1);
DELAY_US(SCL_SDA_DELAY);
SDA_HIGH;
if(!I2C_StartCond())
{
return 0;
}
if(!I2C_WriteByte((u8)(slave_adr | READ)))
{
return 0;
}
for(index = 0; index < bytes; index++)
{
success = I2C_ReadByte(data, bytes, index);
if(!success)
{
break;
}
}
//put stop here
write_scl(1);
DELAY_US(SCL_SDA_DELAY);
SDA_HIGH;
return success;
}
