unsigned long byteAccelRead(int reg)
{
short temp;
I2CMasterSlaveAddrSet(I2C_MASTER_BASE, 0x1D, false);
I2CMasterDataPut(I2C_MASTER_BASE, reg);
I2CMasterControl(I2C_MASTER_BASE, I2C_MASTER_CMD_BURST_SEND_START);
while(I2CMasterBusy(I2C_MASTER_BASE));
I2CMasterSlaveAddrSet(I2C_MASTER_BASE, 0x1D, true);
I2CMasterControl(I2C_MASTER_BASE, I2C_MASTER_CMD_SINGLE_RECEIVE);
while(I2CMasterBusy(I2C_MASTER_BASE));
return I2CMasterDataGet(I2C_MASTER_BASE);
}
//Read from device using address and put the read values into buff. num=num of bytes to read
void I2CRead(unsigned char device, unsigned char regiester, unsigned char num, unsigned long *buff){
//All commented code could likely be delted currently saving for record / emergency
/*I2CMasterSlaveAddrSet(I2C1_MASTER_BASE, device, false); //Set Device to transmit to
I2CMasterDataPut(I2C1_MASTER_BASE,regiester); //Put on regiester to prep writting
I2CMasterControl(I2C1_MASTER_BASE,I2C_MASTER_CMD_SINGLE_SEND);
//while(I2CMasterBusBusy(I2C1_MASTER_BASE)); //Wait till data sent
while(I2CMasterBusy(I2C1_MASTER_BASE)); //this is good
short i=0;
for (i=0; i<num; i++){
I2CMasterSlaveAddrSet(I2C1_MASTER_BASE, device, true); //Set device to RECIEVE FROM
/*I2CMasterDataPut(I2C1_MASTER_BASE,regiester+i); //Put on regiester to prep writting
I2CMasterControl(I2C1_MASTER_BASE,I2C_MASTER_CMD_SINGLE_SEND);
//while(I2CMasterBusBusy(I2C1_MASTER_BASE)); //Wait till data sent
while(I2CMasterBusy(I2C1_MASTER_BASE));
*/
/*if(i==0){
I2CMasterControl(I2C1_MASTER_BASE, I2C_MASTER_CMD_BURST_RECEIVE_START);
}else if(i==(num-1)){
I2CMasterControl(I2C1_MASTER_BASE, I2C_MASTER_CMD_BURST_RECEIVE_FINISH);
}else{
I2CMasterControl(I2C1_MASTER_BASE, I2C_MASTER_CMD_BURST_RECEIVE_CONT);
}
//while(I2CMasterIntStatus(I2C1_MASTER_BASE, false) == 0);
while(I2CMasterBusy(I2C1_MASTER_BASE));
buff[i] = I2CMasterDataGet(I2C1_MASTER_BASE);
//I2CMasterIntClear(I2C1_MASTER_BASE);
}
//buff[0]=0x02;
*/
short i=0; //Initalize i because CCS doesn't like initalizing inside for loop :P
for(i=0; i<num; i++){
I2CMasterSlaveAddrSet(I2C1_MASTER_BASE, device, false); //Set device to write to
I2CMasterDataPut(I2C1_MASTER_BASE,regiester+i); //Put on regiester to prep writting
I2CMasterControl(I2C1_MASTER_BASE,I2C_MASTER_CMD_SINGLE_SEND); //Make a single send there is no bursting through
while(I2CMasterBusy(I2C1_MASTER_BASE)); //wait for the transmission to end via checking the master's state NOT THE BUS
I2CMasterSlaveAddrSet(I2C1_MASTER_BASE, device, true); //Set device to RECIEVE FROM
I2CMasterControl(I2C1_MASTER_BASE, I2C_MASTER_CMD_SINGLE_RECEIVE); //Set a single read because it will only return this address
while(I2CMasterBusy(I2C1_MASTER_BASE)); //Wait for the master to stop recieving data
buff[i] = I2CMasterDataGet(I2C1_MASTER_BASE); //Place the data recieved (that is in the FIFO) into the buffer to return
}
}
//*****************************************************************************
//
//! \internal
//!
//! Start a transfer to the SSD0303 controller.
//!
//! \param ucChar is the first byte to be written to the controller.
//!
//! This function will start a transfer to the SSD0303 controller via the I2C
//! bus.
//!
//! The data is written in a polled fashion; this function will not return
//! until the byte has been written to the controller.
//!
//! \return None.
//
//*****************************************************************************
static void
OSRAMWriteFirst(unsigned char ucChar)
{
//
// Set the slave address.
//
I2CMasterSlaveAddrSet(I2C_MASTER_BASE, SSD0303_ADDR, false);
//
// Write the first byte to the controller.
//
I2CMasterDataPut(I2C_MASTER_BASE, ucChar);
//
// Start the transfer.
//
I2CMasterControl(I2C_MASTER_BASE, I2C_MASTER_CMD_BURST_SEND_START);
}
uint32_t I2CReadMultiple(uint32_t i2c_base, uint8_t address, uint8_t reg, uint8_t *data, uint32_t size) {
uint32_t byte_count;
uint32_t master_command;
// Set slave register to be read
while(I2CMasterBusy(i2c_base));
I2CMasterSlaveAddrSet(i2c_base, address, 0);
I2CMasterDataPut(i2c_base, reg);
I2CMasterControl(i2c_base, I2C_MASTER_CMD_SINGLE_SEND);
while(I2CMasterBusy(i2c_base));
// Check for errors
if (I2CMasterErr(i2c_base) != I2C_MASTER_ERR_NONE) return 0;
// Start burst read
I2CMasterSlaveAddrSet(i2c_base, address, 1);
master_command = I2C_MASTER_CMD_BURST_RECEIVE_START;
for (byte_count = 0; byte_count < size; byte_count++) {
// The second byte has to be read with CONT
if (byte_count == 1) master_command = I2C_MASTER_CMD_BURST_RECEIVE_CONT;
// The last byte has to be read with FINISH
if (byte_count == size - 1) master_command = I2C_MASTER_CMD_BURST_RECEIVE_FINISH;
// If only one byte, reconfigure to SINGLE
if (size == 1) master_command = I2C_MASTER_CMD_SINGLE_RECEIVE;
// Initiate read
I2CMasterControl(i2c_base, master_command);
// Wait for master operation
while(I2CMasterBusy(i2c_base));
// Check for errors
if (I2CMasterErr(i2c_base) != I2C_MASTER_ERR_NONE) return 0;
// Put data into array
data[byte_count] = I2CMasterDataGet(i2c_base);
}
return byte_count;
}
bool i2c_write_byte(uint8_t address, uint8_t byte) {
uint32_t future = I2C_MAX_DELAY_US;
// Transmit operation
I2CMasterSlaveAddrSet(address, false);
// Write byte to I2C buffer
I2CMasterDataPut(byte);
// Single transmit operation
I2CMasterControl(I2C_MASTER_CMD_SINGLE_SEND);
// Calculate timeout
future += board_timer_get();
// Wait until complete or timeout
while (I2CMasterBusy()) {
// Check timeout status and return if expired
if (board_timer_expired(future)) return false;
}
return true;
}
//*****************************************************************************
//
//! \internal
//!
//! Finish a transfer to the SSD0303 or SD1300 controller.
//!
//! \param ucChar is the final byte to be written to the controller.
//!
//! This function will finish a transfer to the display controller via the I2C
//! bus. This must only be called after calling Display96x16x1WriteFirst().
//!
//! The data is written in a polled fashion; this function will not return
//! until the byte has been written to the controller.
//!
//! \return None.
//
//*****************************************************************************
static void
Display96x16x1WriteFinal(unsigned char ucChar)
{
//
// Wait until the current byte has been transferred.
//
while(I2CMasterIntStatus(I2C0_MASTER_BASE, false) == 0)
{
}
//
// Clear the I2C interrupt.
//
I2CMasterIntClear(I2C0_MASTER_BASE);
//
// Write the final byte to the controller.
//
I2CMasterDataPut(I2C0_MASTER_BASE, ucChar);
//
// Finish the transfer.
//
I2CMasterControl(I2C0_MASTER_BASE, I2C_MASTER_CMD_BURST_SEND_FINISH);
//
// Wait until the final byte has been transferred.
//
while(I2CMasterIntStatus(I2C0_MASTER_BASE, false) == 0)
{
}
//
// Clear the I2C interrupt.
//
I2CMasterIntClear(I2C0_MASTER_BASE);
}
//*****************************************************************************
//
//! \internal
//!
//! Finish a transfer to the SSD0303 controller.
//!
//! \param ucChar is the final byte to be written to the controller.
//!
//! This function will finish a transfer to the SSD0303 controller via the I2C
//! bus. This must only be called after calling OSRAM96x16x1WriteFirst().
//!
//! The data is written in a polled fashion; this function will not return
//! until the byte has been written to the controller.
//!
//! \return None.
//
//*****************************************************************************
static void
OSRAM96x16x1WriteFinal(unsigned char ucChar)
{
//
// Wait until the current byte has been transferred.
//
while(I2CMasterIntStatus(I2C0_MASTER_BASE, false) == 0)
{
}
//
// Provide the required inter-byte delay.
//
SysCtlDelay(g_ulDelay);
//
// Write the final byte to the controller.
//
I2CMasterDataPut(I2C0_MASTER_BASE, ucChar);
//
// Finish the transfer.
//
I2CMasterControl(I2C0_MASTER_BASE, I2C_MASTER_CMD_BURST_SEND_FINISH);
//
// Wait until the final byte has been transferred.
//
while(I2CMasterIntStatus(I2C0_MASTER_BASE, false) == 0)
{
}
//
// Provide the required inter-byte delay.
//
SysCtlDelay(g_ulDelay);
}
unsigned long I2CController::nolock_write(uint8_t addr, uint8_t *buf, int count, bool sendStartCondition, bool sendStopCondition)
{
unsigned long ret;
if (count<1) return 0;
nolock_write8(addr, buf[0], sendStartCondition, (count==1) && sendStopCondition);
ret = I2CMasterErr(_base);
if (ret != I2C_MASTER_ERR_NONE) {
return ret;
}
for(int i=1; i<count; i++) {
I2CMasterDataPut(_base, buf[i]);
I2CMasterControl(_base, (sendStopCondition && (i == count-1)) ? I2C_MASTER_CMD_BURST_SEND_FINISH : I2C_MASTER_CMD_BURST_SEND_CONT);
ret = I2CMasterErr(_base);
if (ret != I2C_MASTER_ERR_NONE) {
return ret;
}
ret = waitFinish();
if (ret != I2C_MASTER_ERR_NONE) {
return ret;
}
}
return 0;
}
//*****************************************************************************
//
//! \internal
//!
//! Write a byte to the SSD0303 controller.
//!
//! \param ucChar is the byte to be transmitted to the controller.
//!
//! This function continues a transfer to the SSD0303 controller by writing
//! another byte over the I2C bus. This must only be called after calling
//! OSRAMWriteFirst(), but before calling OSRAMWriteFinal().
//!
//! The data is written in a polled faashion; this function will not return
//! until the byte has been written to the controller.
//!
//! \return None.
//
//*****************************************************************************
static void
OSRAMWriteByte(unsigned char ucChar)
{
//
// Wait until the current byte has been transferred.
//
while(I2CMasterIntStatus(I2C_MASTER_BASE, false) == 0) {
}
//
// Provide the required inter-byte delay.
//
OSRAMDelay(g_ulDelay);
//
// Write the next byte to the controller.
//
I2CMasterDataPut(I2C_MASTER_BASE, ucChar);
//
// Continue the transfer.
//
I2CMasterControl(I2C_MASTER_BASE, I2C_MASTER_CMD_BURST_SEND_CONT);
}
char I2CGenTransmit(char * pbData, int cSize, bool fRW, char bAddr) {
int i;
char * pbTemp;
pbTemp = pbData;
/*Start*/
/*Send Address High Byte*/
/* Send Write Block Cmd*/
I2CMasterSlaveAddrSet(I2C0_BASE, bAddr, WRITE);
I2CMasterDataPut(I2C0_BASE, *pbTemp);
I2CMasterControl(I2C0_BASE, I2C_MASTER_CMD_BURST_SEND_START);
DelayMs(1);
/* Idle wait*/
while(I2CGenIsNotIdle());
/* Increment data pointer*/
pbTemp++;
/*Execute Read or Write*/
if(fRW == READ) {
/* Resend Start condition
** Then send new control byte
** then begin reading
*/
I2CMasterSlaveAddrSet(I2C0_BASE, bAddr, READ);
while(I2CMasterBusy(I2C0_BASE));
/* Begin Reading*/
for(i = 0; i < cSize; i++) {
if(cSize == i + 1 && cSize == 1) {
I2CMasterControl(I2C0_BASE, I2C_MASTER_CMD_SINGLE_RECEIVE);
DelayMs(1);
while(I2CMasterBusy(I2C0_BASE));
}
else if(cSize == i + 1 && cSize > 1) {
I2CMasterControl(I2C0_BASE, I2C_MASTER_CMD_BURST_RECEIVE_FINISH);
DelayMs(1);
while(I2CMasterBusy(I2C0_BASE));
}
else if(i == 0) {
I2CMasterControl(I2C0_BASE, I2C_MASTER_CMD_BURST_RECEIVE_START);
DelayMs(1);
while(I2CMasterBusy(I2C0_BASE));
/* Idle wait*/
while(I2CGenIsNotIdle());
}
else {
I2CMasterControl(I2C0_BASE, I2C_MASTER_CMD_BURST_RECEIVE_CONT);
DelayMs(1);
while(I2CMasterBusy(I2C0_BASE));
/* Idle wait */
while(I2CGenIsNotIdle());
}
while(I2CMasterBusy(I2C0_BASE));
/* Read Data */
*pbTemp = (char)I2CMasterDataGet(I2C0_BASE);
pbTemp++;
}
}
else if(fRW == WRITE) {
/*Loop data bytes */
for(i = 0; i < cSize; i++) {
/* Send Data */
I2CMasterDataPut(I2C0_BASE, *pbTemp);
while(I2CMasterBusy(I2C0_BASE));
if(i == cSize - 1) {
I2CMasterControl(I2C0_BASE, I2C_MASTER_CMD_BURST_SEND_FINISH);
DelayMs(1);
while(I2CMasterBusy(I2C0_BASE));
}
else {
I2CMasterControl(I2C0_BASE, I2C_MASTER_CMD_BURST_SEND_CONT);
DelayMs(1);
while(I2CMasterBusy(I2C0_BASE));
/* Idle wait */
while(I2CGenIsNotIdle());
}
pbTemp++;
}
}
/*Stop*/
return 0x00;
}
int main(void)
{
unsigned long ulPeriod;
unsigned long ulDelay;
unsigned long recvData = 11;
volatile int status = 0;
char buffer[40];
unsigned int bytesdRead;
FRESULT res;
FIL fileobj;
SysCtlClockSet(SYSCTL_SYSDIV_1 | SYSCTL_USE_OSC | SYSCTL_OSC_MAIN | SYSCTL_XTAL_8MHZ);
//Initialize pins
init_pins();
//Initialize peripherals
init_periph();
I2CMasterInitExpClk(I2C0_MASTER_BASE, SysCtlClockGet(), false);//false for 100kHz mode
//0x68 is the 7-bit address of the DS1307
I2CMasterSlaveAddrSet(I2C0_MASTER_BASE, 0x68, false);//true for a read action
I2CMasterDataPut(I2C0_MASTER_BASE, 0x10); //first Date/Time Register
I2CMasterControl(I2C0_MASTER_BASE, I2C_MASTER_CMD_SINGLE_SEND);
while(I2CMasterBusy(I2C0_MASTER_BASE)){}
I2CMasterControl(I2C0_MASTER_BASE, I2C_MASTER_CMD_SINGLE_RECEIVE);
while(I2CMasterBusy(I2C0_MASTER_BASE)){}
recvData = I2CMasterDataGet(I2C0_MASTER_BASE);
while(I2CMasterBusy(I2C0_MASTER_BASE)){}
fs_mount();
if(disk_status(0) == 0)
{
status++;
}
else
{
status--;
}
if (status == 1) {
res = f_open(&fileobj, "config.txt", FA_OPEN_EXISTING | FA_READ);
res = f_read(&fileobj, buffer, 6, &bytesdRead);
}
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOD);
GPIOPinTypeGPIOOutput(GPIO_PORTD_BASE, GPIO_PIN_0);
ulPeriod = SysCtlClockGet() / 10;
ulDelay = ((ulPeriod / 2) / 3) - 4 ;
while(1)
{
// Turn on the LED
GPIOPinWrite(GPIO_PORTD_BASE, GPIO_PIN_0, 0x01);
// Delay for a bit
SysCtlDelay(ulDelay);
// Turn off the LED
GPIOPinWrite(GPIO_PORTD_BASE, GPIO_PIN_0, 0x00);
// Delay for a bit
SysCtlDelay(ulDelay);
}
}
//*****************************************************************************
//
// Configure the I2C0 master and slave and connect them using loopback mode.
//
//*****************************************************************************
int
main(void)
{
unsigned long ulDataTx[NUM_I2C_DATA];
unsigned long ulDataRx[NUM_I2C_DATA];
unsigned long ulindex;
//
// Set the clocking to run directly from the external crystal/oscillator.
// TODO: The SYSCTL_XTAL_ value must be changed to match the value of the
// crystal on your board.
//
SysCtlClockSet(SYSCTL_SYSDIV_1 | SYSCTL_USE_OSC | SYSCTL_OSC_MAIN |
SYSCTL_XTAL_16MHZ);
//
// The I2C0 peripheral must be enabled before use.
//
SysCtlPeripheralEnable(SYSCTL_PERIPH_I2C0);
//
// For this example I2C0 is used with PortB[3:2]. The actual port and
// pins used may be different on your part, consult the data sheet for
// more information. GPIO port B needs to be enabled so these pins can
// be used.
// TODO: change this to whichever GPIO port you are using.
//
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOB);
//
// Configure the pin muxing for I2C0 functions on port B2 and B3.
// This step is not necessary if your part does not support pin muxing.
// TODO: change this to select the port/pin you are using.
//
GPIOPinConfigure(GPIO_PB2_I2C0SCL);
GPIOPinConfigure(GPIO_PB3_I2C0SDA);
//
// Select the I2C function for these pins. This function will also
// configure the GPIO pins pins for I2C operation, setting them to
// open-drain operation with weak pull-ups. Consult the data sheet
// to see which functions are allocated per pin.
// TODO: change this to select the port/pin you are using.
//
GPIOPinTypeI2C(GPIO_PORTB_BASE, GPIO_PIN_2 | GPIO_PIN_3);
//
// Enable loopback mode. Loopback mode is a built in feature that is
// useful for debugging I2C operations. It internally connects the I2C
// master and slave terminals, which effectively let's you send data as
// a master and receive data as a slave.
// NOTE: For external I2C operation you will need to use external pullups
// that are stronger than the internal pullups. Refer to the datasheet for
// more information.
//
HWREG(I2C0_MASTER_BASE + I2C_O_MCR) |= 0x01;
//
// Enable and initialize the I2C0 master module. Use the system clock for
// the I2C0 module. The last parameter sets the I2C data transfer rate.
// If false the data rate is set to 100kbps and if true the data rate will
// be set to 400kbps. For this example we will use a data rate of 100kbps.
//
I2CMasterInitExpClk(I2C0_MASTER_BASE, SysCtlClockGet(), false);
//
// Enable the I2C0 slave module. This module is enabled only for testing
// purposes. It does not need to be enabled for proper operation of the
// I2Cx master module.
//
I2CSlaveEnable(I2C0_SLAVE_BASE);
//
// Set the slave address to SLAVE_ADDRESS. In loopback mode, it's an
// arbitrary 7-bit number (set in a macro above) that is sent to the
// I2CMasterSlaveAddrSet function.
//
I2CSlaveInit(I2C0_SLAVE_BASE, SLAVE_ADDRESS);
//
// Tell the master module what address it will place on the bus when
// communicating with the slave. Set the address to SLAVE_ADDRESS
// (as set in the slave module). The receive parameter is set to false
// which indicates the I2C Master is initiating a writes to the slave. If
// true, that would indicate that the I2C Master is initiating reads from
// the slave.
//
I2CMasterSlaveAddrSet(I2C0_MASTER_BASE, SLAVE_ADDRESS, false);
//
// Set up the serial console to use for displaying messages. This is
// just for this example program and is not needed for I2C operation.
//
InitConsole();
//
// Display the example setup on the console.
//
UARTprintf("I2C Loopback Example ->");
UARTprintf("\n Module = I2C0");
UARTprintf("\n Mode = Single Send/Receive");
UARTprintf("\n Rate = 100kbps\n\n");
//
// Initalize the data to send.
//
ulDataTx[0] = 'I';
ulDataTx[1] = '2';
ulDataTx[2] = 'C';
//
// Initalize the receive buffer.
//
for(ulindex = 0; ulindex < NUM_I2C_DATA; ulindex++)
{
ulDataRx[ulindex] = 0;
}
//
// Indicate the direction of the data.
//
UARTprintf("Tranferring from: Master -> Slave\n");
//
// Send 3 peices of I2C data from the master to the slave.
//
for(ulindex = 0; ulindex < NUM_I2C_DATA; ulindex++)
{
//
// Display the data that the I2C0 master is transferring.
//
UARTprintf(" Sending: '%c' . . . ", ulDataTx[ulindex]);
//
// Place the data to be sent in the data register
//
I2CMasterDataPut(I2C0_MASTER_BASE, ulDataTx[ulindex]);
//
// Initiate send of data from the master. Since the loopback
// mode is enabled, the master and slave units are connected
// allowing us to receive the same data that we sent out.
//
I2CMasterControl(I2C0_MASTER_BASE, I2C_MASTER_CMD_SINGLE_SEND);
//
// Wait until the slave has received and acknowledged the data.
//
while(!(I2CSlaveStatus(I2C0_SLAVE_BASE) & I2C_SCSR_RREQ))
{
}
//
// Read the data from the slave.
//
ulDataRx[ulindex] = I2CSlaveDataGet(I2C0_SLAVE_BASE);
//
// Wait until master module is done transferring.
//
while(I2CMasterBusy(I2C0_MASTER_BASE))
{
}
//
// Display the data that the slave has received.
//
UARTprintf("Received: '%c'\n", ulDataRx[ulindex]);
}
//
// Reset receive buffer.
//
for(ulindex = 0; ulindex < NUM_I2C_DATA; ulindex++)
{
ulDataRx[ulindex] = 0;
}
//
// Indicate the direction of the data.
//
UARTprintf("\n\nTranferring from: Slave -> Master\n");
//
// Modifiy the data direction to true, so that seeing the address will
// indicate that the I2C Master is initiating a read from the slave.
//
I2CMasterSlaveAddrSet(I2C0_MASTER_BASE, SLAVE_ADDRESS, true);
//
// Do a dummy receive to make sure you don't get junk on the first receive.
//
I2CMasterControl(I2C0_MASTER_BASE, I2C_MASTER_CMD_SINGLE_RECEIVE);
//
// Dummy acknowledge and wait for the receive request from the master.
// This is done to clear any flags that should not be set.
//
while(!(I2CSlaveStatus(I2C0_SLAVE_BASE) & I2C_SLAVE_ACT_TREQ))
{
}
for(ulindex = 0; ulindex < NUM_I2C_DATA; ulindex++)
{
//
// Display the data that I2C0 slave module is transferring.
//
UARTprintf(" Sending: '%c' . . . ", ulDataTx[ulindex]);
//
// Place the data to be sent in the data register
//
I2CSlaveDataPut(I2C0_SLAVE_BASE, ulDataTx[ulindex]);
//
// Tell the master to read data.
//
I2CMasterControl(I2C0_MASTER_BASE, I2C_MASTER_CMD_SINGLE_RECEIVE);
//
// Wait until the slave is done sending data.
//
while(!(I2CSlaveStatus(I2C0_SLAVE_BASE) & I2C_SLAVE_ACT_TREQ))
{
}
//
// Read the data from the master.
//
ulDataRx[ulindex] = I2CMasterDataGet(I2C0_MASTER_BASE);
//
// Display the data that the slave has received.
//
UARTprintf("Received: '%c'\n", ulDataRx[ulindex]);
}
//
// Tell the user that the test is done.
//
UARTprintf("\nDone.\n\n");
//
// Return no errors
//
return(0);
}
int main(void) {
SysCtlClockSet(SYSCTL_SYSDIV_4 | SYSCTL_USE_PLL | SYSCTL_XTAL_16MHZ | SYSCTL_OSC_MAIN);
SysCtlDelay(10000);
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOD);
GPIOPinTypeI2CSCL(GPIO_PORTD_BASE, GPIO_PIN_0);
GPIOPinTypeI2C(GPIO_PORTD_BASE, GPIO_PIN_1);
GPIOPinConfigure(GPIO_PD0_I2C3SCL);
GPIOPinConfigure(GPIO_PD1_I2C3SDA);
SysCtlPeripheralEnable(SYSCTL_PERIPH_I2C3);
I2CMasterInitExpClk( I2C3_MASTER_BASE, SysCtlClockGet(), false);
SysCtlDelay(10000);
I2CMasterTimeoutSet(I2C3_MASTER_BASE, 0x7d);
I2CMasterSlaveAddrSet(I2C3_MASTER_BASE, I2C_SLAVE_ADDRESS, false);
I2CMasterIntEnableEx(I2C3_MASTER_BASE, I2C_MASTER_INT_TIMEOUT|I2C_MASTER_INT_DATA);
IntEnable(INT_I2C3);
IntMasterEnable();
while(1) {
i2c_flag=0;
//Let's send various challenges to our slave
data.op1++;
data.op2+=2;
switch(data.op1 % 4) {
case 0:
data.op = op_add;
break;
case 1:
data.op = op_mult;
break;
case 2:
data.op = op_div;
break;
case 3:
data.op = op_subst;
break;
}
what_we_re_doing = sending;
sent_bytes = 0;
//Start to send the full structure
I2CMasterSlaveAddrSet(I2C3_MASTER_BASE, I2C_SLAVE_ADDRESS, false);
I2CMasterDataPut(I2C3_MASTER_BASE, *((unsigned char *)&data));
I2CMasterControl(I2C3_MASTER_BASE, I2C_MASTER_CMD_BURST_SEND_START);
while(!i2c_flag);
if (i2c_flag == 2) {
//I2C Failure
continue;
}
else if (i2c_flag == 1) {
//I2C Success
}
what_we_re_doing = receiving;
received_bytes = 0;
//Start to receive the full structure
I2CMasterSlaveAddrSet(I2C3_MASTER_BASE, I2C_SLAVE_ADDRESS, true);
I2CMasterControl(I2C3_MASTER_BASE, I2C_MASTER_CMD_BURST_RECEIVE_START);
while(!i2c_flag);
if (i2c_flag == 2) {
//I2C Failure
continue;
}
else if (i2c_flag == 1) {
//I2C Success
}
SysCtlDelay(SysCtlClockGet()/100);
}
}
//*****************************************************************************
//
// Reads a pair of gyro registers and returns the value as a 16-bit value.
// The first register is low byte, second is high byte
// This routine is blocking.
//
// \param ui8RegisterAddress is the first register address
// \return read data as 16-bit value.
//
//*****************************************************************************
uint16_t
Accel_RegRead2(uint8_t ui8RegisterAddress)
{
uint16_t ui16Data = 0;
uint16_t ui16Register = 0;
if (VERBOSE) UARTprintf("GryroRegRead2(0x%x)\n", ui8RegisterAddress);
// Set the slave device address for WRITE
// false = this I2C Master is initiating a writes to the slave.
// true = this I2C Master is initiating reads from the slave.
I2CMasterSlaveAddrSet(I2C1_BASE, ACCEL_SLAVE_ADDRESS, false);
//
// Transaction #1: Send the register address
//
// Set the Gyro Register address to write
// Set the MSB to enable auto increment of register address
I2CMasterDataPut(I2C1_BASE, ui8RegisterAddress | 0x80);
// Start, send one byte (register address), and end the transaction
I2CMasterControl(I2C1_BASE, I2C_MASTER_CMD_SINGLE_SEND);
// Wait for completion
while(I2CMasterBusy(I2C1_BASE))
{
//spin wait
}
//TODO: Check I2CMasterErr(I2C1_BASE)
//
// Transaction #2: read the register[0] data
//
// Set the slave device address for READ
// false = this I2C Master is initiating a writes to the slave.
// true = this I2C Master is initiating reads from the slave.
I2CMasterSlaveAddrSet(I2C1_BASE, ACCEL_SLAVE_ADDRESS, true);
// Start, send device address, read one byte (register[0] data)...
I2CMasterControl(I2C1_BASE, I2C_MASTER_CMD_BURST_RECEIVE_START);
// Wait for completion
while(I2CMasterBusy(I2C1_BASE))
{
//spin wait
}
//TODO: Check I2CMasterErr(I2C1_BASE)
//read this register[0] into the low byte; mask to 8 bits
ui16Data = I2CMasterDataGet(I2C1_BASE) & 0xFF;
//
// Transaction #2 continued: read the register[1] data
//
// ...read one byte (register[1] data), and end the transaction
I2CMasterControl(I2C1_BASE, I2C_MASTER_CMD_BURST_RECEIVE_FINISH);
// Wait for completion
while(I2CMasterBusy(I2C1_BASE))
{
//spin wait
}
//TODO: Check I2CMasterErr(I2C1_BASE)
//read the register[1]; mask to 8 bits
ui16Register = I2CMasterDataGet(I2C1_BASE) & 0xFF;
//put this register[1] into the high byte
ui16Data |= ui16Register << 8;
return ui16Data;
}
void I2C_0_ISR(void)
{
unsigned int status = 0;
/* interrupt status */
status = I2CMasterIntStatus(SOC_I2C_0_REGS);
if(status & I2C_INT_RECV_READY)
{
/* Receive data from data receive register */
*I2C_0_Buffers.p_Receive = I2CMasterDataGet(SOC_I2C_0_REGS);
I2C_0_Buffers.p_Receive++;
I2C_0_Buffers.BytesReceived++;
/* Clear interrupt flag */
I2CMasterIntClearEx(SOC_I2C_0_REGS, I2C_INT_RECV_READY);
if(I2C_0_Buffers.BytesReceived == I2C_0_Buffers.ReceiveBytes)
{
/* Disable the receive ready interrupt */
I2CMasterIntDisableEx(SOC_I2C_0_REGS, I2C_INT_RECV_READY);
/* Generate a STOP */
I2CMasterStop(SOC_I2C_0_REGS);
}
}
if (status & I2C_INT_TRANSMIT_READY)
{
/* Put data to data transmit register of i2c */
I2CMasterDataPut(SOC_I2C_0_REGS, *I2C_0_Buffers.p_Transmit);
I2C_0_Buffers.p_Transmit++;
I2C_0_Buffers.BytesTransmitted++;
/* Clear Transmit interrupt status */
I2CMasterIntClearEx(SOC_I2C_0_REGS, I2C_INT_TRANSMIT_READY);
if(I2C_0_Buffers.BytesTransmitted == I2C_0_Buffers.TransmitBytes)
{
/* Disable the transmit ready interrupt */
I2CMasterIntDisableEx(SOC_I2C_0_REGS, I2C_INT_TRANSMIT_READY);
if(!I2C_0_Buffers.ReceiveBytes)
{
/* Generate a STOP */
I2CMasterStop(SOC_I2C_0_REGS);
}
}
}
if (status & I2C_INT_STOP_CONDITION)
{
/* Disable transmit data ready and receive data read interupt */
I2CMasterIntDisableEx(SOC_I2C_0_REGS, I2C_INT_TRANSMIT_READY | I2C_INT_RECV_READY | I2C_INT_STOP_CONDITION);
/* Clear interrupt flag */
I2CMasterIntClearEx(SOC_I2C_0_REGS, I2C_INT_STOP_CONDITION);
I2C_SetFailFlag0();
}
if(status & I2C_INT_NO_ACK)
{
I2CMasterIntDisableEx(SOC_I2C_0_REGS, I2C_INT_TRANSMIT_READY | I2C_INT_RECV_READY | I2C_INT_NO_ACK | I2C_INT_STOP_CONDITION);
/* Generate a STOP */
I2CMasterStop(SOC_I2C_0_REGS);
/* Clear interrupt flag */
I2CMasterIntClearEx(SOC_I2C_0_REGS, I2C_INT_NO_ACK);
I2C_SetFailFlag0();
}
}
/*
* ======== I2CCC26XX_hwiFxn ========
* Hwi interrupt handler to service the I2C peripheral
*
* The handler is a generic handler for a I2C object.
*/
static void I2CCC26XX_hwiFxn(UArg arg)
{
I2CDataType errStatus;
I2CCC26XX_Object *object;
I2CCC26XX_HWAttrs const *hwAttrs;
/* Get the pointer to the object and hwAttrs */
object = ((I2C_Handle)arg)->object;
hwAttrs = ((I2C_Handle)arg)->hwAttrs;
/* Get the interrupt status of the I2C controller */
errStatus = I2CMasterErr(hwAttrs->baseAddr);
/* Clear interrupt source to avoid additional interrupts */
I2CMasterIntClear(hwAttrs->baseAddr);
/* Check for I2C Errors */
if ((errStatus == I2C_MASTER_ERR_NONE) || (object->mode == I2CCC26XX_ERROR)) {
/* No errors, now check what we need to do next */
switch (object->mode) {
/*
* ERROR case is OK because if an Error is detected, a STOP bit is
* sent; which in turn will call another interrupt. This interrupt
* call will then post the transferComplete semaphore to unblock the
* I2C_transfer function
*/
case I2CCC26XX_ERROR:
break;
case I2CCC26XX_IDLE_MODE:
I2CCC26XX_completeTransfer((I2C_Handle) arg);
break;
case I2CCC26XX_WRITE_MODE:
/* Decrement write Counter */
object->writeCountIdx--;
/* Check if more data needs to be sent */
if (object->writeCountIdx) {
Log_print3(Diags_USER2,
"I2C:(%p) ISR I2CCC26XX_WRITE_MODE: Data to write: 0x%x; "
"To slave: 0x%x",
hwAttrs->baseAddr,
*(object->writeBufIdx),
object->currentTransaction->slaveAddress);
/* Write data contents into data register */
I2CMasterDataPut(hwAttrs->baseAddr,
*(object->writeBufIdx));
object->writeBufIdx++;
if ((object->writeCountIdx < 2) && !(object->readCountIdx)) {
/* Everything has been sent, nothing to receive */
/* Next state: Idle mode */
object->mode = I2CCC26XX_IDLE_MODE;
/* Send last byte with STOP bit */
I2CMasterControl(hwAttrs->baseAddr,
I2C_MASTER_CMD_BURST_SEND_FINISH);
Log_print1(Diags_USER2,
"I2C:(%p) ISR I2CCC26XX_WRITE_MODE: ACK received; "
"Writing w/ STOP bit",
hwAttrs->baseAddr);
}
else {
/*
* Either there is more date to be transmitted or some
* data needs to be received next
*/
I2CMasterControl(hwAttrs->baseAddr,
I2C_MASTER_CMD_BURST_SEND_CONT);
Log_print1(Diags_USER2,
"I2C:(%p) ISR I2CCC26XX_WRITE_MODE: ACK received; Writing",
hwAttrs->baseAddr);
}
}
/* At this point, we know that we need to receive data */
else {
/*
* We need to check after we are done transmitting data, if
* we need to receive any data.
* In a corner case when we have only one byte transmitted
* and no data to receive, the I2C will automatically send
* the STOP bit. In other words, here we only need to check
* if data needs to be received. If so, how much.
*/
if (object->readCountIdx) {
/* Next state: Receive mode */
object->mode = I2CCC26XX_READ_MODE;
/* Switch into Receive mode */
I2CMasterSlaveAddrSet(hwAttrs->baseAddr,
object->currentTransaction->slaveAddress, true);
if (object->readCountIdx > 1) {
/* Send a repeated START */
I2CMasterControl(hwAttrs->baseAddr,
I2C_MASTER_CMD_BURST_RECEIVE_START);
Log_print1(Diags_USER2,
"I2C:(%p) ISR I2CCC26XX_WRITE_MODE: -> I2CCC26XX_READ_MODE; "
"Reading w/ RESTART and ACK",
hwAttrs->baseAddr);
}
else {
/*
* Send a repeated START with a NACK since it's the
* last byte to be received.
* I2C_MASTER_CMD_BURST_RECEIVE_START_NACK is
* is locally defined because there is no macro to
* receive data and send a NACK after sending a
* start bit (0x00000003)
*/
I2CMasterControl(hwAttrs->baseAddr,
I2C_MASTER_CMD_BURST_RECEIVE_START_NACK);
Log_print1(Diags_USER2,
"I2C:(%p) ISR I2CCC26XX_WRITE_MODE: -> I2CCC26XX_READ_MODE; "
"Reading w/ RESTART and NACK",
hwAttrs->baseAddr);
}
}
else {
/* Done with all transmissions */
object->mode = I2CCC26XX_IDLE_MODE;
/*
* No more data needs to be received, so follow up with
* a STOP bit
* Again, there is no equivalent macro (0x00000004) so
* I2C_MASTER_CMD_BURST_RECEIVE_STOP is used.
*/
I2CMasterControl(hwAttrs->baseAddr,
I2C_MASTER_CMD_BURST_RECEIVE_STOP);
Log_print1(Diags_USER2,
"I2C:(%p) ISR I2CCC26XX_WRITE_MODE: -> I2CCC26XX_IDLE_MODE; "
"Sending STOP bit",
hwAttrs->baseAddr);
}
}
break;
case I2CCC26XX_READ_MODE:
/* Save the received data */
*(object->readBufIdx) =
I2CMasterDataGet(hwAttrs->baseAddr);
Log_print2(Diags_USER2,
"I2C:(%p) ISR I2CCC26XX_READ_MODE: Read data byte: 0x%x",
hwAttrs->baseAddr,
*(object->readBufIdx));
object->readBufIdx++;
/* Check if any data needs to be received */
object->readCountIdx--;
if (object->readCountIdx) {
if (object->readCountIdx > 1) {
/* More data to be received */
I2CMasterControl(hwAttrs->baseAddr,
I2C_MASTER_CMD_BURST_RECEIVE_CONT);
Log_print1(Diags_USER2,
"I2C:(%p) ISR I2CCC26XX_READ_MODE: Reading w/ ACK",
hwAttrs->baseAddr);
}
else {
/*
* Send NACK because it's the last byte to be received
* There is no NACK macro equivalent (0x00000001) so
* I2C_MASTER_CMD_BURST_RECEIVE_CONT_NACK is used
*/
I2CMasterControl(hwAttrs->baseAddr,
I2C_MASTER_CMD_BURST_RECEIVE_CONT_NACK);
Log_print1(Diags_USER2,
"I2C:(%p) ISR I2CCC26XX_READ_MODE: Reading w/ NACK",
hwAttrs->baseAddr);
}
}
else {
/* Next state: Idle mode */
object->mode = I2CCC26XX_IDLE_MODE;
/*
* No more data needs to be received, so follow up with a
* STOP bit
* Again, there is no equivalent macro (0x00000004) so
* I2C_MASTER_CMD_BURST_RECEIVE_STOP is used
*/
I2CMasterControl(hwAttrs->baseAddr,
I2C_MASTER_CMD_BURST_RECEIVE_STOP);
Log_print1(Diags_USER2,
"I2C:(%p) ISR I2CCC26XX_READ_MODE: -> I2CCC26XX_IDLE_MODE; "
"Sending STOP bit",
hwAttrs->baseAddr);
}
break;
default:
object->mode = I2CCC26XX_ERROR;
break;
}
}
else {
/* Some sort of error happened! */
object->mode = I2CCC26XX_ERROR;
if (errStatus & I2C_MASTER_ERR_ARB_LOST) {
I2CCC26XX_completeTransfer((I2C_Handle) arg);
}
else {
/* Try to send a STOP bit to end all I2C communications immediately */
/*
* I2C_MASTER_CMD_BURST_SEND_ERROR_STOP -and-
* I2C_MASTER_CMD_BURST_RECEIVE_ERROR_STOP
* have the same values
*/
I2CMasterControl(hwAttrs->baseAddr,
I2C_MASTER_CMD_BURST_SEND_ERROR_STOP);
I2CCC26XX_completeTransfer((I2C_Handle) arg);
}
Log_print2(Diags_USER1,
"I2C:(%p) ISR I2C Bus fault (Status Reg: 0x%x)",
hwAttrs->baseAddr,
errStatus);
}
return;
}
//*****************************************************************************
//
//! Probes the selected I2C bus for available slave devices
//!
//! \param ulI2CBase is the base for the I2C module.
//!
//! This function scans the selected I2C bus for available I2C slave device.
//! The ulI2CBase parameter is the I2C modules master base address.
//! \e ulI2CBase parameter can be one of the following values:
//!
//! - \b I2C0_MASTER_BASE
//! - \b I2C1_MASTER_BASE
//! - \b I2C2_MASTER_BASE
//! - \b I2C3_MASTER_BASE
//!
//! \return 0 if there was an error or 1 if there was not.
//
//*****************************************************************************
unsigned long
I2CBusScan(unsigned long ulI2CBase)
{
unsigned char ucProbeAdress;
unsigned long ucerrorstate;
//
// Check the arguments.
//
ASSERT(I2CMasterBaseValid(ulI2CBase));
//
// Wait until master module is done transferring.
//
while(I2CMasterBusy(ulI2CBase))
{
};
//
// I2C Addresses are 7-bit values
// probe the address range of 0 to 127 to find I2C slave devices on the bus
//
for (ucProbeAdress = 0; ucProbeAdress < 127; ucProbeAdress++)
{
//
// Tell the master module what address it will place on the bus when
// writing to the slave.
//
I2CMasterSlaveAddrSet(ulI2CBase, ucProbeAdress, false);
SysCtlDelay(50000);
//
// Place the command to be sent in the data register.
//
I2CMasterDataPut(ulI2CBase, 0x00);
//
// Initiate send of data from the master.
//
I2CMasterControl(ulI2CBase, I2C_MASTER_CMD_BURST_SEND_START);
//
// Make some delay
//
SysCtlDelay(500000);
//
// Read the I2C Master Control/Status (I2CMCS) Register to a local
// variable
//
ucerrorstate = I2CMasterErr(ulI2CBase);
//
// Examining the content I2C Master Control/Status (I2CMCS) Register
// to see if the ADRACK-Bit (Acknowledge Address) is TRUE (1)
// ( 1: The transmitted address was not acknowledged by the slave)
//
if(ucerrorstate & I2C_MASTER_ERR_ADDR_ACK)
{
//
// device at selected address did not acknowledge --> there's no device
// with this address present on the I2C bus
//
//
// Print a message to Stdio
//
//UARTprintf("Address not found: 0x%2x - %3d\n",ucProbeAdress,ucProbeAdress);
//
// Make some delay
//
//ROM_SysCtlDelay(1500000);
}
//
// ( 0: The transmitted address was acknowledged by the slave)
//
else
{
//
// device at selected address acknowledged --> there is a device
// with this address present on the I2C bus
//
//
// Print a message to Stdio
//
//UARTprintf("Address found: 0x%2x - %3d\n",ucProbeAdress,ucProbeAdress);
//
// Make some delay
//
SysCtlDelay(1500000);
}
}
//
// End transfer of data from the master.
//
I2CMasterControl(ulI2CBase, I2C_MASTER_CMD_BURST_RECEIVE_FINISH);
//
// Print a message to Stdio
//
//UARTprintf("I2C Bus-Scan done...\n");
//
// Return 1 if there is no error.
//
return 1;
}
// this function is used when the user needs to change the time-settings. the data is saved to bank1 or bank0.
void SET_TIMERS(int BANK,int FADE_ON_TIME,int FULLY_ON_TIME,int FADE_OFF_TIME,int FIRST_FULLY_OFF,int SECOND_FULLY_OFF)
{
// Slave address of TCA6507 is 0x45 (binary 1001 101)
// false=write / true=read
I2CMasterSlaveAddrSet(I2C0_MASTER_BASE, 0x45, false);
// Wait for I2C to finish.
while(I2CMasterBusy(I2C0_MASTER_BASE));
//this is used to tell if the data goes into the first or last 4bit of the byte.
int defined_bank;
if(BANK == BANK0)
{
defined_bank=1;
}
else if(BANK == BANK1)
{
defined_bank=10;
}
//again the forloop is used to reduce redundant code and reduce the sheer size of the code
int COUNTER;
for (COUNTER=0;COUNTER!=11;COUNTER++)
{
//the functions start out by sending the allready defined select0,1,2 to reach the registers that are used.
if(COUNTER == 2)
{
//puts the command-byte in the dataput getting ready to sending it.
I2CMasterDataPut(I2C0_MASTER_BASE, COMMAND_BYTE_INCREMENT);
//starts sending the data.
I2CMasterControl(I2C0_MASTER_BASE,I2C_MASTER_CMD_BURST_SEND_START);
}
else if(COUNTER == 3)
{
//gets the first led_current_setting containing the byte for select0 ready to transmitting.
I2CMasterDataPut(I2C0_MASTER_BASE,led_current_setting[0] );
//keeps sending data.
I2CMasterControl(I2C0_MASTER_BASE,I2C_MASTER_CMD_BURST_SEND_CONT);
}
else if(COUNTER == 4)
{
//gets the second led_current_setting containing the byte for select1 ready to transmitting.
I2CMasterDataPut(I2C0_MASTER_BASE,led_current_setting[1] );
//keeps sending data.
I2CMasterControl(I2C0_MASTER_BASE,I2C_MASTER_CMD_BURST_SEND_CONT);
}
else if(COUNTER == 5)
{
//gets the third led_current_setting containing the byte for select2 ready to transmitting.
I2CMasterDataPut(I2C0_MASTER_BASE,led_current_setting[2] );
//keeps sending data.
I2CMasterControl(I2C0_MASTER_BASE, I2C_MASTER_CMD_BURST_SEND_CONT );
}
else if(COUNTER == 6)
{
//Puts in the value for the FADE_ON_TIME to get ready to transmit to bank0/bank1.
I2CMasterDataPut(I2C0_MASTER_BASE,NUMBER_HEX[FADE_ON_TIME]*defined_bank);
//keeps sending data.
I2CMasterControl(I2C0_MASTER_BASE, I2C_MASTER_CMD_BURST_SEND_CONT );
}
else if(COUNTER == 7)
{
//Puts in the value for the FULLY_ON_TIME to get ready to transmit to bank0/bank1.
I2CMasterDataPut(I2C0_MASTER_BASE,NUMBER_HEX[FULLY_ON_TIME]*defined_bank );
//keeps sending data.
I2CMasterControl(I2C0_MASTER_BASE, I2C_MASTER_CMD_BURST_SEND_CONT );
}
else if(COUNTER == 8)
{
//Puts in the value for the FADE_OFF_TIME to get ready to transmit to bank0/bank1.
I2CMasterDataPut(I2C0_MASTER_BASE,NUMBER_HEX[FADE_OFF_TIME]*defined_bank);
//keeps sending data.
I2CMasterControl(I2C0_MASTER_BASE, I2C_MASTER_CMD_BURST_SEND_CONT );
}
else if(COUNTER == 9)
{
//Puts in the value for the FIRST_FULLY_OFF to get ready to transmit to bank0/bank1.
I2CMasterDataPut(I2C0_MASTER_BASE,NUMBER_HEX[FIRST_FULLY_OFF]*defined_bank);
//keeps sending data.
I2CMasterControl(I2C0_MASTER_BASE, I2C_MASTER_CMD_BURST_SEND_CONT );
}
else if(COUNTER == 10)
{
//Puts in the value for the SECOND_FULLY_OFF to get ready to transmit to bank0/bank1.
I2CMasterDataPut(I2C0_MASTER_BASE,NUMBER_HEX[SECOND_FULLY_OFF]*defined_bank);
//transmitting the final byte and a stop command.
I2CMasterControl(I2C0_MASTER_BASE, I2C_MASTER_CMD_BURST_SEND_CONT );
}
}
// Wait for I2C to finish.
while(I2CMasterBusy(I2C0_MASTER_BASE));
//a short delay.
SysCtlDelay(80000);
}
//*****************************************************************************
//
//! Reads the I2C slave register.
//!
//! \param ulI2CBase is the base for the I2C module.
//! \param ucSlaveAdress is the 7-bit address of the slave to be addressed.
//! \param ucReg is the register to read from.
//!
//! This function initiates a read from the slave device.
//! The ulI2CBase parameter is the I2C modules master base address.
//! \e ulI2CBase parameter can be one of the following values:
//!
//! - \b I2C0_MASTER_BASE
//! - \b I2C1_MASTER_BASE
//! - \b I2C2_MASTER_BASE
//! - \b I2C3_MASTER_BASE
//!
//! \return Register value in an unsigned long format. Note that 0 will be
//! returned if there is ever an error, 1 if there was not.
//
//*****************************************************************************
unsigned long
I2CRegRead(unsigned long ulI2CBase, unsigned char ucSlaveAdress, unsigned char ucReg)
{
unsigned long ulRegValue = 0;
//
// Check the arguments.
//
ASSERT(I2CMasterBaseValid(ulI2CBase));
//
// Wait until master module is done transferring.
//
while(I2CMasterBusy(ulI2CBase))
{
};
//
// Tell the master module what address it will place on the bus when
// writing to the slave.
//
I2CMasterSlaveAddrSet(ulI2CBase, ucSlaveAdress, 0);
//
// Place the command to be sent in the data register.
//
I2CMasterDataPut(ulI2CBase, ucReg);
//
// Initiate send of data from the master.
//
I2CMasterControl(ulI2CBase, I2C_MASTER_CMD_SINGLE_SEND);
//
// Wait until master module is done transferring.
//
while(I2CMasterBusy(ulI2CBase))
{
};
//
// Check for errors.
//
if(I2CMasterErr(ulI2CBase) != I2C_MASTER_ERR_NONE)
{
return 0;
}
//
// Tell the master module what address it will place on the bus when
// reading from the slave.
//
I2CMasterSlaveAddrSet(ulI2CBase, ucSlaveAdress, 1);
//
// Tell the master to read data.
//
I2CMasterControl(ulI2CBase, I2C_MASTER_CMD_SINGLE_RECEIVE);
//
// Wait until master module is done receiving.
//
while(I2CMasterBusy(ulI2CBase))
{
};
//
// Check for errors.
//
if(I2CMasterErr(ulI2CBase) != I2C_MASTER_ERR_NONE)
{
return 0;
}
//
// Read the data from the master.
//
ulRegValue = I2CMasterDataGet(ulI2CBase);
//
// Return the register value.
//
return ulRegValue;
}
/*
** ISR to handler i2c interrupts
*/
static void I2C0Isr(void)
{
volatile unsigned int intCode = 0;
/* Get interrupt vector code */
intCode = I2CInterruptVectorGet(SOC_I2C_0_REGS);
while(intCode!=0)
{
/* Clear status of interrupt */
#ifdef _TMS320C6X
IntEventClear(SYS_INT_I2C0_INT);
#else
IntSystemStatusClear(15);
#endif
if (intCode == I2C_INTCODE_TX_READY)
{
I2CMasterDataPut(SOC_I2C_0_REGS, slaveData[dataIdx]);
dataIdx++;
}
if(intCode == I2C_INTCODE_RX_READY)
{
slaveData[dataIdx] = I2CMasterDataGet(SOC_I2C_0_REGS);
dataIdx++;
}
if (intCode == I2C_INTCODE_STOP)
{
I2CMasterIntDisableEx(SOC_I2C_0_REGS, I2C_INT_TRANSMIT_READY |
I2C_INT_DATA_READY |
I2C_INT_NO_ACK |
I2C_INT_STOP_CONDITION);
txCompFlag = 0;
}
if (intCode == I2C_INTCODE_NACK)
{
I2CMasterIntDisableEx(SOC_I2C_0_REGS, I2C_INT_TRANSMIT_READY |
I2C_INT_DATA_READY |
I2C_INT_NO_ACK |
I2C_INT_STOP_CONDITION);
/* Generate a STOP */
I2CMasterStop(SOC_I2C_0_REGS);
I2CStatusClear(SOC_I2C_0_REGS, I2C_CLEAR_STOP_CONDITION);
/* Clear interrupt at AINTC, if we missed any, in case of error */
#ifdef _TMS320C6X
IntEventClear(SYS_INT_I2C0_INT);
#else
IntSystemStatusClear(15);
#endif
txCompFlag = 0;
}
if (I2CMasterIntStatus(SOC_I2C_0_REGS) & I2C_ICSTR_NACKSNT)
{
I2CMasterIntDisableEx(SOC_I2C_0_REGS, I2C_INT_TRANSMIT_READY |
I2C_INT_DATA_READY |
I2C_INT_NO_ACK |
I2C_INT_STOP_CONDITION);
/* Generate a STOP */
I2CMasterStop(SOC_I2C_0_REGS);
I2CStatusClear(SOC_I2C_0_REGS, (I2C_CLEAR_NO_ACK_SENT |
I2C_CLEAR_STOP_CONDITION));
/* Clear interrupt at AINTC, if we missed any, in case of error */
#ifdef _TMS320C6X
IntEventClear(SYS_INT_I2C0_INT);
#else
IntSystemStatusClear(15);
#endif
txCompFlag = 0;
}
intCode = I2CInterruptVectorGet(SOC_I2C_0_REGS);
}
}
/*
** I2C Interrupt Service Routine. This function will read and write
** data through I2C bus.
*/
static void mpu6050_isr(int irqno, void* param)
{
unsigned int status = 0;
/* Get only Enabled interrupt status */
status = I2CMasterIntStatus(I2C0_BASE);
/*
** Clear all enabled interrupt status except receive ready and
** transmit ready interrupt status
*/
I2CMasterIntClearEx(I2C0_BASE,
(status & ~(I2C_INT_RECV_READY | I2C_INT_TRANSMIT_READY)));
if(status & I2C_INT_RECV_READY)
{
/* Receive data from data receive register */
dataFromSlave[rCount++] = I2CMasterDataGet(I2C0_BASE);
/* Clear receive ready interrupt status */
I2CMasterIntClearEx(I2C0_BASE, I2C_INT_RECV_READY);
if(rCount == numOfBytes)
{
/* Disable the receive ready interrupt */
I2CMasterIntDisableEx(I2C0_BASE, I2C_INT_RECV_READY);
/* Generate a STOP */
I2CMasterStop(I2C0_BASE);
}
}
if (status & I2C_INT_TRANSMIT_READY)
{
/* Put data to data transmit register of i2c */
I2CMasterDataPut(I2C0_BASE, dataToSlave[tCount++]);
/* Clear Transmit interrupt status */
I2CMasterIntClearEx(I2C0_BASE, I2C_INT_TRANSMIT_READY);
if(tCount == numOfBytes)
{
/* Disable the transmit ready interrupt */
I2CMasterIntDisableEx(I2C0_BASE, I2C_INT_TRANSMIT_READY);
}
}
if (status & I2C_INT_STOP_CONDITION)
{
/* Disable transmit data ready and receive data read interupt */
I2CMasterIntDisableEx(I2C0_BASE, I2C_INT_TRANSMIT_READY |
I2C_INT_RECV_READY |
I2C_INT_STOP_CONDITION);
flag = 0;
}
if(status & I2C_INT_NO_ACK)
{
I2CMasterIntDisableEx(I2C0_BASE, I2C_INT_TRANSMIT_READY |
I2C_INT_RECV_READY |
I2C_INT_NO_ACK |
I2C_INT_STOP_CONDITION);
/* Generate a STOP */
I2CMasterStop(I2C0_BASE);
flag = 0;
}
}
/*
* ======== I2CCC26XX_primeTransfer =======
*/
static void I2CCC26XX_primeTransfer(I2C_Handle handle,
I2C_Transaction *transaction)
{
I2CCC26XX_Object *object;
I2CCC26XX_HWAttrs const *hwAttrs;
/* Get the pointer to the object and hwAttrs */
object = handle->object;
hwAttrs = handle->hwAttrs;
/* Store the new internal counters and pointers */
object->currentTransaction = transaction;
object->writeBufIdx = transaction->writeBuf;
object->writeCountIdx = transaction->writeCount;
object->readBufIdx = transaction->readBuf;
object->readCountIdx = transaction->readCount;
Log_print2(Diags_USER1,
"I2C:(%p) Starting transaction to slave: 0x%x",
hwAttrs->baseAddr,
object->currentTransaction->slaveAddress);
/* Start transfer in Transmit mode */
if (object->writeCountIdx) {
/* Specify the I2C slave address */
I2CMasterSlaveAddrSet(hwAttrs->baseAddr,
object->currentTransaction->slaveAddress, false);
/* Update the I2C mode */
object->mode = I2CCC26XX_WRITE_MODE;
Log_print3(Diags_USER2,
"I2C:(%p) I2CCC26XX_IDLE_MODE: Data to write: 0x%x; To Slave: 0x%x",
hwAttrs->baseAddr,
*(object->writeBufIdx),
object->currentTransaction->slaveAddress);
/* Write data contents into data register */
I2CMasterDataPut(hwAttrs->baseAddr,
*((object->writeBufIdx)++));
/* Start the I2C transfer in master transmit mode */
I2CMasterControl(hwAttrs->baseAddr, I2C_MASTER_CMD_BURST_SEND_START);
Log_print1(Diags_USER2,
"I2C:(%p) I2CCC26XX_IDLE_MODE: -> I2CCC26XX_WRITE_MODE; "
"Writing w/ START",
hwAttrs->baseAddr);
}
/* Start transfer in Receive mode */
else {
/* Specify the I2C slave address */
I2CMasterSlaveAddrSet(hwAttrs->baseAddr,
object->currentTransaction->slaveAddress, true);
/* Update the I2C mode */
object->mode = I2CCC26XX_READ_MODE;
if (object->readCountIdx < 2) {
/* Start the I2C transfer in master receive mode */
I2CMasterControl(hwAttrs->baseAddr,
I2C_MASTER_CMD_BURST_SEND_START);
Log_print1(Diags_USER2,
"I2C:(%p) I2CCC26XX_IDLE_MODE: -> I2CCC26XX_READ_MODE; "
"Reading w/ NACK",
hwAttrs->baseAddr);
}
else {
/* Start the I2C transfer in master receive mode */
I2CMasterControl(hwAttrs->baseAddr,
I2C_MASTER_CMD_BURST_RECEIVE_START);
Log_print1(Diags_USER2,
"I2C:(%p) I2CCC26XX_IDLE_MODE: -> I2CCC26XX_READ_MODE; "
"Reading w/ ACK",
hwAttrs->baseAddr);
}
}
}
//*****************************************************************************
//
// Reads from the I2C-attached EEPROM device.
//
// \param pucData points to storage for the data read from the EEPROM.
// \param ulOffset is the EEPROM address of the first byte to read.
// \param ulCount is the number of bytes of data to read from the EEPROM.
//
// This function reads one or more bytes of data from a given address in the
// ID EEPROM found on several of the lm3s9b96 development kit daughter boards.
// The return code indicates whether the read was successful.
//
// \return Returns \b true on success of \b false on failure.
//
//*****************************************************************************
static tBoolean
EEPROMReadPolled(unsigned char *pucData, unsigned long ulOffset,
unsigned long ulCount)
{
unsigned long ulToRead;
//
// Clear any previously signalled interrupts.
//
I2CMasterIntClear(ID_I2C_MASTER_BASE);
//
// Start with a dummy write to get the address set in the EEPROM.
//
I2CMasterSlaveAddrSet(ID_I2C_MASTER_BASE, ID_I2C_ADDR, false);
//
// Place the address to be written in the data register.
//
I2CMasterDataPut(ID_I2C_MASTER_BASE, ulOffset);
//
// Perform a single send, writing the address as the only byte.
//
I2CMasterControl(ID_I2C_MASTER_BASE, I2C_MASTER_CMD_BURST_SEND_START);
//
// Wait until the current byte has been transferred.
//
while(I2CMasterIntStatus(ID_I2C_MASTER_BASE, false) == 0)
{
}
if(I2CMasterErr(ID_I2C_MASTER_BASE) != I2C_MASTER_ERR_NONE)
{
I2CMasterIntClear(ID_I2C_MASTER_BASE);
return(false);
}
//
// Clear any interrupts set.
//
I2CMasterIntClear(ID_I2C_MASTER_BASE);
//
// Put the I2C master into receive mode.
//
I2CMasterSlaveAddrSet(ID_I2C_MASTER_BASE, ID_I2C_ADDR, true);
//
// Start the receive.
//
I2CMasterControl(ID_I2C_MASTER_BASE,
((ulCount > 1) ? I2C_MASTER_CMD_BURST_RECEIVE_START :
I2C_MASTER_CMD_SINGLE_RECEIVE));
//
// Receive the required number of bytes.
//
ulToRead = ulCount;
while(ulToRead)
{
//
// Wait until the current byte has been read.
//
while(I2CMasterIntStatus(ID_I2C_MASTER_BASE, false) == 0)
{
}
//
// Read the received character.
//
*pucData++ = I2CMasterDataGet(ID_I2C_MASTER_BASE);
ulToRead--;
//
// Clear pending interrupt notifications.
//
I2CMasterIntClear(ID_I2C_MASTER_BASE);
//
// Set up for the next byte if any more remain.
//
if(ulToRead)
{
I2CMasterControl(ID_I2C_MASTER_BASE,
((ulToRead == 1) ?
I2C_MASTER_CMD_BURST_RECEIVE_FINISH :
I2C_MASTER_CMD_BURST_RECEIVE_CONT));
}
}
//
// Clear pending interrupt notification.
//
I2CMasterIntClear(ID_I2C_MASTER_BASE);
//
// Tell the caller we read the required data.
//
return(true);
}
/*
** I2C Interrupt Service Routine. This function will read and write
** data through I2C bus.
*/
void I2CIsr(new_twi* TwiStruct)
{
unsigned int status = 0;
/* Get only Enabled interrupt status */
status = I2CMasterIntStatus(TwiStruct->BaseAddr);
/*
** Clear all enabled interrupt status except receive ready and
** transmit ready interrupt status
*/
I2CMasterIntClearEx(TwiStruct->BaseAddr,
(status & ~(I2C_INT_RECV_READY | I2C_INT_TRANSMIT_READY | I2C_INT_NO_ACK)));
if(status & I2C_INT_RECV_READY)
{
/* Receive data from data receive register */
TwiStruct->RxBuff[TwiStruct->rCount++] = I2CMasterDataGet(TwiStruct->BaseAddr);
/* Clear receive ready interrupt status */
I2CMasterIntClearEx(TwiStruct->BaseAddr, I2C_INT_RECV_READY);
if(TwiStruct->rCount == TwiStruct->numOfBytes)
{
/* Disable the receive ready interrupt */
I2CMasterIntDisableEx(TwiStruct->BaseAddr, I2C_INT_RECV_READY);
/* Generate a STOP */
I2CMasterStop(TwiStruct->BaseAddr);
}
}
if (status & I2C_INT_TRANSMIT_READY)
{
/* Put data to data transmit register of i2c */
I2CMasterDataPut(TwiStruct->BaseAddr, TwiStruct->TxBuff[TwiStruct->tCount++]);
/* Clear Transmit interrupt status */
I2CMasterIntClearEx(TwiStruct->BaseAddr, I2C_INT_TRANSMIT_READY);
if(TwiStruct->tCount == TwiStruct->numOfBytes)
{
/* Disable the transmit ready interrupt */
I2CMasterIntDisableEx(TwiStruct->BaseAddr, I2C_INT_TRANSMIT_READY);
}
}
if (status & I2C_INT_STOP_CONDITION)
{
/* Disable transmit data ready and receive data read interupt */
I2CMasterIntDisableEx(TwiStruct->BaseAddr, I2C_INT_TRANSMIT_READY |
I2C_INT_RECV_READY |
I2C_INT_STOP_CONDITION);
TwiStruct->flag = 0;
}
if(status & I2C_INT_NO_ACK)
{
I2CMasterIntDisableEx(TwiStruct->BaseAddr, I2C_INT_TRANSMIT_READY |
I2C_INT_RECV_READY |
I2C_INT_NO_ACK |
I2C_INT_STOP_CONDITION);
/* Generate a STOP */
I2CMasterStop(TwiStruct->BaseAddr);
TwiStruct->flag = 0;
TwiStruct->error_flag = 1;
}
//I2CEndOfInterrupt(TwiStruct->BaseAddr, 0);
}
//*****************************************************************************
//
// Configure the I2C0 master and slave and connect them using loopback mode.
//
//*****************************************************************************
int
main(void)
{
uint32_t ui32DataTx;
//
// Set the clocking to run directly from the external crystal/oscillator.
// TODO: The SYSCTL_XTAL_ value must be changed to match the value of the
// crystal on your board.
//
SysCtlClockSet(SYSCTL_SYSDIV_1 | SYSCTL_USE_OSC | SYSCTL_OSC_MAIN |
SYSCTL_XTAL_16MHZ);
//
// The I2C0 peripheral must be enabled before use.
//
SysCtlPeripheralEnable(SYSCTL_PERIPH_I2C0);
//
// For this example I2C0 is used with PortB[3:2]. The actual port and
// pins used may be different on your part, consult the data sheet for
// more information. GPIO port B needs to be enabled so these pins can
// be used.
// TODO: change this to whichever GPIO port you are using.
//
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOB);
//
// Configure the pin muxing for I2C0 functions on port B2 and B3.
// This step is not necessary if your part does not support pin muxing.
// TODO: change this to select the port/pin you are using.
//
GPIOPinConfigure(GPIO_PB2_I2C0SCL);
GPIOPinConfigure(GPIO_PB3_I2C0SDA);
//
// Select the I2C function for these pins. This function will also
// configure the GPIO pins pins for I2C operation, setting them to
// open-drain operation with weak pull-ups. Consult the data sheet
// to see which functions are allocated per pin.
// TODO: change this to select the port/pin you are using.
//
GPIOPinTypeI2C(GPIO_PORTB_BASE, GPIO_PIN_2 | GPIO_PIN_3);
//
// Enable loopback mode. Loopback mode is a built in feature that helps
// for debug the I2Cx module. It internally connects the I2C master and
// slave terminals, which effectively lets you send data as a master and
// receive data as a slave. NOTE: For external I2C operation you will need
// to use external pull-ups that are faster than the internal pull-ups.
// Refer to the datasheet for more information.
//
HWREG(I2C0_BASE + I2C_O_MCR) |= 0x01;
//
// Enable the I2C0 interrupt on the processor (NVIC).
//
IntEnable(INT_I2C0);
//
// Configure and turn on the I2C0 slave interrupt. The I2CSlaveIntEnableEx()
// gives you the ability to only enable specific interrupts. For this case
// we are only interrupting when the slave device receives data.
//
I2CSlaveIntEnableEx(I2C0_BASE, I2C_SLAVE_INT_DATA);
//
// Enable and initialize the I2C0 master module. Use the system clock for
// the I2C0 module. The last parameter sets the I2C data transfer rate.
// If false the data rate is set to 100kbps and if true the data rate will
// be set to 400kbps. For this example we will use a data rate of 100kbps.
//
I2CMasterInitExpClk(I2C0_BASE, SysCtlClockGet(), false);
//
// Enable the I2C0 slave module.
//
I2CSlaveEnable(I2C0_BASE);
//
// Set the slave address to SLAVE_ADDRESS. In loopback mode, it's an
// arbitrary 7-bit number (set in a macro above) that is sent to the
// I2CMasterSlaveAddrSet function.
//
I2CSlaveInit(I2C0_BASE, SLAVE_ADDRESS);
//
// Tell the master module what address it will place on the bus when
// communicating with the slave. Set the address to SLAVE_ADDRESS
// (as set in the slave module). The receive parameter is set to false
// which indicates the I2C Master is initiating a writes to the slave. If
// true, that would indicate that the I2C Master is initiating reads from
// the slave.
//
I2CMasterSlaveAddrSet(I2C0_BASE, SLAVE_ADDRESS, false);
//
// Set up the serial console to use for displaying messages. This is just
// for this example program and is not needed for proper I2C operation.
//
InitConsole();
//
// Enable interrupts to the processor.
//
IntMasterEnable();
//
// Display the example setup on the console.
//
UARTprintf("I2C Slave Interrupt Example ->");
UARTprintf("\n Module = I2C0");
UARTprintf("\n Mode = Receive interrupt on the Slave module");
UARTprintf("\n Rate = 100kbps\n\n");
//
// Initialize the data to send.
//
ui32DataTx = 'I';
//
// Indicate the direction of the data.
//
UARTprintf("Transferring from: Master -> Slave\n");
//
// Display the data that I2C0 is transferring.
//
UARTprintf(" Sending: '%c'", ui32DataTx);
//
// Place the data to be sent in the data register.
//
I2CMasterDataPut(I2C0_BASE, ui32DataTx);
//
// Initiate send of single piece of data from the master. Since the
// loopback mode is enabled, the Master and Slave units are connected
// allowing us to receive the same data that we sent out.
//
I2CMasterControl(I2C0_BASE, I2C_MASTER_CMD_SINGLE_SEND);
//
// Wait for interrupt to occur.
//
while(!g_bIntFlag)
{
}
//
// Display that interrupt was received.
//
UARTprintf("\n Slave Interrupt Received!\n");
//
// Display the data that the slave has received.
//
UARTprintf(" Received: '%c'\n\n", g_ui32DataRx);
//
// Loop forever.
//
while(1)
{
}
}
//*****************************************************************************
//
//! Writes to the specified I2C slave register.
//!
//! \param ulI2CBase is the base for the I2C module.
//! \param ucSlaveAdress is the 7-bit address of the slave to be addressed.
//! \param ucReg is the register to write data to.
//! \param ucValue is the 8-bit data to be written.
//!
//! This function initiates a read from the I2C slave device.
//! The ulI2CBase parameter is the I2C modules master base address.
//! \e ulI2CBase parameter can be one of the following values:
//!
//! - \b I2C0_MASTER_BASE
//! - \b I2C1_MASTER_BASE
//! - \b I2C2_MASTER_BASE
//! - \b I2C3_MASTER_BASE
//!
//! \return Register value in an unsigned long format. Note that 0 will be
//! returned if there is ever an error, 1 if there was not.
//
//*****************************************************************************
unsigned long
I2CRegWrite(unsigned long ulI2CBase, unsigned char ucSlaveAdress,
unsigned char ucReg, unsigned char ucValue)
{
//
// Check the arguments.
//
ASSERT(I2CMasterBaseValid(ulI2CBase));
//
// Wait until master module is done transferring.
//
while(I2CMasterBusy(ulI2CBase))
{
};
//
// Tell the master module what address it will place on the bus when
// writing to the slave.
//
I2CMasterSlaveAddrSet(ulI2CBase, ucSlaveAdress, 0);
//
// Place the command to be sent in the data register.
//
I2CMasterDataPut(ulI2CBase, ucReg);
//
// Initiate send of data from the master.
//
I2CMasterControl(ulI2CBase, I2C_MASTER_CMD_BURST_SEND_START);
//
// Wait until master module is done transferring.
//
while(I2CMasterBusy(ulI2CBase))
{
};
//
// Check for errors.
//
if(I2CMasterErr(ulI2CBase) != I2C_MASTER_ERR_NONE)
{
return 0;
}
//
// Place the value to be sent in the data register.
//
I2CMasterDataPut(ulI2CBase, ucValue);
//
// Initiate send of data from the master.
//
I2CMasterControl(ulI2CBase, I2C_MASTER_CMD_BURST_SEND_CONT);
//
// Wait until master module is done transferring.
//
while(I2CMasterBusy(ulI2CBase))
{
};
//
// Check for errors.
//
if(I2CMasterErr(ulI2CBase) != I2C_MASTER_ERR_NONE)
{
return 0;
}
//
// Initiate send of data from the master.
//
I2CMasterControl(ulI2CBase, I2C_MASTER_CMD_BURST_SEND_FINISH);
//
// Wait until master module is done transferring.
//
while(I2CMasterBusy(ulI2CBase))
{
};
//
// Check for errors.
//
if(I2CMasterErr(ulI2CBase) != I2C_MASTER_ERR_NONE)
{
return 0;
}
//
// Return 1 if there is no error.
//
return 1;
}
//*****************************************************************************
//
// Write a register in the TLV320AIC23B DAC.
//
// \param ucRegister is the offset to the register to write.
// \param ulData is the data to be written to the DAC register.
//
// This function will write the register passed in /e ucAddr with the value
// passed in to /e ulData. The data in \e ulData is actually 9 bits and the
// value in /e ucAddr is interpreted as 7 bits.
//
// \return Returns \b true on success or \b false on error.
//
//*****************************************************************************
static tBoolean
TLV320AIC23BWriteRegister(unsigned char ucRegister, unsigned long ulData)
{
//
// Set the slave address.
//
I2CMasterSlaveAddrSet(DAC_I2C_MASTER_BASE, TI_TLV320AIC23B_ADDR_0, false);
//
// Write the next byte to the controller.
//
I2CMasterDataPut(DAC_I2C_MASTER_BASE, ucRegister | ((ulData >> 8) & 1));
//
// Continue the transfer.
//
I2CMasterControl(DAC_I2C_MASTER_BASE, I2C_MASTER_CMD_BURST_SEND_START);
//
// Wait until the current byte has been transferred.
//
while(I2CMasterIntStatus(DAC_I2C_MASTER_BASE, false) == 0)
{
}
if(I2CMasterErr(DAC_I2C_MASTER_BASE) != I2C_MASTER_ERR_NONE)
{
I2CMasterIntClear(DAC_I2C_MASTER_BASE);
return(false);
}
//
// Wait until the current byte has been transferred.
//
while(I2CMasterIntStatus(DAC_I2C_MASTER_BASE, false))
{
I2CMasterIntClear(DAC_I2C_MASTER_BASE);
}
//
// Write the next byte to the controller.
//
I2CMasterDataPut(DAC_I2C_MASTER_BASE, ulData);
//
// End the transfer.
//
I2CMasterControl(DAC_I2C_MASTER_BASE, I2C_MASTER_CMD_BURST_SEND_FINISH);
//
// Wait until the current byte has been transferred.
//
while(I2CMasterIntStatus(DAC_I2C_MASTER_BASE, false) == 0)
{
}
if(I2CMasterErr(DAC_I2C_MASTER_BASE) != I2C_MASTER_ERR_NONE)
{
return(false);
}
while(I2CMasterIntStatus(DAC_I2C_MASTER_BASE, false))
{
I2CMasterIntClear(DAC_I2C_MASTER_BASE);
}
return(true);
}
//*****************************************************************************
//
//! Writes one/multiple bytes of data to an I2C slave device.
//! Ensure to use auto-increment options on some devices
//! (Control Registers, refer to data sheet).
//! I.e. store related command in the first position of your data array.
//!
//! \param ulI2CBase is the base for the I2C module.
//! \param ucSlaveAdress is the 7-bit address of the slave to be addressed.
//! \param ucReg is the register to start writing to.
//! \param cSendData is a pointer to the array to be send.
//! \param uiSize is the number of bytes to send from array cSendData[].
//!
//! This function writes multiple bytes of data an I2C slave device.
//! The ulI2CBase parameter is the I2C modules master base address.
//! \e ulI2CBase parameter can be one of the following values:
//!
//! - \b I2C0_MASTER_BASE
//! - \b I2C1_MASTER_BASE
//! - \b I2C2_MASTER_BASE
//! - \b I2C3_MASTER_BASE
//!
//! \return 0 if there was an error or 1 if there was not.
//
//*****************************************************************************
unsigned long
I2CWriteData(unsigned long ulI2CBase, unsigned char ucSlaveAdress,
unsigned char ucReg, char* cSendData, unsigned int uiSize)
{
unsigned int uibytecount; // local variable used for byte counting/state determination
int MasterOptionCommand; // used to assign the commands for ROM_I2CMasterControl() function
//
// Check the arguments.
//
ASSERT(I2CMasterBaseValid(ulI2CBase));
//
// Wait until master module is done transferring.
//
while(I2CMasterBusy(ulI2CBase))
{
};
//
// Tell the master module what address it will place on the bus when
// writing to the slave.
//
I2CMasterSlaveAddrSet(ulI2CBase, ucSlaveAdress, false);
//
// Place the value to be sent in the data register.
//
I2CMasterDataPut(ulI2CBase, ucReg);
//
// Initiate send of data from the master.
//
I2CMasterControl(ulI2CBase, I2C_MASTER_CMD_BURST_SEND_START);
//
// Wait until master module is done transferring.
//
while(I2CMasterBusy(ulI2CBase))
{
};
//
// Check for errors.
//
if(I2CMasterErr(ulI2CBase) != I2C_MASTER_ERR_NONE)
{
return 0;
}
//
// Start with CONT for more than one byte to write
//
MasterOptionCommand = I2C_MASTER_CMD_BURST_SEND_CONT;
for(uibytecount = 0; uibytecount < uiSize; uibytecount++)
{
//
// The second and intermittent byte has to be send with CONTINUE control word
//
if(uibytecount == 1)
MasterOptionCommand = I2C_MASTER_CMD_BURST_SEND_CONT;
//
// The last byte has to be send with FINISH control word
//
if(uibytecount == uiSize - 1)
MasterOptionCommand = I2C_MASTER_CMD_BURST_SEND_FINISH;
//
// Re-configure to SINGLE if there is only one byte to write
//
if(uiSize == 1)
MasterOptionCommand = I2C_MASTER_CMD_SINGLE_SEND;
//
// Send data byte
//
I2CMasterDataPut(ulI2CBase, cSendData[uibytecount]);
//
// Initiate send of data from the master.
//
I2CMasterControl(ulI2CBase, MasterOptionCommand);
//
// Wait until master module is done transferring.
//
while(I2CMasterBusy(ulI2CBase))
{
};
//
// Check for errors.
//
if(I2CMasterErr(ulI2CBase) != I2C_MASTER_ERR_NONE)
{
return 0;
}
}
//
// Return 1 if there is no error.
//
return 1;
}
int main(void)
{
// Clock (80MHz)
SysCtlClockSet(SYSCTL_SYSDIV_2_5 | SYSCTL_USE_PLL | SYSCTL_XTAL_16MHZ | SYSCTL_OSC_MAIN);
// GPIO
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOF);
GPIOPinTypeGPIOOutput(GPIO_PORTF_BASE, GPIO_PIN_1);
GPIOPinWrite(GPIO_PORTF_BASE, GPIO_PIN_1, 0);
// UART
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA);
SysCtlPeripheralEnable(SYSCTL_PERIPH_UART0);
GPIOPinTypeUART(GPIO_PORTA_BASE, GPIO_PIN_0 | GPIO_PIN_1);
UARTConfigSetExpClk(UART0_BASE, SysCtlClockGet(), 115200, (UART_CONFIG_PAR_NONE | UART_CONFIG_STOP_ONE | UART_CONFIG_WLEN_8));
UARTEnable(UART0_BASE);
// I2C
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOB);
SysCtlPeripheralEnable(SYSCTL_PERIPH_I2C0);
GPIOPinConfigure(GPIO_PB2_I2C0SCL);
GPIOPinConfigure(GPIO_PB3_I2C0SDA);
GPIOPinTypeI2C(GPIO_PORTB_BASE, GPIO_PIN_3);
GPIOPinTypeI2CSCL(GPIO_PORTB_BASE, GPIO_PIN_2);
I2CMasterInitExpClk(I2C0_BASE, SysCtlClockGet(), false);
I2CMasterEnable(I2C0_BASE);
// Scan for addresses
GPIOPinWrite(GPIO_PORTF_BASE, GPIO_PIN_1, GPIO_PIN_1);
printf("Scan started\r\n");
for(i=0; i<255; i++)
{
I2CMasterSlaveAddrSet(I2C0_BASE, i>>1, false);
I2CMasterDataPut(I2C0_BASE, 0);
I2CMasterControl(I2C0_BASE, I2C_MASTER_CMD_SINGLE_SEND);
SysCtlDelay(SysCtlClockGet()/10000);
if (I2CMasterErr(I2C0_BASE) == I2C_MASTER_ERR_NONE)
{
printf("x%02X\r\n", i);
}
else
{
//printf(" N\r\n");
}
}
printf("\r\nScan complete\r\n\r\n");
GPIOPinWrite(GPIO_PORTF_BASE, GPIO_PIN_1, 0);
while(1);
}