int m68k_reg_write(struct uc_struct *uc, unsigned int *regs, void *const *vals, int count) { CPUState *mycpu = uc->cpu; int i; for (i = 0; i < count; i++) { unsigned int regid = regs[i]; const void *value = vals[i]; if (regid >= UC_M68K_REG_A0 && regid <= UC_M68K_REG_A7) M68K_CPU(uc, mycpu)->env.aregs[regid - UC_M68K_REG_A0] = *(uint32_t *)value; else if (regid >= UC_M68K_REG_D0 && regid <= UC_M68K_REG_D7) M68K_CPU(uc, mycpu)->env.dregs[regid - UC_M68K_REG_D0] = *(uint32_t *)value; else { switch(regid) { default: break; case UC_M68K_REG_PC: M68K_CPU(uc, mycpu)->env.pc = *(uint32_t *)value; // force to quit execution and flush TB uc->quit_request = true; uc_emu_stop(uc); break; } } } return 0; }
/* CPUClass::reset() */ static void m68k_cpu_reset(CPUState *s) { M68kCPU *cpu = M68K_CPU(s); M68kCPUClass *mcc = M68K_CPU_GET_CLASS(cpu); CPUM68KState *env = &cpu->env; floatx80 nan = floatx80_default_nan(NULL); int i; mcc->parent_reset(s); memset(env, 0, offsetof(CPUM68KState, end_reset_fields)); #ifdef CONFIG_SOFTMMU cpu_m68k_set_sr(env, SR_S | SR_I); #else cpu_m68k_set_sr(env, 0); #endif for (i = 0; i < 8; i++) { env->fregs[i].d = nan; } cpu_m68k_set_fpcr(env, 0); env->fpsr = 0; /* TODO: We should set PC from the interrupt vector. */ env->pc = 0; }
void m68k_cpu_do_interrupt(CPUState *cs) { M68kCPU *cpu = M68K_CPU(cs); CPUM68KState *env = &cpu->env; env->exception_index = -1; }
static void m5206_cpu_initfn(Object *obj) { M68kCPU *cpu = M68K_CPU(obj); CPUM68KState *env = &cpu->env; m68k_set_feature(env, M68K_FEATURE_CF_ISA_A); }
void m68k_cpu_do_interrupt(CPUState *cs) { M68kCPU *cpu = M68K_CPU(cs); CPUM68KState *env = &cpu->env; do_interrupt_all(env, 0); }
static void m68k_cpu_initfn(Object *obj) { CPUState *cs = CPU(obj); M68kCPU *cpu = M68K_CPU(obj); CPUM68KState *env = &cpu->env; cs->env_ptr = env; }
static void m68040_cpu_initfn(Object *obj) { M68kCPU *cpu = M68K_CPU(obj); CPUM68KState *env = &cpu->env; m68020_cpu_initfn(obj); m68k_set_feature(env, M68K_FEATURE_M68040); }
static void m68k_cpu_disas_set_info(CPUState *s, disassemble_info *info) { M68kCPU *cpu = M68K_CPU(s); CPUM68KState *env = &cpu->env; info->print_insn = print_insn_m68k; if (m68k_feature(env, M68K_FEATURE_M68000)) { info->mach = bfd_mach_m68040; } }
static void m68000_cpu_initfn(Object *obj) { M68kCPU *cpu = M68K_CPU(obj); CPUM68KState *env = &cpu->env; m68k_set_feature(env, M68K_FEATURE_M68000); m68k_set_feature(env, M68K_FEATURE_USP); m68k_set_feature(env, M68K_FEATURE_WORD_INDEX); m68k_set_feature(env, M68K_FEATURE_MOVEP); }
static void m5208_cpu_initfn(Object *obj) { M68kCPU *cpu = M68K_CPU(obj); CPUM68KState *env = &cpu->env; m68k_set_feature(env, M68K_FEATURE_CF_ISA_A); m68k_set_feature(env, M68K_FEATURE_CF_ISA_APLUSC); m68k_set_feature(env, M68K_FEATURE_BRAL); m68k_set_feature(env, M68K_FEATURE_CF_EMAC); m68k_set_feature(env, M68K_FEATURE_USP); }
int m68k_reg_read(struct uc_struct *uc, unsigned int *regs, void **vals, int count) { CPUState *mycpu = uc->cpu; int i; for (i = 0; i < count; i++) { unsigned int regid = regs[i]; void *value = vals[i]; if (regid >= UC_M68K_REG_A0 && regid <= UC_M68K_REG_A7) *(int32_t *)value = M68K_CPU(uc, mycpu)->env.aregs[regid - UC_M68K_REG_A0]; else if (regid >= UC_M68K_REG_D0 && regid <= UC_M68K_REG_D7) *(int32_t *)value = M68K_CPU(uc, mycpu)->env.dregs[regid - UC_M68K_REG_D0]; else { switch(regid) { default: break; case UC_M68K_REG_PC: *(int32_t *)value = M68K_CPU(uc, mycpu)->env.pc; break; } } } return 0; }
static void any_cpu_initfn(Object *obj) { M68kCPU *cpu = M68K_CPU(obj); CPUM68KState *env = &cpu->env; m68k_set_feature(env, M68K_FEATURE_CF_ISA_A); m68k_set_feature(env, M68K_FEATURE_CF_ISA_B); m68k_set_feature(env, M68K_FEATURE_CF_ISA_APLUSC); m68k_set_feature(env, M68K_FEATURE_BRAL); m68k_set_feature(env, M68K_FEATURE_CF_FPU); /* MAC and EMAC are mututally exclusive, so pick EMAC. It's mostly backwards compatible. */ m68k_set_feature(env, M68K_FEATURE_CF_EMAC); m68k_set_feature(env, M68K_FEATURE_CF_EMAC_B); m68k_set_feature(env, M68K_FEATURE_USP); m68k_set_feature(env, M68K_FEATURE_EXT_FULL); m68k_set_feature(env, M68K_FEATURE_WORD_INDEX); }
/* CPUClass::reset() */ static void m68k_cpu_reset(CPUState *s) { M68kCPU *cpu = M68K_CPU(s); M68kCPUClass *mcc = M68K_CPU_GET_CLASS(cpu); CPUM68KState *env = &cpu->env; mcc->parent_reset(s); memset(env, 0, offsetof(CPUM68KState, features)); #if !defined(CONFIG_USER_ONLY) env->sr = 0x2700; #endif m68k_switch_sp(env); /* ??? FP regs should be initialized to NaN. */ env->cc_op = CC_OP_FLAGS; /* TODO: We should set PC from the interrupt vector. */ env->pc = 0; tlb_flush(s, 1); }
static void m68060_cpu_initfn(Object *obj) { M68kCPU *cpu = M68K_CPU(obj); CPUM68KState *env = &cpu->env; m68k_set_feature(env, M68K_FEATURE_M68000); m68k_set_feature(env, M68K_FEATURE_USP); m68k_set_feature(env, M68K_FEATURE_WORD_INDEX); m68k_set_feature(env, M68K_FEATURE_BRAL); m68k_set_feature(env, M68K_FEATURE_BCCL); m68k_set_feature(env, M68K_FEATURE_BITFIELD); m68k_set_feature(env, M68K_FEATURE_EXT_FULL); m68k_set_feature(env, M68K_FEATURE_SCALED_INDEX); m68k_set_feature(env, M68K_FEATURE_LONG_MULDIV); m68k_set_feature(env, M68K_FEATURE_FPU); m68k_set_feature(env, M68K_FEATURE_CAS); m68k_set_feature(env, M68K_FEATURE_BKPT); m68k_set_feature(env, M68K_FEATURE_RTD); m68k_set_feature(env, M68K_FEATURE_CHK2); }
static void m68k_cpu_realizefn(DeviceState *dev, Error **errp) { CPUState *cs = CPU(dev); M68kCPU *cpu = M68K_CPU(dev); M68kCPUClass *mcc = M68K_CPU_GET_CLASS(dev); Error *local_err = NULL; register_m68k_insns(&cpu->env); cpu_exec_realizefn(cs, &local_err); if (local_err != NULL) { error_propagate(errp, local_err); return; } m68k_cpu_init_gdb(cpu); cpu_reset(cs); qemu_init_vcpu(cs); mcc->parent_realize(dev, errp); }
/* CPUClass::reset() */ static void m68k_cpu_reset(CPUState *s) { M68kCPU *cpu = M68K_CPU(s); M68kCPUClass *mcc = M68K_CPU_GET_CLASS(cpu); CPUM68KState *env = &cpu->env; if (qemu_loglevel_mask(CPU_LOG_RESET)) { qemu_log("CPU Reset (CPU %d)\n", s->cpu_index); log_cpu_state(env, 0); } mcc->parent_reset(s); memset(env, 0, offsetof(CPUM68KState, breakpoints)); #if !defined(CONFIG_USER_ONLY) env->sr = 0x2700; #endif m68k_switch_sp(env); /* ??? FP regs should be initialized to NaN. */ env->cc_op = CC_OP_FLAGS; /* TODO: We should set PC from the interrupt vector. */ env->pc = 0; tlb_flush(env, 1); }
static void m68k_cpu_set_pc(CPUState *cs, vaddr value) { M68kCPU *cpu = M68K_CPU(cs); cpu->env.pc = value; }