.dev = { .platform_data = &pmem_gpu1_pdata }, }; static struct platform_device pmem_adsp_device = { .name = "android_pmem", .id = 2, .dev = { .platform_data = &pmem_adsp_pdata }, }; #endif //PMEM #if defined(CONFIG_SPI_CNTRLR_0) static struct s3c_spi_pdata s3c_slv_pdata_0[] __initdata = { [0] = { /* Slave-0 */ .cs_level = CS_FLOAT, .cs_pin = S5P64XX_GPC(3), .cs_mode = S5P64XX_GPC_OUTPUT(3), .cs_set = s3c_cs_set, .cs_config = s3c_cs_config, .cs_suspend = s3c_cs_suspend, .cs_resume = s3c_cs_resume, }, }; #endif #if defined(CONFIG_SPI_CNTRLR_1) static struct s3c_spi_pdata s3c_slv_pdata_1[] __initdata = { [0] = { /* Slave-0 */ .cs_level = CS_FLOAT, .cs_pin = S5P64XX_GPC(7), .cs_mode = S5P64XX_GPC_OUTPUT(7),
}, { .base = S5P64XX_GPB_BASE, .config = &gpio_4bit_cfg_eint0111, .config_slp = &gpio_cfg_slp, .chip = { .base = S5P64XX_GPB(0), .ngpio = S5P64XX_GPIO_B_NR, .to_irq = s3c_gpb_to_irq, .label = "GPB", }, }, { .base = S5P64XX_GPC_BASE, .config = &gpio_4bit_cfg_eint0111, .config_slp = &gpio_cfg_slp, .chip = { .base = S5P64XX_GPC(0), .ngpio = S5P64XX_GPIO_C_NR, .to_irq = s3c_gpc_to_irq, .label = "GPC", }, }, { .base = S5P64XX_GPG_BASE, .config = &gpio_4bit_cfg_eint0111, .config_slp = &gpio_cfg_slp, .chip = { .base = S5P64XX_GPG(0), .ngpio = S5P64XX_GPIO_G_NR, .to_irq = s3c_gpg_to_irq, .label = "GPG", }, },