extern "C" int LLVMFuzzerTestOneInput(const uint8_t *Data, size_t Size) {
if (Size < 14) return 0;
uint64_t x = 0;
uint32_t y = 0;
uint32_t z = 0;
memcpy(&x, Data, sizeof(x));
memcpy(&y, Data + Size / 2, sizeof(y));
memcpy(&z, Data + Size - sizeof(z), sizeof(z));
x = __builtin_bswap64(x);
y = __builtin_bswap32(y);
z = __builtin_bswap32(z);
const bool k32bit = sizeof(void*) == 4;
if ((k32bit || x == 0x46555A5A5A5A5546ULL) &&
z == 0x4F4B &&
y == 0x66757A7A &&
true
) {
if (Data[Size - 5] == 'z') {
fprintf(stderr, "BINGO; Found the target\n");
exit(1);
}
}
return 0;
}
const char* decideFat(int fd, bool swapEndian)
{
uint32_t nArchs;
struct fat_arch* archs;
size_t bytes;
const char* rv = "32";
if (read(fd, &nArchs, 4) != 4)
return "64";
if (swapEndian)
nArchs = __builtin_bswap32(nArchs);
bytes = nArchs*sizeof(struct fat_arch);
archs = (struct fat_arch*) malloc(bytes);
if (read(fd, archs, bytes) != bytes)
return "64";
for (uint32_t i = 0; i < nArchs; i++)
{
uint32_t cputype = archs[i].cputype;
if (swapEndian)
cputype = __builtin_bswap32(cputype);
if (cputype & 0x01000000) // 64-bit
rv = "64";
}
free(archs);
return rv;
}
void Screen::scroll_impl() {
for(int ly=0;ly<240-8;ly++) {
for(int lx=0;lx<400;lx++) {
toplfb[CALCXY(lx,ly)]=toplfb[CALCXY(lx,ly+8)];
}
}
for(int ly=0;ly<8;ly++) {
for(int lx=0;lx<40;lx++) {
toplfb[CALCXY(lx,ly+240-8)]=__builtin_bswap32(static_cast<uint32_t>(bg));
}
for(int lx=40;lx<360;lx++) {
toplfb[CALCXY(lx,ly+240-8)]=bottomlfb[CALCXY(lx-40,ly)];
}
for(int lx=360;lx<400;lx++) {
toplfb[CALCXY(lx,ly+240-8)]=__builtin_bswap32(static_cast<uint32_t>(bg));
}
}
for(int ly=0;ly<240-8;ly++) {
for(int lx=0;lx<320;lx++) {
bottomlfb[CALCXY(lx,ly)]=bottomlfb[CALCXY(lx,ly+8)];
}
}
for(int ly=240-8;ly<240;ly++) {
for(int lx=0;lx<320;lx++) {
bottomlfb[CALCXY(lx,ly)]=__builtin_bswap32(static_cast<uint32_t>(bg));
}
}
y--;
}
static int GDB_ParseCommonThreadInfo(char *out, GDBContext *ctx, int sig)
{
u32 threadId = ctx->currentThreadId;
ThreadContext regs;
s64 dummy;
u32 core;
Result r = svcGetDebugThreadContext(®s, ctx->debug, threadId, THREADCONTEXT_CONTROL_ALL);
int n = sprintf(out, "T%02xthread:%x;", sig, threadId);
if(R_FAILED(r))
return n;
r = svcGetDebugThreadParam(&dummy, &core, ctx->debug, ctx->currentThreadId, DBGTHREAD_PARAMETER_CPU_CREATOR); // Creator = "first ran, and running the thread"
if(R_SUCCEEDED(r))
n += sprintf(out + n, "core:%x;", core);
for(u32 i = 0; i <= 12; i++)
n += sprintf(out + n, "%x:%08x;", i, __builtin_bswap32(regs.cpu_registers.r[i]));
n += sprintf(out + n, "d:%08x;e:%08x;f:%08x;19:%08x;",
__builtin_bswap32(regs.cpu_registers.sp), __builtin_bswap32(regs.cpu_registers.lr), __builtin_bswap32(regs.cpu_registers.pc),
__builtin_bswap32(regs.cpu_registers.cpsr));
for(u32 i = 0; i < 16; i++)
{
u64 val;
memcpy(&val, ®s.fpu_registers.d[i], 8);
n += sprintf(out + n, "%x:%016llx;", 26 + i, __builtin_bswap64(val));
}
n += sprintf(out + n, "2a:%08x;2b:%08x;", __builtin_bswap32(regs.fpu_registers.fpscr), __builtin_bswap32(regs.fpu_registers.fpexc));
return n;
}
// Get response from the SD card
// input:
// resp_type - response type (SD_Rxx values)
// pResp - pointer to the array for response (1..4 32-bit values)
// return:
// for R1 or R1b responses:
// SDR_Success if no error or SDR_XXX in case of some error bits set
// pResp contains a card status value
// for R2 response:
// result always is SDR_Success
// pResp contains a 128-bit CSD or CID register value
// for R3 response:
// SDR_Success if no error or SDR_BadResponse in case of bad OCR register header
// pResp contains a 32-bit OCR register value
// for R6 response:
// SDR_Success if no error or SDR_BadResponse in case of bad RCA response
// pResp contains a 32-bit RCA value
// for R7 response:
// SDR_Success if no error or SDR_BadResponse in case of bad R7 response header
// pResp contains a 32-bit value of R7 response
SDResult SD_Response(uint16_t resp_type, uint32_t *pResp) {
SDResult result = SDR_Success;
// Get first 32-bit value, it similar for all types of response except R2
*pResp = SDIO->RESP1;
switch (resp_type) {
case SD_R1:
case SD_R1b:
// RESP1 contains card status information
// Check for error bits in card status
result = SD_GetError(*pResp);
break;
case SD_R2:
// RESP1..4 registers contain the CID/CSD register value
#ifdef __GNUC__
// Use GCC built-in intrinsics (fastest, less code) (GCC v4.3 or later)
*pResp++ = __builtin_bswap32(SDIO->RESP1);
*pResp++ = __builtin_bswap32(SDIO->RESP2);
*pResp++ = __builtin_bswap32(SDIO->RESP3);
*pResp = __builtin_bswap32(SDIO->RESP4);
#else
// Use ARM 'REV' instruction (fast, a bit bigger code than GCC intrinsics)
*pResp++ = __REV(SDIO->RESP1);
*pResp++ = __REV(SDIO->RESP2);
*pResp++ = __REV(SDIO->RESP3);
*pResp = __REV(SDIO->RESP4);
// Use SHIFT, AND and OR (slower, biggest code)
// *pResp++ = SWAP_UINT32(SDIO->RESP1);
// *pResp++ = SWAP_UINT32(SDIO->RESP2);
// *pResp++ = SWAP_UINT32(SDIO->RESP3);
// *pResp = SWAP_UINT32(SDIO->RESP4);
#endif
break;
case SD_R3:
// RESP1 contains the OCR register value
// Check for correct OCR header
if (SDIO->RESPCMD != 0x3f) result = SDR_BadResponse;
break;
case SD_R6:
// RESP1 contains the RCA response value
// Only CMD3 generates R6 response, so RESPCMD must be 0x03
if (SDIO->RESPCMD != 0x03) result = SDR_BadResponse;
break;
case SD_R7:
// RESP1 contains 'Voltage accepted' and echo-back of check pattern
// Only CMD8 generates R7 response, so RESPCMD must be 0x08
if (SDIO->RESPCMD != 0x08) result = SDR_BadResponse;
break;
default:
// Unknown response
result = SDR_BadResponse;
break;
}
return result;
}
void xenon_sound_init(void)
{
// reset DAC (init from scratch)
xenon_gpio_control(5,0x1000,0x1000);
xenon_gpio_control(0,0x1000,0x1000);
xenon_gpio_control(4,0x1000,0x1000);
if(xenos_is_hdmi){
// HDMI audio enable
xenon_smc_i2c_write(0x0214, 0x11);
xenon_smc_i2c_write(0x0202, 0x03);
xenon_smc_i2c_write(0x0203, 0x00);
xenon_smc_i2c_write(0x0204, 0x18);
xenon_smc_i2c_write(0x0205, 0x00);
xenon_smc_i2c_write(0x021d, 0x40);
xenon_smc_i2c_write(0x0221, 0x02);
xenon_smc_i2c_write(0x0222, 0x2b);
xenon_smc_i2c_write(0x022f,0x01);
xenon_smc_i2c_write(0x023e,0x3f);
xenon_smc_i2c_write(0x02df,0x10);// Av mute ?
}
static unsigned char smc_snd[32] = {0x8d, 1, 1};
xenon_smc_send_message(smc_snd);
uint32_t *descr = memalign(256, 0x20 * 8);
int descr_base = ((int)descr) & 0x1FFFFFFF;
buffer_len = 64*1024;
buffer = memalign(256, buffer_len);
memset(buffer, 0, buffer_len);
memdcbst(buffer, buffer_len);
int buffer_base = ((int)buffer) & 0x1fffffff;
int i;
for (i = 0; i < 0x20; ++i)
{
descr[i * 2] = __builtin_bswap32(buffer_base + (buffer_len/0x20) * i);
descr[i * 2 + 1] = __builtin_bswap32(0x80000000 | (buffer_len/0x20));
}
memdcbst(descr, 0x20 * 2 * 4);
write32(snd_base + 8, 0);
write32(snd_base + 8, 0x2000000);
write32(snd_base + 0, descr_base);
write32(snd_base + 8, 0x1d08001c);
write32(snd_base + 0xC, 0x1c);
// write32(snd_base + 8, read32(snd_base) | 0x1000000);
wptr = 0;
}
static void aes_setiv(const void *iv)
{
uint32_t *in = (uint32_t *)iv;
putreg32(__builtin_bswap32(*in), STM32_AES_IVR3);
in++;
putreg32(__builtin_bswap32(*in), STM32_AES_IVR2);
in++;
putreg32(__builtin_bswap32(*in), STM32_AES_IVR1);
in++;
putreg32(__builtin_bswap32(*in), STM32_AES_IVR0);
}
int main (void)
{
uint32_t a = 4;
uint32_t b;
b = __builtin_bswap32 (a);
a = __builtin_bswap32 (b);
if (b == 4 || a != 4)
abort ();
return 0;
}
int sfcx_DMAread_block(unsigned char *data, unsigned char *meta, int raw, unsigned long rawlength, unsigned long length)
{
int status;
sfcx_writereg(SFCX_STATUS, sfcx_readreg(SFCX_STATUS));
sfcx_writereg(SFCX_CONFIG, (sfcx_readreg(SFCX_CONFIG)|CONFIG_DMA_LEN));
// Set flash address (logical)
//address &= 0x3fffe00; // Align to page
sfcx_writereg(SFCX_ADDRESS, 0);
// Set the target address for data
sfcx_writereg(SFCX_DPHYSADDR,data-BASE_ADDRESS);
// Set the target address for meta
sfcx_writereg(SFCX_MPHYSADDR,meta-BASE_ADDRESS);
// Command the read
// Either a logical read (0x200 bytes, no meta data)
// or a Physical read (0x210 bytes with meta data)
sfcx_writereg(SFCX_COMMAND, raw ? DMA_PHY_TO_RAM : DMA_LOG_TO_RAM);
// Wait Busy
while ((status = sfcx_readreg(SFCX_STATUS)) & STATUS_BUSY);
if (!SFCX_SUCCESS(status))
{
if (status & STATUS_BB_ER)
printf(" ! SFCX: Bad block found at %08X\n");
else if (status & STATUS_ECC_ER)
// printf(" ! SFCX: (Corrected) ECC error at address %08X: %08X\n", address, status);
status = status;
else if (!raw && (status & STATUS_ILL_LOG))
printf(" ! SFCX: Illegal logical block at %08X (status: %08X)\n", status);
else
printf(" ! SFCX: Unknown error at address %08X: %08X. Please worry.\n", status);
}
// Set internal page buffer pointer to 0
sfcx_writereg(SFCX_ADDRESS, 0);
int i;
//int page_sz = raw ? sfc.page_sz_phys : sfc.page_sz;
for (i = 0; i < length; i += 4)
{
// Byteswap the data
*(int*)(&data[i]) = __builtin_bswap32(read32(&data[i]));
}
for (i = 0; i < (rawlength - length); i += 4) // sfc.block_sz_phys - sfc.block_sz == META SIZE
{
// Byteswap the data
*(int*)(&meta[i]) = __builtin_bswap32(read32(&meta[i]));
}
return status;
}
static void aes_setkey(const void *key, size_t key_len)
{
uint32_t *in = (uint32_t *)key;
(void)key_len;
putreg32(__builtin_bswap32(*in), STM32_AES_KEYR3);
in++;
putreg32(__builtin_bswap32(*in), STM32_AES_KEYR2);
in++;
putreg32(__builtin_bswap32(*in), STM32_AES_KEYR1);
in++;
putreg32(__builtin_bswap32(*in), STM32_AES_KEYR0);
}
int
xenon_atapi_init() {
//preinit (start from scratch)
*(volatile uint32_t*)0xd0108060 = __builtin_bswap32(0x112400);
*(volatile uint32_t*)0xd0108080 = __builtin_bswap32(0x407231BE);
*(volatile uint32_t*)0xea001218 &= __builtin_bswap32(0xFFFFFFF0);
mdelay(200);
struct xenon_ata_device *dev = &atapi;
memset(dev, 0, sizeof (struct xenon_ata_device));
int err = xenon_ata_init1(dev, 0xea001200, 0xea001220);
if (!err)
atapi_ready = 1;
return err;
}
static inline void
vfoo32 (unsigned int* a)
{
int i = 0;
for (i = 0; i < N; ++i)
a[i] = __builtin_bswap32 (a[i]);
}
int
main (void)
{
unsigned int arr[N];
unsigned int expect[N];
int i;
check_vect ();
for (i = 0; i < N; ++i)
{
arr[i] = i;
expect[i] = __builtin_bswap32 (i);
if (y) /* Avoid vectorisation. */
abort ();
}
vfoo32 (arr);
for (i = 0; i < N; ++i)
{
if (arr[i] != expect[i])
abort ();
}
return 0;
}
static uint32_t fourcc_to_uint(char* str)
{
uint32_t out;
assert(strlen(str) == 4);
out = __builtin_bswap32(*(uint32_t*)str);
return out;
}
static uint32_t priority(const DMAChannel &c)
{
uint32_t n;
n = *(uint32_t *)((uint32_t)&DMA_DCHPRI3 + (c.channel & 0xFC));
n = __builtin_bswap32(n);
return (n >> ((c.channel & 0x03) << 3)) & 0x0F;
}
void check_shader(const void *shader_, u32 shader_size, const void *org_, u32 org_size, const char *name)
{
u32 *shader = (u32 *)shader_;
u32 *org = (u32 *)org_;
bool different = false;
printf("%-20s : ", name);
if (shader_size != org_size)
{
different = true;
printf("\nsize mismatch : 0x%08X should be 0x%08X", shader_size, org_size);
}
for (int i = 0; i < shader_size / 4; i++)
{
if (shader[i] != org[i])
{
different = true;
printf("\n%i(%X): 0x%08X(0x%08X) should be 0x%08X(0x%08X)", i, i, shader[i], __builtin_bswap32(shader[i]), org[i],
__builtin_bswap32(org[i]));
}
}
if (!different)
printf("no errors");
printf("\n");
}
static void ufi_read12(usb_dev_t *udev, uint32_t lba, uint32_t count)
{
int err;
struct ufi_cdb cdb;
struct xact data;
memset(&cdb, 0, sizeof(struct ufi_cdb));
cdb.opcode = READ_12;
cdb.lba = __builtin_bswap32(lba);
cdb.length = __builtin_bswap16(count);
data.type = PID_IN;
data.len = UFI_BLK_SIZE * count;
err = usb_alloc_xact(udev->dman, &data, 1);
if (err) {
ZF_LOGF("Out of DMA memory\n");
}
err = usb_storage_xfer(udev, &cdb, sizeof(struct ufi_cdb),
&data, 1, UFI_INPUT);
if (err) {
ZF_LOGF("Transfer error\n");
}
usb_destroy_xact(udev->dman, &data, 1);
}
int sai_deserialize_ip4_mask(
_In_ const char *buffer,
_Out_ sai_ip4_t *mask)
{
uint32_t value;
int res = sai_deserialize_uint32(buffer, &value);
if (res < 0 || value > 32)
{
SAI_META_LOG_WARN("failed to deserialize '%.*s' as ip4 mask", MAX_CHARS_PRINT, buffer);
return SAI_SERIALIZE_ERROR;
}
if (value == 0)
{
}
else if (value == 32)
{
value = 0xFFFFFFFF;
}
else
{
value = 0xFFFFFFFF << (32 - value);
}
*mask = __builtin_bswap32(value);
return res;
}
static Result action_install_cdn_open_dst(void* data, u32 index, void* initialReadBlock, u32* handle) {
install_cdn_data* installData = (install_cdn_data*) data;
if(index == 0) {
static u32 dataOffsets[6] = {0x240, 0x140, 0x80, 0x240, 0x140, 0x80};
u8* tmd = (u8*) initialReadBlock;
u8 sigType = tmd[0x03];
installData->contentCount = __builtin_bswap16(*(u16*) &tmd[dataOffsets[sigType] + 0x9E]);
if(installData->contentCount > CONTENTS_MAX) {
return MAKERESULT(RL_PERMANENT, RS_INVALIDARG, RM_APPLICATION, RD_OUT_OF_RANGE);
}
for(u32 i = 0; i < installData->contentCount; i++) {
u8* contentChunk = &tmd[dataOffsets[sigType] + 0x9C4 + (i * 0x30)];
installData->contentIds[i] = __builtin_bswap32(*(u32*) &contentChunk[0x00]);
installData->contentIndices[i] = __builtin_bswap16(*(u16*) &contentChunk[0x04]);
}
installData->installInfo.total += installData->contentCount;
return AM_InstallTmdBegin(handle);
} else {
return AM_InstallContentBegin(handle, installData->contentIndices[index - 1]);
}
}
uint32_t generic_crc32(target *t, uint32_t base, int len)
{
uint32_t data;
uint32_t crc;
size_t i;
CRC_CR |= CRC_CR_RESET;
while (len > 3) {
data = target_mem_read32(t, base);
CRC_DR = __builtin_bswap32(data);
base += 4;
len -= 4;
}
crc = CRC_DR;
while (len--) {
data = target_mem_read8(t, base++);
crc ^= data << 24;
for (i = 0; i < 8; i++) {
if (crc & 0x80000000)
crc = (crc << 1) ^ 0x4C11DB7;
else
crc <<= 1;
}
}
return crc;
}
size_t tmdPreloadChunk(tmd_data *data, wchar_t *path, uint_fast16_t content_index) { //loads tmd chunk records and returns total chunks size of content index type on success
FIL fil;
size_t offset, size = 0;
uint_fast16_t content_count, chunk_count;
uint8_t hash[SHA_256_SIZE];
if (FileOpen(&fil, path, 0) && (offset = tmdHeaderOffset(data->sig_type))) {
size = (content_count = __builtin_bswap16(data->header.content_count)) * sizeof(tmd_content_chunk);
if (!data->content_chunk)
data->content_chunk = __builtin_alloca(size);
if (FileSeek(&fil, offset + sizeof(data->header) + sizeof(data->content_info)) && FileRead2(&fil, data->content_chunk, size) == size) {
size = 0;
for (uint_fast16_t info_index = 0, chunk_index = 0; chunk_index < content_count; info_index++) {
chunk_count = __builtin_bswap16(data->content_info[info_index].content_command_count);
sha(hash, &data->content_chunk[chunk_index], chunk_count * sizeof(tmd_content_chunk), SHA_256_MODE);
if (memcmp(hash, data->content_info[chunk_index].content_chunk_hash, sizeof(hash))) {
size = 0;
break;
}
for (; chunk_count > 0; chunk_index++, chunk_count--) {
if (content_index == CONTENT_INDEX_ALL || content_index == data->content_chunk[chunk_index].content_index)
size += __builtin_bswap32(data->content_chunk[chunk_index].content_size_lo);
}
}
} else size = 0;
FileClose(&fil);
}
return size;
}
void SubmitContext::submitBlock(blktemplate_t *blockTemplate,
const PrimecoinBlockHeader &header,
unsigned dataId)
{
json_t *jsonBlock =
blkmk_submit_jansson(blockTemplate,
(unsigned char*)&header,
dataId,
__builtin_bswap32(header.nonce),
header.multiplier,
header.multiplier[0]+1);
char *request = json_dumps(jsonBlock, JSON_INDENT(2));
json_delete(jsonBlock);
_response.clear();
logFormattedWrite(_log, "submit request: %s", request);
curl_easy_setopt(curl, CURLOPT_POSTFIELDS, request);
if (curl_easy_perform(curl) != CURLE_OK) {
logFormattedWrite(_log, "block send error!!!");
} else {
logFormattedWrite(_log, "response: %s");
}
free(request);
}
uint32_t foo32 (uint32_t a)
{
uint32_t b;
b = __builtin_bswap32 (a);
return b;
}
crypt_t * chacha_new_ctx(
unsigned char const * key,
size_t keylen,
unsigned char const * nonce,
size_t noncelen,
uint32_t counter,
int rounds,
int flags)
{
chacha_ctx_t * ctx = malloc(sizeof(chacha_ctx_t));
memset(ctx, 0, sizeof(chacha_ctx_t));
ctx->rounds = rounds;
ctx->matrix.u32[0] = 0x61707865;
ctx->matrix.u32[1] = 0x3320646e;
ctx->matrix.u32[2] = 0x79622d32;
ctx->matrix.u32[3] = 0x6b206574;
/* The key is copied in little endian, so on Big E systems the key words
* need to be swapped. */
memcpy(&ctx->matrix.u32[4], key, 32 < keylen ? 32 : keylen);
#ifdef _BIG_ENDIAN
for (int i = 4; i < 12; ++i) {
ctx->matrix.u32[i] = __builtin_bswap32(ctx->matrix.u32[i]);
}
#endif
/* RFC7539 specifies a 32-bit counter and 96-bit nonce. */
ctx->matrix.u32[12] = counter;
memcpy(&ctx->matrix.u32[13], nonce, 12 < noncelen ? 12 : noncelen);
#ifdef _BIG_ENDIAN
for (int i = 13; i < 16; ++i) {
ctx->matrix.u32[i] = __builtin_bswap32(ctx->matrix.u32[i]);
}
#endif
/* Generate the first block */
ChaChaCore(ctx, ctx->rounds);
ctx->h.encrypt = (encrypt_t)chacha_crypt;
ctx->h.decrypt = (decrypt_t)chacha_crypt;
ctx->h.free = free;
return (crypt_t*)ctx;
}
void Screen::putChar(char c) {
while(*flags&2); //to prevent garbage to be displayed when ARM9&ARM11 are trying to access it at the same time
*flags|=2;
switch(c) {
case '\n':
x=0; y++;
break;
case '\r':
x=0;
break;
case '\b':
x--;
if(x<0) x=0;
putChar(' ');
x--;
if(x<0) x=0;
break;
case '\0':
break;
default:
for(int lx=0;lx<8;lx++) {
for(int ly=0;ly<8;ly++) {
if(font[(int)((uint8_t)c)][ly]&(1<<lx)) {
if(y>=TOP_SCREEN_HEIGHT)
bottomlfb[CALCXY(x*8+lx,(y-TOP_SCREEN_HEIGHT)*8+ly)]=__builtin_bswap32(static_cast<uint32_t>(fg));
else
toplfb[CALCXY(x*8+lx,(y)*8+ly)]=__builtin_bswap32(static_cast<uint32_t>(fg));
} else {
if(y>=TOP_SCREEN_HEIGHT)
bottomlfb[CALCXY(x*8+lx,(y-TOP_SCREEN_HEIGHT)*8+ly)]=__builtin_bswap32(static_cast<uint32_t>(bg));
else
toplfb[CALCXY(x*8+lx,(y)*8+ly)]=__builtin_bswap32(static_cast<uint32_t>(bg));
}
}
}
x++;
if(x==(y>=TOP_SCREEN_HEIGHT?BOTTOM_SCREEN_WIDTH:TOP_SCREEN_WIDTH)) {
x=0;
y++;
}
break;
}
if(y>=TOP_SCREEN_HEIGHT+BOTTOM_SCREEN_HEIGHT)
scroll_impl();
*flags&=~2; //Unlock
}
// Check R2 response
// input:
// pBuf - pointer to the data buffer to store the R2 response
// return: SDResult value
static SDResult SD_GetR2Resp(uint32_t *pBuf) {
volatile uint32_t wait = SD_CMD_TIMEOUT;
// Wait for response, error or timeout
while (!(SDMMC1->STA & (SDMMC_STA_CCRCFAIL | SDMMC_STA_CMDREND | SDMMC_STA_CTIMEOUT)) && --wait);
// Timeout?
if ((SDMMC1->STA & SDMMC_STA_CTIMEOUT) && (wait == 0)) {
SDMMC1->ICR = SDMMC_ICR_CTIMEOUTC;
return SDR_Timeout;
}
// CRC fail?
if (SDMMC1->STA & SDMMC_STA_CCRCFAIL) {
SDMMC1->ICR = SDMMC_ICR_CCRCFAILC;
return SDR_CRCError;
}
// Clear the static SDIO flags
SDMMC1->ICR = SDIO_ICR_STATIC;
// SDMMC_RESP[1..4] registers contains the R2 response
#ifdef __GNUC__
// Use GCC built-in intrinsics (fastest, less code) (GCC v4.3 or later)
*pBuf++ = __builtin_bswap32(SDMMC1->RESP1);
*pBuf++ = __builtin_bswap32(SDMMC1->RESP2);
*pBuf++ = __builtin_bswap32(SDMMC1->RESP3);
*pBuf = __builtin_bswap32(SDMMC1->RESP4);
#else
// Use ARM 'REV' instruction (fast, a bit bigger code than GCC intrinsics)
*pBuf++ = __REV(SDMMC1->RESP1);
*pBuf++ = __REV(SDMMC1->RESP2);
*pBuf++ = __REV(SDMMC1->RESP3);
*pBuf = __REV(SDMMC1->RESP4);
/*
// Use SHIFT, AND and OR (slower, biggest code)
*pBuf++ = SWAP_UINT32(SDMMC1->RESP1);
*pBuf++ = SWAP_UINT32(SDMMC1->RESP2);
*pBuf++ = SWAP_UINT32(SDMMC1->RESP3);
*pBuf = SWAP_UINT32(SDMMC1->RESP4);
*/
#endif
return SDR_Success;
}
static int
xenon_ata_identify(struct xenon_ata_device *dev) {
char info[XENON_DISK_SECTOR_SIZE];
uint16_t *info16 = (uint16_t *) info;
xenon_ata_wait_busy(dev);
xenon_ata_regset(dev, XENON_ATA_REG_DISK, 0xE0);
xenon_ata_regset(dev, XENON_ATA_REG_CMD, XENON_ATA_CMD_IDENTIFY_DEVICE);
xenon_ata_wait_ready(dev);
int val = xenon_ata_pio_read(dev, info, XENON_DISK_SECTOR_SIZE);
if (val & 4)
return xenon_atapi_inquiry_model(dev);
else if (val)
return -1;
/* Now it is certain that this is not an ATAPI device. */
dev->atapi = 0;
/* CHS is always supported. */
dev->addressing_mode = XENON_ATA_CHS;
/* Check if LBA is supported. */
if (bswap_16(info16[49]) & (1 << 9)) {
/* Check if LBA48 is supported. */
if (bswap_16(info16[83]) & (1 << 10))
dev->addressing_mode = XENON_ATA_LBA48;
else
dev->addressing_mode = XENON_ATA_LBA;
}
/* Determine the amount of sectors. */
if (dev->addressing_mode != XENON_ATA_LBA48)
dev->size = __builtin_bswap32(*((uint32_t *) & info16[60]));
else
dev->size = __builtin_bswap32(*((uint32_t *) & info16[100]));
/* Read CHS information. */
dev->cylinders = bswap_16(info16[1]);
dev->heads = bswap_16(info16[3]);
dev->sectors_per_track = bswap_16(info16[6]);
xenon_ata_dumpinfo(dev, info);
return 0;
}
inline unsigned
cpu_to_be_32(unsigned val)
{
if (is_big_endian()) {
return val;
} else {
return __builtin_bswap32(val);
}
}
inline uint32 b2i(const byte *b) // Big endian bytes to integer.
{
#if defined(_MSC_VER)/* && defined(LITTLE_ENDIAN)*/
return _byteswap_ulong(*(uint32 *)b);
#else
// return uint32(b[0]<<24) | uint32(b[1]<<16) | uint32(b[2]<<8) | b[3];
return __builtin_bswap32(*(uint32 *)b);
#endif
}
template <> constexpr inline uint32_t bswap<uint32_t>(uint32_t x) noexcept
{
#if defined(HAVE___BUILTIN_BSWAP32)
return __builtin_bswap32(x);
#else
/// @todo create a fallback.
static_assert(false, "Generic bswap32() not yet implemented.");
#endif
}