Esempio n. 1
0
/*******************************************************************************
*
* copy_code - copy u-boot image from flash to RAM
*
* This routine is needed to solve flash problems on this board
*
*/
void copy_code (ulong dest_addr)
{
	extern long uboot_end_data;
	unsigned long start;
	unsigned long end;

	/* load copydwords into ram
	 */
	programLoad();

	/* copy u-boot code
	 */
	copyLongs((ulong *)CFG_MONITOR_BASE,
		  (ulong *)dest_addr,
		  ((ulong)&uboot_end_data - CFG_MONITOR_BASE + 3) / 4);


	/* flush caches
	 */

	start = CKSEG0;
	end = start + CFG_DCACHE_SIZE;
	while(start < end) {
		cache_unroll(start,Index_Writeback_Inv_D);
		start += CFG_CACHELINE_SIZE;
	}

	start = CKSEG0;
	end = start + CFG_ICACHE_SIZE;
	while(start < end) {
		cache_unroll(start,Index_Invalidate_I);
		start += CFG_CACHELINE_SIZE;
	}
}
Esempio n. 2
0
int flashProg( unsigned addr, unsigned length, void const *data )
{
   int rval = -1 ;
   if( VALID_ADDR(addr) ){
      if( 0 == (addr&(FLASH_PAGE_SIZE-1)) ){
         if( 0 == (length&(FLASH_PAGE_SIZE-1)) ){
            rval = 0 ;

            while( 0 < length ){
               int const lockbit = LOCK_BIT(addr);
               int const page = FLASH_PAGE(addr);

               if( EFC0->MC_FSR & (1<<(lockbit+16)) ){
                  DEBUGMSG( "unlock seg 0x" ); DEBUGHEXCHAR( lockbit ); DEBUGMSG( " here\n" );
                  EFC0->MC_FCR = (0x5A<<24)|(page<<8)|EFC_COMMAND_CLEARLOCKBIT ;
                  while( 0 == (EFC0->MC_FSR & MC_FSR_FRDY) )
                     ;
                  if( 0 != (EFC0->MC_FSR & (MC_FSR_LOCKE|MC_FSR_PROGE)) ){
                     rval = 4 ;
                     break ;
                  }
               }
               DEBUGMSG( "program 0x" ); DEBUGHEX( addr ); DEBUGMSG( " here\r\n" );

               // fill the write buffer
               copyLongs( (unsigned long *)addr, (unsigned long *)data, FLASH_PAGE_SIZE/sizeof(unsigned long) );

               // now program
               EFC0->MC_FCR = (0x5A<<24)|(page<<8)|EFC_COMMAND_WRITEPAGE ;

               // wait for completion
               while( 0 == (EFC0->MC_FSR & MC_FSR_FRDY) )
                  ;

               if( 0 != (EFC0->MC_FSR & (MC_FSR_LOCKE|MC_FSR_PROGE)) ){
                  rval = 5 ;
                  break ;
               }

               length -= FLASH_PAGE_SIZE ;
               addr += FLASH_PAGE_SIZE ;
               data = ((char *)data) + FLASH_PAGE_SIZE ;
            }
         }
         else
            rval = 3 ;
      }
      else
         rval = 2 ;
   }
   else
      rval = 1 ;

   return rval ;
}
Esempio n. 3
0
void romStart
    (
    FAST int startType      /* start type */
    )
    {
#if (CPU_FAMILY == PPC) || (CPU_FAMILY == MIPS)

    /*
     * For PPC and MIPS, the call to vxSdaInit() must be the first operation
     * in sysStart(). This is because vxSdaInit() sets the SDA registers
     * (r2 and r13 on PPC, gp on MIPS) to the SDA base values. No C code
     * must be placed before this call.
     */

    _WRS_ASM ("");   /* code barrier to prevent compiler moving vxSdaInit() */
    vxSdaInit ();    /* this MUST be the first operation in usrInit() for PPC */
    _WRS_ASM ("");   /* code barrier to prevent compiler moving vxSdaInit() */

#endif	/* (CPU_FAMILY == PPC) || (CPU_FAMILY == MIPS) */

    /* relocate the data segment into RAM */

    copyLongs ((UINT *)ROM_DATA_ADRS, (UINT *)UNCACHED(RAM_DATA_ADRS),
        ((UINT)wrs_kernel_data_end - (UINT)RAM_DATA_ADRS) / sizeof (long));

#ifdef BSP_BOOT_CACHE_SYNC

    /* Text has been copied from flash, call BSP provided cacheTextUpdate */

    BSP_BOOT_CACHE_SYNC;
#endif /* BSP_BOOT_CACHE_SYNC */

    /* If cold booting, clear memory to avoid parity errors */

#ifdef ROMSTART_BOOT_CLEAR
    if (startType & BOOT_CLEAR)
        bootClear();
#endif

#ifdef BSP_BOOT_CACHE_SYNC_POST
    BSP_BOOT_CACHE_SYNC_POST;
#endif /* BSP_BOOT_CACHE_SYNC_POST */

    /* and jump to the entry */

#ifdef INCLUDE_UEFI_BOOT_SUPPORT
    /* For UEFI we must pass the UEFI memory map and ACPI pointer */
    usrInit (startType, pRomUefiMemAddr, pRomUefiAcpiAddr);
#else
    usrInit (startType);
#endif

    }
Esempio n. 4
0
void romStart
    (
    FAST int startType      /* start type */
    )
    {
    volatile FUNCPTR absEntry;

#if (CPU_FAMILY == PPC) || (CPU_FAMILY == MIPS)

    /*
     * For PPC and MIPS, the call to vxSdaInit() must be the first operation
     * in sysStart(). This is because vxSdaInit() sets the SDA registers
     * (r2 and r13 on PPC, gp on MIPS) to the SDA base values. No C code
     * must be placed before this call.
     */

    _WRS_ASM ("");   /* code barrier to prevent compiler moving vxSdaInit() */
    vxSdaInit ();    /* this MUST be the first operation in usrInit() for PPC */
    _WRS_ASM ("");   /* code barrier to prevent compiler moving vxSdaInit() */

#endif	/* (CPU_FAMILY == PPC) || (CPU_FAMILY == MIPS) */

    absEntry = (volatile FUNCPTR) RAM_DST_ADRS;

    /* copy the main image into RAM */

    copyLongs ((UINT *)ROM_DATA(binArrayStart),
        (UINT *)UNCACHED(RAM_DST_ADRS),
        (binArrayEnd - binArrayStart) / sizeof (long));

#ifdef BSP_BOOT_CACHE_SYNC

    /* Text has been copied from flash, call BSP provided cacheTextUpdate */

    BSP_BOOT_CACHE_SYNC;
#endif /* BSP_BOOT_CACHE_SYNC */

#if     ((CPU_FAMILY == ARM) && ARM_THUMB)
     absEntry = (FUNCPTR)((UINT32)absEntry | 1);         /* force Thumb state */
#endif  /* CPU_FAMILY == ARM */

#ifdef BSP_BOOT_CACHE_SYNC

    /* Text has been copied from flash, call BSP provided cacheTextUpdate */

    BSP_BOOT_CACHE_SYNC;
#endif /* BSP_BOOT_CACHE_SYNC */

    /* If cold booting, clear memory to avoid parity errors */

#ifdef ROMSTART_BOOT_CLEAR
    if (startType & BOOT_CLEAR)
        bootClear();
#endif

#ifdef BSP_BOOT_CACHE_SYNC_POST
    BSP_BOOT_CACHE_SYNC_POST;
#endif /* BSP_BOOT_CACHE_SYNC_POST */

#if (CPU_FAMILY == MIPS)
    /* mapped ROMs have start address in kseg2 so it needs to be modified
     * so we jump to uncached space
     */
    absEntry = (FUNCPTR)KX_TO_K0(absEntry);
#endif /* (CPU_FAMILY == MIPS) */

    /* and jump to the entry */


#ifdef INCLUDE_UEFI_BOOT_SUPPORT
    /* For UEFI we must pass the UEFI memory map and ACPI pointer */
    absEntry (startType, pRomUefiMemAddr, pRomUefiAcpiAddr);
#else
    absEntry (startType);
#endif

    }
Esempio n. 5
0
void romStart
    (
    FAST int startType      /* start type */
    )
    {
    volatile FUNCPTR absEntry;

#ifdef MODEM_L2CACHE_TEST
    /* A9 -- Modem A9 */
    writel(0xA9A9A9A9, SHM_MEM_LOADM_ADDR);
#endif

#if (CPU_FAMILY == PPC) || (CPU_FAMILY == MIPS)

    /*
     * For PPC and MIPS, the call to vxSdaInit() must be the first operation
     * in sysStart(). This is because vxSdaInit() sets the SDA registers
     * (r2 and r13 on PPC, gp on MIPS) to the SDA base values. No C code
     * must be placed before this call.
     */

    _WRS_ASM ("");   /* code barrier to prevent compiler moving vxSdaInit() */
    vxSdaInit ();    /* this MUST be the first operation in usrInit() for PPC */
    _WRS_ASM ("");   /* code barrier to prevent compiler moving vxSdaInit() */

#endif	/* (CPU_FAMILY == PPC) || (CPU_FAMILY == MIPS) */

    absEntry = (volatile FUNCPTR) RAM_DST_ADRS;

    /* relocate the data segment of the decompression stub */
#if 0
    copyLongs ((UINT *)ROM_DATA_ADRS, (UINT *)UNCACHED(RAM_DST_ADRS),
              ((UINT)binArrayStart - (UINT)DDR_MCORE_ADDR) / sizeof (long));

    copyLongs ((UINT *)((UINT)ROM_DATA_ADRS + ((UINT)BINARRAYEND_ROUNDOFF -
        (UINT)RAM_DATA_ADRS)), (UINT *)UNCACHED(BINARRAYEND_ROUNDOFF),
    ((UINT)wrs_kernel_data_end - (UINT)binArrayEnd) / sizeof (long));
#endif

#ifdef BSP_BOOT_CACHE_SYNC

    /* Text has been copied from flash, call BSP provided cacheTextUpdate */

    BSP_BOOT_CACHE_SYNC;
#endif /* BSP_BOOT_CACHE_SYNC */

    /* if cold booting, start clearing memory to avoid parity errors */

#ifdef  ROMSTART_BOOT_CLEAR
    if (startType & BOOT_CLEAR)
    /* low memory is cleared up to the stack */
    bootClear();
#endif

    /* rom_mmu_record_time(); */

    rom_mmu_enable();

#ifdef BSP_CONFIG_HI3630
    rom_mmu_l2cache_enable();
#endif

#ifdef MODEM_L2CACHE_TEST

#define MODEM_L2CACHE_TEST_BUFFER_SIZE (0x100000)

    memcpy( (void*)MCORE_TEXT_START_ADDR,
            (void*)MCORE_TEXT_START_ADDR_COMPRESSED,
            MODEM_L2CACHE_TEST_BUFFER_SIZE);

    if (memcmp( (void*)MCORE_TEXT_START_ADDR,
                (void*)MCORE_TEXT_START_ADDR_COMPRESSED,
                MODEM_L2CACHE_TEST_BUFFER_SIZE))
    {
        while (1)
            writel(0xFFFFFFFF, SHM_MEM_LOADM_ADDR);
    }
    else
    {
        while (1)
            writel(0xA5A5A5A5, SHM_MEM_LOADM_ADDR);
    }
    return; /* return to dead loop */

#else

    /* decompress the main image */
    if (UNCMP_RTN (UNCACHED(binArrayStart),
        UNCACHED(RAM_DST_ADRS),
        binArrayEnd - binArrayStart) != OK)
    return;

#endif

#ifdef BSP_CONFIG_HI3630
    rom_mmu_l2cache_disable();
#endif

    rom_mmu_disable();

    /* rom_mmu_record_time(); */

#ifdef BSP_BOOT_CACHE_SYNC

    /* Text has been copied from flash, call BSP provided cacheTextUpdate */

    BSP_BOOT_CACHE_SYNC;
#endif /* BSP_BOOT_CACHE_SYNC */

    /* if cold booting, finish clearing memory */

#ifdef  ROMSTART_BOOT_CLEAR
    if (startType & BOOT_CLEAR)
    /* clear past the stack to the top of memory */
# if (RAM_DATA_ADRS > SYS_MEM_TOP)
#error Bad size, RAM_DATA_ADRS > SYS_MEM_TOP, check LOCAL_MEM SIZE and RAM_HIGH ADRS settings
# endif	/* RAM_DATA_ADRS > SYS_MEM_TOP */
    fillLongs ((UINT *)UNCACHED(RAM_DATA_ADRS),
        ((UINT)SYS_MEM_TOP - (UINT)RAM_DATA_ADRS) / sizeof(long), 0);
#endif

#ifdef BSP_BOOT_CACHE_SYNC_POST
    BSP_BOOT_CACHE_SYNC_POST;
#endif /* BSP_BOOT_CACHE_SYNC_POST */

#if     ((CPU_FAMILY == ARM) && ARM_THUMB)
     absEntry = (FUNCPTR)((UINT32)absEntry | 1);         /* force Thumb state */
#endif  /* CPU_FAMILY == ARM */

#if (CPU_FAMILY == MIPS)
    /* mapped ROMs have start address in kseg2 so it needs to be modified
     * so we jump to unmapped space
     */
    absEntry = (FUNCPTR)KX_TO_K0(absEntry);
#endif /* (CPU_FAMILY == MIPS) */

/* and jump to the entry */

#ifdef INCLUDE_UEFI_BOOT_SUPPORT
    /* For UEFI we must pass the UEFI memory map and ACPI pointer */
    absEntry (startType, pRomUefiMemAddr, pRomUefiAcpiAddr);
#else
    absEntry (startType);
#endif

    }