static void beagle_common_init(ram_addr_t ram_size,
const char *boot_device,
const char *kernel_filename,
const char *kernel_cmdline,
const char *initrd_filename,
int cpu_model)
{
struct beagle_s *s = (struct beagle_s *) qemu_mallocz(sizeof(*s));
DriveInfo *dmtd = drive_get(IF_MTD, 0, 0);
DriveInfo *dsd = drive_get(IF_SD, 0, 0);
if (!dmtd && !dsd) {
hw_error("%s: SD or NAND image required", __FUNCTION__);
}
#if MAX_SERIAL_PORTS < 1
#error MAX_SERIAL_PORTS must be at least 1!
#endif
s->cpu = omap3_mpu_init(cpu_model, 1, ram_size,
NULL, NULL, serial_hds[0], NULL);
s->nand = nand_init(NAND_MFR_MICRON, 0xba, dmtd ? dmtd->bdrv : NULL);
nand_setpins(s->nand, 0, 0, 0, 1, 0); /* no write-protect */
omap_gpmc_attach(s->cpu->gpmc, BEAGLE_NAND_CS, s->nand, 0, 2);
if (dsd) {
omap3_mmc_attach(s->cpu->omap3_mmc[0], dsd->bdrv, 0, 0);
}
s->twl4030 = twl4030_init(omap_i2c_bus(s->cpu->i2c, 0),
s->cpu->irq[0][OMAP_INT_3XXX_SYS_NIRQ],
NULL, NULL);
int i;
for (i = 0; i < nb_nics; i++) {
if (!nd_table[i].model || !strcmp(nd_table[i].model, "smc91c111")) {
break;
}
}
if (cpu_model == omap3430) {
qemu_set_irq(qdev_get_gpio_in(s->cpu->gpio, BEAGLE_GPIO_ID1),1);
qemu_set_irq(qdev_get_gpio_in(s->cpu->gpio, BEAGLE_GPIO_ID3),1);
}
if (i < nb_nics) {
s->smc = qdev_create(NULL, "smc91c111");
qdev_set_nic_properties(s->smc, &nd_table[i]);
qdev_init_nofail(s->smc);
sysbus_connect_irq(sysbus_from_qdev(s->smc), 0,
qdev_get_gpio_in(s->cpu->gpio, 54));
} else {
hw_error("%s: no NIC for smc91c111\n", __FUNCTION__);
}
omap_gpmc_attach(s->cpu->gpmc, BEAGLE_SMC_CS, s->smc, 0, 0);
/* Wire up an I2C slave which returns EDID monitor information;
* newer Linux kernels won't turn on the display unless they
* detect a monitor over DDC.
*/
s->ddc = i2c_create_slave(omap_i2c_bus(s->cpu->i2c, 2), "i2c-ddc", 0x50);
omap_lcd_panel_attach(s->cpu->dss);
}
static void at91_nand_mem_write(void *opaque, target_phys_addr_t offset,
uint32_t value)
{
NandState *s = opaque;
nand_setpins(s->nand_state, offset & (1 << 22), offset & (1 << 21), 0, 1, 0);
DPRINTF("(IP %X) write to %X %X\n", g_env->regs[15], offset, value);
nand_setio(s->nand_state, value & 0xFF);
}
static void overo_init(ram_addr_t ram_size,
const char *boot_device,
const char *kernel_filename,
const char *kernel_cmdline,
const char *initrd_filename,
const char *cpu_model)
{
struct overo_s *s = (struct overo_s *) g_malloc0(sizeof(*s));
DriveInfo *dmtd = drive_get(IF_MTD, 0, 0);
DriveInfo *dsd = drive_get(IF_SD, 0, 0);
if (ram_size > 1024 * 1024 * 1024) {
fprintf(stderr, "overo: maximum permitted RAM size 1024MB\n");
exit(1);
}
if (!dmtd && !dsd) {
hw_error("%s: SD or NAND image required", __FUNCTION__);
}
s->cpu = omap3_mpu_init(omap3430, ram_size,
NULL, NULL, serial_hds[0], NULL);
s->nand = nand_init(dmtd ? dmtd->bdrv : NULL, NAND_MFR_MICRON, 0xba);
nand_setpins(s->nand, 0, 0, 0, 1, 0); /* no write-protect */
omap_gpmc_attach_nand(s->cpu->gpmc, OVERO_NAND_CS, s->nand);
if (dsd) {
omap3_mmc_attach(s->cpu->omap3_mmc[0], dsd->bdrv, 0, 0);
}
/* FAB revs >= 2516: 4030 interrupt is GPIO 0 (earlier ones were 112) */
s->twl4030 = twl4030_init(omap_i2c_bus(s->cpu->i2c, 0),
qdev_get_gpio_in(s->cpu->gpio, 0),
NULL, NULL);
/* Wire up an I2C slave which returns EDID monitor information;
* newer Linux kernels won't turn on the display unless they
* detect a monitor over DDC.
*/
s->ddc = i2c_create_slave(omap_i2c_bus(s->cpu->i2c, 2), "i2c-ddc", 0x50);
omap_lcd_panel_attach(s->cpu->dss);
/* Strictly this should be a LAN9221 */
if (nd_table[0].vlan) {
/* The ethernet chip hangs off the GPMC */
NICInfo *nd = &nd_table[0];
qemu_check_nic_model(nd, "lan9118");
s->eth = qdev_create(NULL, "lan9118");
qdev_set_nic_properties(s->eth, nd);
qdev_init_nofail(s->eth);
omap_gpmc_attach(s->cpu->gpmc, OVERO_NET_CS,
sysbus_mmio_get_region(sysbus_from_qdev(s->eth), 0));
sysbus_connect_irq(sysbus_from_qdev(s->eth), 0,
qdev_get_gpio_in(s->cpu->gpio, 176));
}
}
static void
nand_writel (void *opaque, target_phys_addr_t addr, uint32_t value)
{
struct nand_state_t *s = opaque;
int rdy;
DNAND(printf("%s addr=%x v=%x\n", __func__, addr, value));
nand_setpins(s->nand, s->cle, s->ale, s->ce, 1, 0);
nand_setio(s->nand, value);
nand_getpins(s->nand, &rdy);
s->rdy = rdy;
}
static void
nand_write(void *opaque, hwaddr addr, uint64_t value,
unsigned size)
{
struct nand_state_t *s = opaque;
int rdy;
DNAND(printf("%s addr=%x v=%x\n", __func__, addr, (unsigned)value));
nand_setpins(s->nand, s->cle, s->ale, s->ce, 1, 0);
nand_setio(s->nand, value);
nand_getpins(s->nand, &rdy);
s->rdy = rdy;
}
static void beagle_common_init(ram_addr_t ram_size,
const char *boot_device,
const char *kernel_filename,
const char *kernel_cmdline,
const char *initrd_filename,
int cpu_model)
{
MemoryRegion *sysmem = get_system_memory();
struct beagle_s *s = (struct beagle_s *) g_malloc0(sizeof(*s));
DriveInfo *dmtd = drive_get(IF_MTD, 0, 0);
DriveInfo *dsd = drive_get(IF_SD, 0, 0);
if (!dmtd && !dsd) {
hw_error("%s: SD or NAND image required", __FUNCTION__);
}
#if MAX_SERIAL_PORTS < 1
#error MAX_SERIAL_PORTS must be at least 1!
#endif
s->cpu = omap3_mpu_init(sysmem, cpu_model, ram_size,
NULL, NULL, serial_hds[0], NULL);
s->nand = nand_init(dmtd ? dmtd->bdrv : NULL, NAND_MFR_MICRON, 0xba);
nand_setpins(s->nand, 0, 0, 0, 1, 0); /* no write-protect */
omap_gpmc_attach_nand(s->cpu->gpmc, BEAGLE_NAND_CS, s->nand);
if (dsd) {
omap3_mmc_attach(s->cpu->omap3_mmc[0], dsd->bdrv, 0, 0);
}
s->twl4030 = twl4030_init(omap_i2c_bus(s->cpu->i2c[0]),
qdev_get_gpio_in(s->cpu->ih[0],
OMAP_INT_3XXX_SYS_NIRQ),
NULL, NULL);
if (cpu_model == omap3430) {
qemu_set_irq(qdev_get_gpio_in(s->cpu->gpio, BEAGLE_GPIO_ID1),1);
qemu_set_irq(qdev_get_gpio_in(s->cpu->gpio, BEAGLE_GPIO_ID3),1);
}
/* Wire up an I2C slave which returns EDID monitor information;
* newer Linux kernels won't turn on the display unless they
* detect a monitor over DDC.
*/
s->ddc = i2c_create_slave(omap_i2c_bus(s->cpu->i2c[2]), "i2c-ddc", 0x50);
omap_lcd_panel_attach(s->cpu->dss);
}
static void tc6393xb_nand_writeb(TC6393xbState *s, hwaddr addr, uint32_t value) {
// fprintf(stderr, "tc6393xb_nand: write at %08x: %02x\n",
// (uint32_t) addr, value & 0xff);
switch (addr) {
case NAND_DATA + 0:
case NAND_DATA + 1:
case NAND_DATA + 2:
case NAND_DATA + 3:
nand_setio(s->flash, value);
s->nand.isr |= 1;
tc6393xb_nand_irq(s);
return;
case NAND_MODE:
s->nand.mode = value;
nand_setpins(s->flash,
value & NAND_MODE_CLE,
value & NAND_MODE_ALE,
!(value & NAND_MODE_CE),
value & NAND_MODE_WP,
0); // FIXME: gnd
switch (value & NAND_MODE_ECC_MASK) {
case NAND_MODE_ECC_RST:
ecc_reset(&s->ecc);
break;
case NAND_MODE_ECC_READ:
// FIXME
break;
case NAND_MODE_ECC_EN:
ecc_reset(&s->ecc);
}
return;
case NAND_ISR:
s->nand.isr = value;
tc6393xb_nand_irq(s);
return;
case NAND_IMR:
s->nand.imr = value;
tc6393xb_nand_irq(s);
return;
}
fprintf(stderr, "tc6393xb_nand: unhandled write at %08x: %02x\n",
(uint32_t) addr, value & 0xff);
}
static void reptar_init(MachineState *machine)
{
MemoryRegion *sysmem = get_system_memory();
struct reptar_s *s = (struct reptar_s *)g_malloc0(sizeof(*s));
DriveInfo *dmtd = NULL, *dsd = NULL, *pflash = NULL;
const char *kernel_filename = machine->kernel_filename;
const char *kernel_cmdline = machine->kernel_cmdline;
const char *initrd_filename = machine->initrd_filename;
/* (DRE) */
uint32_t pflash_size = 16 << 10; /* 16 KB */
if (ram_size > 1024 * 1024 * 1024) {
fprintf(stderr, "reptar: maximum permitted RAM size 1024MB\n");
exit(1);
}
/* Check if we are in -kernel u-boot.bin mode */
if (kernel_filename) {
/* (DRE) We do the following in order to retrieve the kernel filename during the boot process.
* For example, if qemu was launched with -kernel u-boot.bin */
reptar_binfo.ram_size = ram_size;
reptar_binfo.kernel_filename = kernel_filename;
reptar_binfo.kernel_cmdline = kernel_cmdline;
reptar_binfo.initrd_filename = initrd_filename;
reptar_binfo.loader_start = 0x40014100; /* Start of small bootloader*/
reptar_binfo.board_id = 0;
} else
reptar_binfo.kernel_filename = NULL;
s->cpu = omap3_mpu_init(sysmem, omap3430, ram_size, NULL, NULL, serial_hds[0], NULL);
pflash = drive_get(IF_PFLASH, 0, 0);
if (pflash) {
if (!pflash_cfi02_register(0x30000000,
NULL,
"reptar.nand_flash",
pflash_size,
blk_by_legacy_dinfo(pflash),
sector_len,
pflash_size / sector_len,
1, 2, 0, 0, 0, 0, 0x555, 0x2AA, 0)) {
fprintf(stderr, "qemu: Error registering flash memory.\n");
exit(1);
}
}
else {
dmtd = drive_get(IF_MTD, 0, 0);
s->nand = nand_init(dmtd ? blk_by_legacy_dinfo(dmtd) : NULL, NAND_MFR_MICRON, 0xba);
nand_setpins(s->nand, 0, 0, 0, 1, 0); /* no write-protect */
omap_gpmc_attach_nand(s->cpu->gpmc, REPTAR_NAND_CS, s->nand);
}
/*
* (DRE) Define MMC if any
*/
dsd = drive_get(IF_SD, 0, 0);
if (dsd)
omap3_mmc_attach(s->cpu->omap3_mmc[0], blk_by_legacy_dinfo(dsd), 0, 0);
if (!pflash && !dmtd && !dsd)
hw_error("%s: SD or NAND image required", __FUNCTION__);
/* FAB revs >= 2516: 4030 interrupt is GPIO 0 (earlier ones were 112) */
s->twl4030 = twl4030_init(omap_i2c_bus(s->cpu->i2c[0]),
qdev_get_gpio_in(s->cpu->gpio, 0),
NULL,
NULL);
/* Wire up an I2C slave which returns EDID monitor information;
* newer Linux kernels won't turn on the display unless they
* detect a monitor over DDC.
*/
s->ddc = i2c_create_slave(omap_i2c_bus(s->cpu->i2c[2]), "i2c-ddc", 0x50);
omap_lcd_panel_attach(s->cpu->dss);
/* Strictly this should be a LAN9221 */
#if 0
if (nd_table[0].vlan) {
#endif /* 0 */
/* The ethernet chip hangs off the GPMC */
NICInfo *nd = &nd_table[0];
qemu_check_nic_model(nd, "lan9118");
s->eth = qdev_create(NULL, "lan9118");
qdev_set_nic_properties(s->eth, nd);
qdev_init_nofail(s->eth);
omap_gpmc_attach(s->cpu->gpmc, REPTAR_NET_CS,
sysbus_mmio_get_region(SYS_BUS_DEVICE(s->eth), 0));
sysbus_connect_irq(SYS_BUS_DEVICE(s->eth), 0, qdev_get_gpio_in(s->cpu->gpio, 29));
#if 0
}
#endif /* 0 */
// Create reptar_sp6 with it's base address
s->sp6 = sysbus_create_simple("reptar_sp6",0x18000000,NULL);
// Connect reptar_sp6 to GPIO10 for the IRQ
sysbus_connect_irq(SYS_BUS_DEVICE(s->sp6), 0, qdev_get_gpio_in(s->cpu->gpio, 10));
}