/* check whether KMS is used. * in that case graphics=(auto)/console=(auto) will not activate console * graphics. * code adapted from libdrm (drmCheckModesettingSupported) */ static int using_kms(void) { #ifdef __linux__ char pci_dev_dir[1024]; int bus, dev, func; DIR *sysdir; struct dirent *dent; int found = 0; pciRec *pcirec; if (!pcibios_init()) return 0; pcirec = pcibios_find_class(PCI_CLASS_DISPLAY_VGA << 8, 0); if (!pcirec) return 0; bus = pcirec->bdf >> 8; dev = (pcirec->bdf & 0xff) >> 3; func = pcirec->bdf & 0x7; sprintf(pci_dev_dir, "/sys/bus/pci/devices/0000:%02x:%02x.%d/drm", bus, dev, func); sysdir = opendir(pci_dev_dir); if (sysdir) { dent = readdir(sysdir); while (dent) { if (!strncmp(dent->d_name, "controlD", 8)) { found = 1; break; } dent = readdir(sysdir); } closedir(sysdir); if (found) return 1; } sprintf(pci_dev_dir, "/sys/bus/pci/devices/0000:%02x:%02x.%d/", bus, dev, func); sysdir = opendir(pci_dev_dir); if (!sysdir) return 0; dent = readdir(sysdir); while (dent) { if (!strncmp(dent->d_name, "drm:controlD", 12)) { found = 1; break; } dent = readdir(sysdir); } closedir(sysdir); if (found) return 1; #endif return 0; }
static int pci_etherdev_probe(struct device *dev, struct pci_id_info pci_tbl[]) { int cards_found = 0; int pci_index = 0; unsigned char pci_bus, pci_device_fn; if ( ! pcibios_present()) return -ENODEV; for (;pci_index < 0xff; pci_index++) { u16 vendor, device, pci_command, new_command; int chip_idx, irq; long pciaddr; long ioaddr; if (pcibios_find_class (PCI_CLASS_NETWORK_ETHERNET << 8, pci_index, &pci_bus, &pci_device_fn) != PCIBIOS_SUCCESSFUL) break; pcibios_read_config_word(pci_bus, pci_device_fn, PCI_VENDOR_ID, &vendor); pcibios_read_config_word(pci_bus, pci_device_fn, PCI_DEVICE_ID, &device); for (chip_idx = 0; pci_tbl[chip_idx].vendor_id; chip_idx++) if (vendor == pci_tbl[chip_idx].vendor_id && (device & pci_tbl[chip_idx].device_id_mask) == pci_tbl[chip_idx].device_id) break; if (pci_tbl[chip_idx].vendor_id == 0) /* Compiled out! */ continue; { #if defined(PCI_SUPPORT_VER2) struct pci_dev *pdev = pci_find_slot(pci_bus, pci_device_fn); #ifdef VIA_USE_IO pciaddr = pdev->base_address[0]; #else pciaddr = pdev->base_address[1]; #endif irq = pdev->irq; #else u32 pci_memaddr; u8 pci_irq_line; pcibios_read_config_byte(pci_bus, pci_device_fn, PCI_INTERRUPT_LINE, &pci_irq_line); #ifdef VIA_USE_IO pcibios_read_config_dword(pci_bus, pci_device_fn, PCI_BASE_ADDRESS_0, &pci_memaddr); pciaddr = pci_memaddr; #else pcibios_read_config_dword(pci_bus, pci_device_fn, PCI_BASE_ADDRESS_1, &pci_memaddr); pciaddr = pci_memaddr; #endif irq = pci_irq_line; #endif } if (debug > 2) printk(KERN_INFO "Found %s at PCI address %#lx, IRQ %d.\n", pci_tbl[chip_idx].name, pciaddr, irq); if (pci_tbl[chip_idx].flags & PCI_USES_IO) { ioaddr = pciaddr & ~3; if (check_region(ioaddr, pci_tbl[chip_idx].io_size)) continue; } else if ((ioaddr = (long)ioremap(pciaddr & ~0xf, pci_tbl[chip_idx].io_size)) == 0) { printk(KERN_INFO "Failed to map PCI address %#lx.\n", pciaddr); continue; } pcibios_read_config_word(pci_bus, pci_device_fn, PCI_COMMAND, &pci_command); new_command = pci_command | (pci_tbl[chip_idx].flags & 7); if (pci_command != new_command) { printk(KERN_INFO " The PCI BIOS has not enabled the" " device at %d/%d! Updating PCI command %4.4x->%4.4x.\n", pci_bus, pci_device_fn, pci_command, new_command); pcibios_write_config_word(pci_bus, pci_device_fn, PCI_COMMAND, new_command); } dev = pci_tbl[chip_idx].probe1(pci_bus, pci_device_fn, dev, ioaddr, irq, chip_idx, cards_found); if (dev && (pci_tbl[chip_idx].flags & PCI_COMMAND_MASTER)) { u8 pci_latency; pcibios_read_config_byte(pci_bus, pci_device_fn, PCI_LATENCY_TIMER, &pci_latency); if (pci_latency < min_pci_latency) { printk(KERN_INFO " PCI latency timer (CFLT) is " "unreasonably low at %d. Setting to %d clocks.\n", pci_latency, min_pci_latency); pcibios_write_config_byte(pci_bus, pci_device_fn, PCI_LATENCY_TIMER, min_pci_latency); } } dev = 0; cards_found++; } return cards_found ? 0 : -ENODEV; }
int awc4500_pci_probe(struct net_device *dev) { int cards_found = 0; static int pci_index; /* Static, for multiple probe calls. */ u8 pci_irq_line = 0; // int p; unsigned char awc_pci_dev, awc_pci_bus; if (!pci_present()) return -1; for (; pci_index < 0xff; pci_index++) { u16 vendor, device, pci_command, new_command; u32 pci_memaddr; u32 pci_ioaddr; u32 pci_cisaddr; struct pci_dev *pdev; if (pcibios_find_class (PCI_CLASS_NETWORK_OTHER << 8, reverse_probe ? 0xfe - pci_index : pci_index, &awc_pci_bus, &awc_pci_dev) != PCIBIOS_SUCCESSFUL) { if (reverse_probe) { continue; } else { break; } } pdev = pci_find_slot(awc_pci_bus, awc_pci_dev); if (!pdev) continue; if (pci_enable_device(pdev)) continue; vendor = pdev->vendor; device = pdev->device; pci_irq_line = pdev->irq; pci_memaddr = pci_resource_start (pdev, 0); pci_cisaddr = pci_resource_start (pdev, 1); pci_ioaddr = pci_resource_start (pdev, 2); // printk("\n pci capabilities %x and ptr %x \n",pci_caps,pci_caps_ptr); /* Remove I/O space marker in bit 0. */ if (vendor != PCI_VENDOR_ID_AIRONET) continue; if (device != PCI_DEVICE_AIRONET_4800_1 && device != PCI_DEVICE_AIRONET_4800 && device != PCI_DEVICE_AIRONET_4500 ) continue; // if (check_region(pci_ioaddr, AIRONET4X00_IO_SIZE) || // check_region(pci_cisaddr, AIRONET4X00_CIS_SIZE) || // check_region(pci_memaddr, AIRONET4X00_MEM_SIZE)) { // printk(KERN_ERR "aironet4X00 mem addrs not available for maping \n"); // continue; // } if (!request_region(pci_ioaddr, AIRONET4X00_IO_SIZE, "aironet4x00 ioaddr")) continue; // request_region(pci_cisaddr, AIRONET4X00_CIS_SIZE, "aironet4x00 cis"); // request_region(pci_memaddr, AIRONET4X00_MEM_SIZE, "aironet4x00 mem"); mdelay(10); pci_read_config_word(pdev, PCI_COMMAND, &pci_command); new_command = pci_command | PCI_COMMAND_SERR; if (pci_command != new_command) pci_write_config_word(pdev, PCI_COMMAND, new_command); /* if (device == PCI_DEVICE_AIRONET_4800) pci_write_config_dword(pdev, 0x40, 0x00000000); udelay(1000); */ if (device == PCI_DEVICE_AIRONET_4800) pci_write_config_dword(pdev, 0x40, 0x40000000); if (awc_pci_init(dev, pdev, pci_ioaddr,pci_cisaddr,pci_memaddr,pci_irq_line)) { printk(KERN_ERR "awc4800 pci init failed \n"); break; } dev = 0; cards_found++; } return cards_found ? 0 : -ENODEV; }
int rtl8139_probe(struct device *dev) { int cards_found = 0; int pci_index = 0; unsigned char pci_bus, pci_device_fn; if ( ! pcibios_present()) return -ENODEV; for (; pci_index < 0xff; pci_index++) { u16 vendor, device, pci_command, new_command; int chip_idx, irq; long ioaddr; if (pcibios_find_class (PCI_CLASS_NETWORK_ETHERNET << 8, pci_index, &pci_bus, &pci_device_fn) != PCIBIOS_SUCCESSFUL) break; pcibios_read_config_word(pci_bus, pci_device_fn, PCI_VENDOR_ID, &vendor); pcibios_read_config_word(pci_bus, pci_device_fn, PCI_DEVICE_ID, &device); for (chip_idx = 0; pci_tbl[chip_idx].vendor_id; chip_idx++) if (vendor == pci_tbl[chip_idx].vendor_id && (device & pci_tbl[chip_idx].device_id_mask) == pci_tbl[chip_idx].device_id) break; if (pci_tbl[chip_idx].vendor_id == 0) /* Compiled out! */ continue; { #if defined(PCI_SUPPORT_VER2) struct pci_dev *pdev = pci_find_slot(pci_bus, pci_device_fn); ioaddr = pdev->base_address[0] & ~3; irq = pdev->irq; #else u32 pci_ioaddr; u8 pci_irq_line; pcibios_read_config_byte(pci_bus, pci_device_fn, PCI_INTERRUPT_LINE, &pci_irq_line); pcibios_read_config_dword(pci_bus, pci_device_fn, PCI_BASE_ADDRESS_0, &pci_ioaddr); ioaddr = pci_ioaddr & ~3; irq = pci_irq_line; #endif } if ((pci_tbl[chip_idx].flags & PCI_USES_IO) && check_region(ioaddr, pci_tbl[chip_idx].io_size)) continue; /* Activate the card: fix for brain-damaged Win98 BIOSes. */ pcibios_read_config_word(pci_bus, pci_device_fn, PCI_COMMAND, &pci_command); new_command = pci_command | (pci_tbl[chip_idx].flags & 7); if (pci_command != new_command) { printk(KERN_INFO " The PCI BIOS has not enabled the" " device at %d/%d! Updating PCI command %4.4x->%4.4x.\n", pci_bus, pci_device_fn, pci_command, new_command); pcibios_write_config_word(pci_bus, pci_device_fn, PCI_COMMAND, new_command); } dev = pci_tbl[chip_idx].probe1(pci_bus, pci_device_fn, dev, ioaddr, irq, chip_idx, cards_found); if (dev && (pci_tbl[chip_idx].flags & PCI_COMMAND_MASTER)) { u8 pci_latency; pcibios_read_config_byte(pci_bus, pci_device_fn, PCI_LATENCY_TIMER, &pci_latency); if (pci_latency < 32) { printk(KERN_NOTICE " PCI latency timer (CFLT) is " "unreasonably low at %d. Setting to 64 clocks.\n", pci_latency); pcibios_write_config_byte(pci_bus, pci_device_fn, PCI_LATENCY_TIMER, 64); } } dev = 0; cards_found++; } return cards_found ? 0 : -ENODEV; }