/* * WORKAROUND: * This func will return 0 since MCLK is enabled by BIOS * and will be always on event if set MCLK failed here. * TODO: REMOVE WORKAROUND, err should be returned when * set MCLK failed. */ static int ov5670_flisclk_ctrl(struct v4l2_subdev *sd, int flag) { static const unsigned int clock_khz = 19200; #ifdef CONFIG_INTEL_SOC_PMC int ret = 0; if (flag) { ret = pmc_pc_set_freq(OSC_CAM0_CLK, (IS_CHT) ? CLK_19P2MHz_XTAL : CLK_19P2MHz); if (ret) pr_err("ov5670 clock set failed.\n"); } pmc_pc_configure(OSC_CAM0_CLK, flag ? CLK_ON : CLK_OFF); return 0; #elif defined(CONFIG_INTEL_SCU_IPC_UTIL) int ret; ret = intel_scu_ipc_osc_clk(OSC_CLK_CAM1, flag ? clock_khz : 0); msleep(1); return ret; #else pr_err("ov5670 clock is not set.\n"); return 0; #endif }
static int ov7736_flisclk_ctrl(struct v4l2_subdev *sd, int flag) { static const unsigned int clock_khz = 19200; #ifdef CONFIG_INTEL_SOC_PMC if (flag) { int ret; ret = pmc_pc_set_freq(OSC_CAM1_CLK, CLK_19P2MHz); if (ret) return ret; } return pmc_pc_configure(OSC_CAM1_CLK, flag); #endif return 0; }
static int gc0310_flisclk_ctrl(struct v4l2_subdev *sd, int flag) { static const unsigned int clock_khz = 19200; int ret = 0; #ifdef CONFIG_INTEL_SOC_PMC if (flag) { ret = pmc_pc_set_freq(OSC_CAM1_CLK, 0x0); if (ret) return ret; } ret = pmc_pc_configure(OSC_CAM1_CLK, flag); #endif return ret; }
static int hm2056_flisclk_ctrl(struct v4l2_subdev *sd, int flag) { static const unsigned int clock_khz = 19200; #ifdef CONFIG_INTEL_SOC_PMC if (flag) { int ret; ret = pmc_pc_set_freq(OSC_CAM0_CLK, CLK_19P2MHz); if (ret) return ret; } return pmc_pc_configure(OSC_CAM0_CLK, flag); #endif /*if (intel_mid_identify_cpu() != INTEL_MID_CPU_CHIP_VALLEYVIEW2) return intel_scu_ipc_osc_clk(OSC_CLK_CAM0, flag ? clock_khz : 0); else*/ return 0; }
static int imx134_flisclk_ctrl(struct v4l2_subdev *sd, int flag) { #ifdef CONFIG_INTEL_SOC_PMC if (flag) { int ret; ret = pmc_pc_set_freq(OSC_CAM0_CLK, CLK_19P2MHz); if (ret) return ret; return pmc_pc_configure(OSC_CAM0_CLK, CLK_ON); } return pmc_pc_configure(OSC_CAM0_CLK, CLK_OFF); #elif defined(CONFIG_INTEL_SCU_IPC_UTIL) static const unsigned int clock_khz = 19200; return intel_scu_ipc_osc_clk(OSC_CLK_CAM0, flag ? clock_khz : 0); #else pr_err("imx134 clock is not set.\n"); return 0; #endif }
static int m10mo_flisclk_ctrl(struct v4l2_subdev *sd, int flag) { #ifdef CONFIG_INTEL_SOC_PMC int ret; if (flag) { ret = pmc_pc_set_freq(OSC_CAM_CLK, (IS_CHT) ? CLK_19P2MHz_XTAL : CLK_19P2MHz); if (ret) return ret; ret = pmc_pc_configure(OSC_CAM_CLK, 1); } else { ret = pmc_pc_configure(OSC_CAM_CLK, 2); } pr_info("M10MO clock control. flag=%d ret=%d\n", flag, ret); return ret; #elif defined(CONFIG_INTEL_SCU_IPC_UTIL) static const unsigned int clock_khz = 19200; return intel_scu_ipc_osc_clk(OSC_CLK_CAM0, flag ? clock_khz : 0); #else pr_err("clock is not set.\n"); return 0; #endif }