/*
* Some LDOs support Low Power Mode while the system is running.
*
* LDOs 1, 3, 20, 21.
*/
static int max77802_set_mode(struct regulator_dev *rdev, unsigned int mode)
{
struct max77802_regulator_prv *max77802 = rdev_get_drvdata(rdev);
int id = rdev_get_id(rdev);
unsigned int val;
int shift = max77802_get_opmode_shift(id);
switch (mode) {
case REGULATOR_MODE_STANDBY:
val = MAX77802_OPMODE_LP; /* ON in Low Power Mode */
break;
case REGULATOR_MODE_NORMAL:
val = MAX77802_OPMODE_NORMAL; /* ON in Normal Mode */
break;
default:
dev_warn(&rdev->dev, "%s: regulator mode: 0x%x not supported\n",
rdev->desc->name, mode);
return -EINVAL;
}
max77802->opmode[id] = val;
return regmap_update_bits(rdev->regmap, rdev->desc->enable_reg,
rdev->desc->enable_mask, val << shift);
}
static int lp8720_ldo_set_voltage(struct regulator_dev *dev,
int min_uV, int max_uV,
unsigned int *selector)
{
struct lp8720 *lp8720 = rdev_get_drvdata(dev);
int ldo = rdev_get_id(dev) - LP8720_LDO1;
int min_vol = min_uV / 1000, max_vol = max_uV / 1000;
const int *vol_map = LDO_VOL_VALUE_MAP(ldo);
u16 val;
if (min_vol < vol_map[LDO_VOL_MIN_IDX] ||
min_vol > vol_map[LDO_VOL_MAX_IDX]) {
dev_err(lp8720->dev, "[min_vol = %d] is out of range\n",
min_vol);
dev_err(lp8720->dev, "vol_map[%d] : %d, vol_map[%d] : %d\n",
LDO_VOL_MIN_IDX, vol_map[LDO_VOL_MIN_IDX],
LDO_VOL_MAX_IDX, vol_map[LDO_VOL_MAX_IDX]);
return -EINVAL;
}
for (val = LDO_VOL_MIN_IDX; val <= LDO_VOL_MAX_IDX; val++)
if (vol_map[val] >= min_vol)
break;
if (val > LDO_VOL_MAX_IDX || vol_map[val] > max_vol) {
dev_err(lp8720->dev, "[val = %d] is out of range\n", val);
return -EINVAL;
}
*selector = val;
dev_dbg(lp8720->dev, "%s, disable ldo:%d, val:0x%4x\n",
__func__, ldo, val);
return lp8720_set_bits(lp8720, LP8720_LDO_VOL_CONTR_REG(ldo),
LP8720_LDOV_MASK, val);
}
static int wm8350_dcdc_set_suspend_voltage(struct regulator_dev *rdev, int uV)
{
struct wm8350 *wm8350 = rdev_get_drvdata(rdev);
int sel, volt_reg, dcdc = rdev_get_id(rdev);
u16 val;
dev_dbg(wm8350->dev, "%s %d mV %d\n", __func__, dcdc, uV / 1000);
switch (dcdc) {
case WM8350_DCDC_1:
volt_reg = WM8350_DCDC1_LOW_POWER;
break;
case WM8350_DCDC_3:
volt_reg = WM8350_DCDC3_LOW_POWER;
break;
case WM8350_DCDC_4:
volt_reg = WM8350_DCDC4_LOW_POWER;
break;
case WM8350_DCDC_6:
volt_reg = WM8350_DCDC6_LOW_POWER;
break;
case WM8350_DCDC_2:
case WM8350_DCDC_5:
default:
return -EINVAL;
}
sel = regulator_map_voltage_linear(rdev, uV, uV);
if (sel < 0)
return sel;
/* all DCDCs have same mV bits */
val = wm8350_reg_read(wm8350, volt_reg) & ~WM8350_DC1_VSEL_MASK;
wm8350_reg_write(wm8350, volt_reg, val | sel);
return 0;
}
static int mc13783_regulator_set_voltage(struct regulator_dev *rdev,
int min_uV, int max_uV)
{
struct mc13783_regulator_priv *priv = rdev_get_drvdata(rdev);
int value, id = rdev_get_id(rdev);
int ret;
dev_dbg(rdev_get_dev(rdev), "%s id: %d min_uV: %d max_uV: %d\n",
__func__, id, min_uV, max_uV);
/* Find the best index */
value = mc13783_get_best_voltage_index(rdev, min_uV, max_uV);
dev_dbg(rdev_get_dev(rdev), "%s best value: %d \n", __func__, value);
if (value < 0)
return value;
mc13783_lock(priv->mc13783);
ret = mc13783_reg_rmw(priv->mc13783, mc13783_regulators[id].vsel_reg,
mc13783_regulators[id].vsel_mask,
value << mc13783_regulators[id].vsel_shift);
mc13783_unlock(priv->mc13783);
return ret;
}
static int tps65023_ldo_set_voltage(struct regulator_dev *dev,
int min_uV, int max_uV, unsigned *selector)
{
struct tps_pmic *tps = rdev_get_drvdata(dev);
int data, vsel, ldo = rdev_get_id(dev);
if (ldo < TPS65023_LDO_1 || ldo > TPS65023_LDO_2)
return -EINVAL;
if (min_uV < tps->info[ldo]->min_uV || min_uV > tps->info[ldo]->max_uV)
return -EINVAL;
if (max_uV < tps->info[ldo]->min_uV || max_uV > tps->info[ldo]->max_uV)
return -EINVAL;
for (vsel = 0; vsel < tps->info[ldo]->table_len; vsel++) {
int mV = tps->info[ldo]->table[vsel];
int uV = mV * 1000;
/* Break at the first in-range value */
if (min_uV <= uV && uV <= max_uV)
break;
}
if (vsel == tps->info[ldo]->table_len)
return -EINVAL;
*selector = vsel;
data = tps_65023_reg_read(tps, TPS65023_REG_LDO_CTRL);
if (data < 0)
return data;
data &= TPS65023_LDO_CTRL_LDOx_MASK(ldo - TPS65023_LDO_1);
data |= (vsel << (TPS65023_LDO_CTRL_LDOx_SHIFT(ldo - TPS65023_LDO_1)));
return tps_65023_reg_write(tps, TPS65023_REG_LDO_CTRL, data);
}
static int d2083_regulator_is_enabled(struct regulator_dev *rdev)
{
struct d2083 *d2083 = rdev_get_drvdata(rdev);
unsigned int reg_num, regulator_id = rdev_get_id(rdev);
int ret = -EINVAL;
u8 reg_val = 0;
if(!is_mode_control_enabled()){
reg_num = get_regulator_reg(regulator_id);
ret = d2083_reg_read(d2083, reg_num, ®_val);
if(ret < 0) {
dlg_err("I2C read error. \n");
return ret;
}
/* 0x0 : off, 0x1 : on */
ret = reg_val & (1<<6);
} else {
if (regulator_id >= D2083_NUMBER_OF_REGULATORS)
return -EINVAL;
reg_num = get_regulator_mctl_reg(regulator_id);
ret = d2083_reg_read(d2083, reg_num, ®_val);
if(ret < 0) {
dlg_err("I2C read error. \n");
return ret;
}
/* 0x0 : Off * 0x1 : On * 0x2 : Sleep * 0x3 : n/a */
ret = ((reg_val & (D2083_REGULATOR_MCTL1|D2083_REGULATOR_MCTL3)) >= 1) ? 1 : 0;
}
return ret;
}
static int tps65218_pmic_set_voltage_sel(struct regulator_dev *dev,
unsigned selector)
{
int ret;
struct tps65218 *tps = rdev_get_drvdata(dev);
unsigned int rid = rdev_get_id(dev);
/* Set the voltage based on vsel value and write protect level is 2 */
ret = tps65218_set_bits(tps, dev->desc->vsel_reg, dev->desc->vsel_mask,
selector, TPS65218_PROTECT_L1);
/* Set GO bit for DCDC1/2 to initiate voltage transistion */
switch (rid) {
case TPS65218_DCDC_1:
case TPS65218_DCDC_2:
ret = tps65218_set_bits(tps, TPS65218_REG_CONTRL_SLEW_RATE,
TPS65218_SLEW_RATE_GO,
TPS65218_SLEW_RATE_GO,
TPS65218_PROTECT_L1);
break;
}
return ret;
}
static int s2m_set_voltage_time_sel(struct regulator_dev *rdev,
unsigned int old_selector,
unsigned int new_selector)
{
unsigned int ramp_delay = 0;
int old_volt, new_volt;
int reg_id = rdev_get_id(rdev);
if (rdev->constraints->ramp_delay)
ramp_delay = rdev->constraints->ramp_delay;
else if (rdev->desc->ramp_delay)
ramp_delay = rdev->desc->ramp_delay;
if (ramp_delay == 0) {
pr_warn("%s: ramp_delay not set\n", rdev->desc->name);
return -EINVAL;
}
/* Add buck1/2/3 ramp up delay margin x2 */
if (reg_id == S2MPS16_BUCK1 || reg_id == S2MPS16_BUCK2
|| reg_id == S2MPS16_BUCK3) {
ramp_delay = ramp_delay / 2;
}
/* sanity check */
if (!rdev->desc->ops->list_voltage)
return -EINVAL;
old_volt = rdev->desc->ops->list_voltage(rdev, old_selector);
new_volt = rdev->desc->ops->list_voltage(rdev, new_selector);
if (old_selector < new_selector)
return DIV_ROUND_UP(new_volt - old_volt, ramp_delay);
return 0;
}
static int wm8350_dcdc25_set_suspend_enable(struct regulator_dev *rdev)
{
struct wm8350 *wm8350 = rdev_get_drvdata(rdev);
int dcdc = rdev_get_id(rdev);
u16 val;
switch (dcdc) {
case WM8350_DCDC_2:
val = wm8350_reg_read(wm8350, WM8350_DCDC2_CONTROL)
& ~WM8350_DC2_HIB_MODE_MASK;
wm8350_reg_write(wm8350, WM8350_DCDC2_CONTROL, val |
WM8350_DC2_HIB_MODE_ACTIVE);
break;
case WM8350_DCDC_5:
val = wm8350_reg_read(wm8350, WM8350_DCDC5_CONTROL)
& ~WM8350_DC2_HIB_MODE_MASK;
wm8350_reg_write(wm8350, WM8350_DCDC5_CONTROL, val |
WM8350_DC5_HIB_MODE_ACTIVE);
break;
default:
return -EINVAL;
}
return 0;
}
static int pcf50633_regulator_set_voltage(struct regulator_dev *rdev,
<<<<<<< HEAD
int min_uV, int max_uV,
unsigned *selector)
=======
int min_uV, int max_uV)
>>>>>>> 296c66da8a02d52243f45b80521febece5ed498a
{
struct pcf50633 *pcf;
int regulator_id, millivolts;
u8 volt_bits, regnr;
pcf = rdev_get_drvdata(rdev);
regulator_id = rdev_get_id(rdev);
if (regulator_id >= PCF50633_NUM_REGULATORS)
return -EINVAL;
millivolts = min_uV / 1000;
regnr = pcf50633_regulator_registers[regulator_id];
switch (regulator_id) {
case PCF50633_REGULATOR_AUTO:
volt_bits = auto_voltage_bits(millivolts);
break;
case PCF50633_REGULATOR_DOWN1:
volt_bits = down_voltage_bits(millivolts);
break;
case PCF50633_REGULATOR_DOWN2:
static int s2mps11_set_ramp_delay(struct regulator_dev *rdev, int ramp_delay)
{
struct s2mps11_info *s2mps11 = rdev_get_drvdata(rdev);
unsigned int ramp_val, ramp_shift, ramp_reg = S2MPS11_REG_RAMP_BUCK;
unsigned int ramp_enable = 1, enable_shift = 0;
int ret;
switch (rdev_get_id(rdev)) {
case S2MPS11_BUCK1:
if (ramp_delay > s2mps11->ramp_delay16)
s2mps11->ramp_delay16 = ramp_delay;
else
ramp_delay = s2mps11->ramp_delay16;
ramp_shift = S2MPS11_BUCK16_RAMP_SHIFT;
break;
case S2MPS11_BUCK2:
enable_shift = S2MPS11_BUCK2_RAMP_EN_SHIFT;
if (!ramp_delay) {
ramp_enable = 0;
break;
}
s2mps11->ramp_delay2 = ramp_delay;
ramp_shift = S2MPS11_BUCK2_RAMP_SHIFT;
ramp_reg = S2MPS11_REG_RAMP;
break;
case S2MPS11_BUCK3:
enable_shift = S2MPS11_BUCK3_RAMP_EN_SHIFT;
if (!ramp_delay) {
ramp_enable = 0;
break;
}
if (ramp_delay > s2mps11->ramp_delay34)
s2mps11->ramp_delay34 = ramp_delay;
else
ramp_delay = s2mps11->ramp_delay34;
ramp_shift = S2MPS11_BUCK34_RAMP_SHIFT;
ramp_reg = S2MPS11_REG_RAMP;
break;
case S2MPS11_BUCK4:
enable_shift = S2MPS11_BUCK4_RAMP_EN_SHIFT;
if (!ramp_delay) {
ramp_enable = 0;
break;
}
if (ramp_delay > s2mps11->ramp_delay34)
s2mps11->ramp_delay34 = ramp_delay;
else
ramp_delay = s2mps11->ramp_delay34;
ramp_shift = S2MPS11_BUCK34_RAMP_SHIFT;
ramp_reg = S2MPS11_REG_RAMP;
break;
case S2MPS11_BUCK5:
s2mps11->ramp_delay5 = ramp_delay;
ramp_shift = S2MPS11_BUCK5_RAMP_SHIFT;
break;
case S2MPS11_BUCK6:
enable_shift = S2MPS11_BUCK6_RAMP_EN_SHIFT;
if (!ramp_delay) {
ramp_enable = 0;
break;
}
if (ramp_delay > s2mps11->ramp_delay16)
s2mps11->ramp_delay16 = ramp_delay;
else
ramp_delay = s2mps11->ramp_delay16;
ramp_shift = S2MPS11_BUCK16_RAMP_SHIFT;
break;
case S2MPS11_BUCK7:
case S2MPS11_BUCK8:
case S2MPS11_BUCK10:
if (ramp_delay > s2mps11->ramp_delay7810)
s2mps11->ramp_delay7810 = ramp_delay;
else
ramp_delay = s2mps11->ramp_delay7810;
ramp_shift = S2MPS11_BUCK7810_RAMP_SHIFT;
break;
case S2MPS11_BUCK9:
s2mps11->ramp_delay9 = ramp_delay;
ramp_shift = S2MPS11_BUCK9_RAMP_SHIFT;
break;
default:
return 0;
}
if (!ramp_enable)
goto ramp_disable;
/* Ramp delay can be enabled/disabled only for buck[2346] */
if ((rdev_get_id(rdev) >= S2MPS11_BUCK2 &&
rdev_get_id(rdev) <= S2MPS11_BUCK4) ||
rdev_get_id(rdev) == S2MPS11_BUCK6) {
ret = regmap_update_bits(rdev->regmap, S2MPS11_REG_RAMP,
1 << enable_shift, 1 << enable_shift);
if (ret) {
dev_err(&rdev->dev, "failed to enable ramp rate\n");
return ret;
}
}
ramp_val = get_ramp_delay(ramp_delay);
return regmap_update_bits(rdev->regmap, ramp_reg, 0x3 << ramp_shift,
ramp_val << ramp_shift);
ramp_disable:
return regmap_update_bits(rdev->regmap, S2MPS11_REG_RAMP,
1 << enable_shift, 0);
}
static int s5m8751_regulator_set_voltage(struct regulator_dev *rdev, int min_uV,
int max_uV)
{
struct s5m8751_regulator *regulator = rdev_get_drvdata(rdev);
struct s5m8751 *s5m8751 = regulator->s5m8751;
int ret;
int volt_reg, regu = rdev_get_id(rdev), mV, min_mV = min_uV / 1000,
max_mV = max_uV / 1000;
uint8_t mask, val;
if (min_mV < info[regu].min_vol || min_mV > info[regu].max_vol)
return -EINVAL;
if (max_mV < info[regu].min_vol || max_mV > info[regu].max_vol)
return -EINVAL;
mV = s5m8751_mvolts_to_val(min_mV, info[regu].min_vol,
info[regu].step_vol);
switch (regu) {
case S5M8751_LDO1:
volt_reg = S5M8751_LDO1_VSET;
mask = S5M8751_LDO1_VSET_MASK;
break;
case S5M8751_LDO2:
volt_reg = S5M8751_LDO2_VSET;
mask = S5M8751_LDO2_VSET_MASK;
break;
case S5M8751_LDO3:
volt_reg = S5M8751_LDO3_VSET;
mask = S5M8751_LDO3_VSET_MASK;
break;
case S5M8751_LDO4:
volt_reg = S5M8751_LDO4_VSET;
mask = S5M8751_LDO4_VSET_MASK;
break;
case S5M8751_LDO5:
volt_reg = S5M8751_LDO5_VSET;
mask = S5M8751_LDO5_VSET_MASK;
break;
case S5M8751_LDO6:
volt_reg = S5M8751_LDO6_VSET;
mask = S5M8751_LDO6_VSET_MASK;
break;
case S5M8751_BUCK1_1:
volt_reg = S5M8751_BUCK1_V1_SET;
mask = S5M8751_BUCK1_V1_SET_MASK;
break;
case S5M8751_BUCK1_2:
volt_reg = S5M8751_BUCK1_V2_SET;
mask = S5M8751_BUCK1_V2_SET_MASK;
break;
case S5M8751_BUCK2_1:
volt_reg = S5M8751_BUCK2_V1_SET;
mask = S5M8751_BUCK2_V1_SET_MASK;
break;
case S5M8751_BUCK2_2:
volt_reg = S5M8751_BUCK2_V2_SET;
mask = S5M8751_BUCK2_V2_SET_MASK;
break;
default:
return -EINVAL;
}
ret = s5m8751_reg_read(s5m8751, volt_reg, &val);
if (ret)
goto out;
val &= ~mask;
ret = s5m8751_reg_write(s5m8751, volt_reg, val | mV);
out:
return ret;
}
static int max8660_dcdc_enable(struct regulator_dev *rdev)
{
struct max8660 *max8660 = rdev_get_drvdata(rdev);
u8 bit = (rdev_get_id(rdev) == MAX8660_V3) ? 1 : 4;
return max8660_write(max8660, MAX8660_OVER1, 0xff, bit);
}
static int s2m_set_ldo_dvs_control(struct regulator_dev *rdev)
{
int ret;
struct s2mps16_info *s2mps16 = rdev_get_drvdata(rdev);
int reg_id = rdev_get_id(rdev);
unsigned int sram_vthr, sram_delta, asv_info;
int vthr_mask, delta_mask;
int vthr_val, delta_val = 0;
int dvs_reg;
unsigned int ctrl_value;
asv_info = cal_asv_pmic_info();
if (asv_info < 0) {
pr_warn("Do not read asv pmic fuse value \n");
goto out;
}
switch (reg_id) {
case S2MPS16_BUCK2:
vthr_mask = 0x3;
delta_mask = 0x3 << 2;
sram_vthr = asv_info & vthr_mask;
sram_delta = (asv_info & delta_mask) >> 2;
s2mps16->buck2_dvs = sram_delta;
dvs_reg = S2MPS16_REG_LDO7_DVS;
break;
case S2MPS16_BUCK3:
vthr_mask = 0x3 << 4;
delta_mask = 0x3 << 6;
sram_vthr = (asv_info & vthr_mask) >> 4;
sram_delta = (asv_info & delta_mask) >> 6;
dvs_reg = S2MPS16_REG_LDO10_DVS;
break;
case S2MPS16_LDO8:
vthr_mask = 0x3 << 12;
delta_mask = 0x3 << 14;
sram_vthr = (asv_info & vthr_mask) >> 12;
sram_delta = (asv_info & delta_mask) >> 14;
break;
case S2MPS16_BUCK1:
vthr_mask = 0x3 << 16;
delta_mask = 0x3 << 18;
sram_vthr = (asv_info & vthr_mask) >> 16;
sram_delta = (asv_info & delta_mask) >> 18;
dvs_reg = S2MPS16_REG_LDO9_DVS;
break;
default:
dev_err(&rdev->dev, "%s, set invalid reg_id(%d)\n", __func__, reg_id);
break;
}
switch (sram_vthr) {
case 0x0:
if (reg_id == S2MPS16_LDO8)
s2mps16->int_vthr = 800000;
else if (reg_id == S2MPS16_BUCK2)
vthr_val = 0x6 << 5;
else if ((reg_id == S2MPS16_BUCK3) || (reg_id == S2MPS16_BUCK1))
vthr_val = 0x4 << 5;
break;
case 0x1:
if (reg_id == S2MPS16_LDO8)
s2mps16->int_vthr = 750000;
else if ((reg_id == S2MPS16_BUCK1) || (reg_id == S2MPS16_BUCK2) || (reg_id == S2MPS16_BUCK3))
vthr_val = 0x3 << 5;
break;
case 0x2:
if (reg_id == S2MPS16_LDO8)
s2mps16->int_vthr = 850000;
else if ((reg_id == S2MPS16_BUCK1) || (reg_id == S2MPS16_BUCK2) || (reg_id == S2MPS16_BUCK3))
vthr_val = 0x5 << 5;
break;
case 0x3:
if (reg_id == S2MPS16_LDO8)
s2mps16->int_vthr = 900000;
else if ((reg_id == S2MPS16_BUCK1) ||(reg_id == S2MPS16_BUCK3))
vthr_val = 0x6 << 5;
else if (reg_id == S2MPS16_BUCK2)
vthr_val = 0x4 << 5;
break;
}
switch (sram_delta) {
case 0x0:
if (reg_id == S2MPS16_BUCK2)
delta_val = 0x3 << 3;
else if (reg_id == S2MPS16_BUCK3)
delta_val = 0x1 << 3;
else if (reg_id == S2MPS16_BUCK1)
delta_val = 0x1 << 3;
else if (reg_id == S2MPS16_LDO8)
s2mps16->int_delta = 50000;
break;
case 0x1:
if (reg_id == S2MPS16_LDO8)
s2mps16->int_delta = 0;
else if ((reg_id == S2MPS16_BUCK1) || (reg_id == S2MPS16_BUCK2) || (reg_id == S2MPS16_BUCK3))
delta_val = 0x0 << 3;
break;
case 0x2:
if (reg_id == S2MPS16_LDO8)
s2mps16->int_delta = 75000;
else if ((reg_id == S2MPS16_BUCK1) || (reg_id == S2MPS16_BUCK2) || (reg_id == S2MPS16_BUCK3))
delta_val = 0x2 << 3;
break;
case 0x3:
if (reg_id == S2MPS16_BUCK2)
delta_val = 0x1 << 3;
else if ((reg_id == S2MPS16_BUCK3) || (reg_id == S2MPS16_BUCK1))
delta_val = 0x3 << 3;
else if (reg_id == S2MPS16_LDO8)
s2mps16->int_delta = 100000;
break;
}
if (reg_id == S2MPS16_LDO8)
return 0;
ctrl_value = vthr_val | delta_val;
ret = sec_reg_update(s2mps16->iodev, dvs_reg,
ctrl_value, 0xf8);
if (ret < 0)
goto out;
return ret;
out:
pr_warn("%s: failed to ldo dvs control\n", rdev->desc->name);
return ret;
}
static int mc34708_sw_set_normal_voltage(struct regulator_dev *reg, int minuV,
int uV)
{
unsigned int register_val = 0, register_mask = 0, register1 = 0;
int voltage, mV = uV / 1000;
int id = rdev_get_id(reg);
switch (id) {
case MC34708_SW1A:
voltage =
uv_to_bit_value(mV * 1000, SW1_MIN_UV, SW1_MAX_UV,
SW1_STEP_UV);
register_val = BITFVAL(SW1A, voltage);
register_mask = BITFMASK(SW1A);
register1 = MC34708_REG_SW1AB;
break;
case MC34708_SW1B:
voltage =
uv_to_bit_value(mV * 1000, SW1_MIN_UV, SW1_MAX_UV,
SW1_STEP_UV);
register_val = BITFVAL(SW1B, voltage);
register_mask = BITFMASK(SW1B);
register1 = MC34708_REG_SW1AB;
break;
case MC34708_SW2:
voltage =
uv_to_bit_value(mV * 1000, SW2_MIN_UV, SW2_MAX_UV,
SW2_STEP_UV);
register_val = BITFVAL(SW2, voltage);
register_mask = BITFMASK(SW2);
register1 = MC34708_REG_SW2_3;
break;
case MC34708_SW3:
voltage =
mv_to_bit_value(mV, SW3_MIN_MV, SW3_MAX_MV,
SW3_STEP_MV);
register_val = BITFVAL(SW3, voltage);
register_mask = BITFMASK(SW3);
register1 = MC34708_REG_SW2_3;
break;
case MC34708_SW4A:
if (mV < SW4_HI_2500_MV) {
voltage =
mv_to_bit_value(mV, SW4_MIN_MV, SW4_MAX_MV,
SW4_STEP_MV);
register_val =
BITFVAL(SW4A, voltage) | BITFVAL(SW4AHI, 0);
register_mask = BITFMASK(SW4A) | BITFMASK(SW4AHI);
register1 = MC34708_REG_SW4AB;
} else {
if (mV < SW4_HI_3150_MV)
register_val = BITFVAL(SW4AHI, 1);
else if (mV < SW4_HI_3300_MV)
register_val = BITFVAL(SW4AHI, 2);
else
register_val = BITFVAL(SW4AHI, 3);
register_mask = BITFMASK(SW4AHI);
register1 = MC34708_REG_SW4AB;
}
break;
case MC34708_SW4B:
if (mV < SW4_HI_2500_MV) {
voltage =
mv_to_bit_value(mV, SW4_MIN_MV, SW4_MAX_MV,
SW4_STEP_MV);
register_val =
BITFVAL(SW4B, voltage) | BITFVAL(SW4BHI, 0);
register_mask = BITFMASK(SW4B) | BITFMASK(SW4BHI);
register1 = MC34708_REG_SW4AB;
} else {
if (mV < SW4_HI_3150_MV)
register_val = BITFVAL(SW4BHI, 1);
else if (mV < SW4_HI_3300_MV)
register_val = BITFVAL(SW4BHI, 2);
else
register_val = BITFVAL(SW4BHI, 3);
register_mask = BITFMASK(SW4BHI);
register1 = MC34708_REG_SW4AB;
}
break;
case MC34708_SW5:
voltage =
mv_to_bit_value(mV, SW5_MIN_MV, SW5_MAX_MV, SW5_STEP_MV);
register_val = BITFVAL(SW5, voltage);
register_mask = BITFMASK(SW5);
register1 = MC34708_REG_SW5;
break;
default:
break;
}
return pmic_write_reg(register1, register_val, register_mask);
}
static int isl6271a_list_fixed_voltage(struct regulator_dev *dev, unsigned selector)
{
int id = rdev_get_id(dev);
return (id == 1) ? 1100000 : 1300000;
}
static int isl6271a_get_fixed_voltage(struct regulator_dev *dev)
{
int id = rdev_get_id(dev);
return (id == 1) ? 1100000 : 1300000;
}
static int s2m_set_voltage_sel_regmap_buck(struct regulator_dev *rdev,
unsigned sel)
{
int ret;
struct s2mps16_info *s2mps16 = rdev_get_drvdata(rdev);
int reg_id = rdev_get_id(rdev);
unsigned int voltage;
char name[16];
int buck2_set_val, delta_val;
/* If dvs_en = 0, dvs_pin = 1, occur BUG_ON */
if (reg_id == S2MPS16_BUCK6
&& !s2mps16->dvs_en && gpio_is_valid(s2mps16->dvs_pin)) {
BUG_ON(s2m_get_dvs_is_on());
}
/* Save cached mode buffer */
if (reg_id == S2MPS16_BUCK1 || reg_id == S2MPS16_BUCK3)
s2mps16->vsel_value[reg_id] = sel;
if ((reg_id == S2MPS16_BUCK2 || reg_id == S2MPS16_BUCK4 ||
reg_id == S2MPS16_BUCK5) && !s2mps16->buck_dvs_on)
s2mps16->vsel_value[reg_id] = sel;
/* BUCK2 Control */
if (reg_id == S2MPS16_BUCK2 && s2mps16->buck_dvs_on) {
mutex_lock(&s2mps16->lock);
if (s2mps16->buck2_dvs == 0)
delta_val = 100000;
else if (s2mps16->buck2_dvs == 1)
delta_val = 0;
else if (s2mps16->buck2_dvs == 2)
delta_val = 75000;
else if (s2mps16->buck2_dvs == 3)
delta_val = 50000;
else
delta_val = 0;
buck2_set_val = rdev->desc->min_uV + (rdev->desc->uV_step * sel);
if (delta_val + buck2_set_val <= BUCK2_ASV_MAX) {
if (!s2mps16->buck2_sync) {
ret = s2m_set_fix_ldo_voltage(rdev, 1);
if (ret < 0)
goto out;
}
} else {
if (s2mps16->buck2_sync) {
ret = s2m_set_fix_ldo_voltage(rdev, 0);
if (ret < 0)
goto out;
}
}
snprintf(name, sizeof(name), "BUCK%d", (reg_id - S2MPS16_BUCK1) + 1);
voltage = (sel * S2MPS16_BUCK_STEP1) + S2MPS16_BUCK_MIN1;
exynos_ss_regulator(name, rdev->desc->vsel_reg, voltage, ESS_FLAG_IN);
s2mps16->vsel_value[reg_id] = sel;
ret = sec_reg_write(s2mps16->iodev, rdev->desc->vsel_reg, sel);
if (ret < 0)
goto out;
exynos_ss_regulator(name, rdev->desc->vsel_reg, voltage, ESS_FLAG_OUT);
mutex_unlock(&s2mps16->lock);
return ret;
}
if ((reg_id == S2MPS16_BUCK4 || reg_id == S2MPS16_BUCK5) && s2mps16->buck_dvs_on) {
mutex_lock(&s2mps16->lock);
ret = s2m_set_max_int_voltage(rdev, sel);
if (ret < 0)
goto out;
mutex_unlock(&s2mps16->lock);
return ret;
}
/* voltage information logging to snapshot feature */
snprintf(name, sizeof(name), "BUCK%d", (reg_id - S2MPS16_BUCK1) + 1);
if (reg_id == S2MPS16_BUCK8 || reg_id == S2MPS16_BUCK9){
voltage = (sel * S2MPS16_BUCK_STEP2) + S2MPS16_BUCK_MIN2;
dev_info(&rdev->dev, ":BUCK%d voltage :%d \n",
(reg_id - S2MPS16_BUCK1) + 1, voltage);
} else
voltage = (sel * S2MPS16_BUCK_STEP1) + S2MPS16_BUCK_MIN1;
exynos_ss_regulator(name, rdev->desc->vsel_reg, voltage, ESS_FLAG_IN);
ret = sec_reg_write(s2mps16->iodev, rdev->desc->vsel_reg, sel);
if (ret < 0)
goto i2c_out;
exynos_ss_regulator(name, rdev->desc->vsel_reg, voltage, ESS_FLAG_OUT);
if (rdev->desc->apply_bit)
ret = sec_reg_update(s2mps16->iodev, rdev->desc->apply_reg,
rdev->desc->apply_bit,
rdev->desc->apply_bit);
return ret;
out:
mutex_unlock(&s2mps16->lock);
i2c_out:
pr_warn("%s: failed to set voltage_sel_regmap\n", rdev->desc->name);
exynos_ss_regulator(name, rdev->desc->vsel_reg, voltage, ESS_FLAG_ON);
return ret;
}
static int saw_set_voltage(struct regulator_dev *rdev, int min_uV, int max_uV,
unsigned *selector)
{
struct saw_vreg *vreg = rdev_get_drvdata(rdev);
int uV = min_uV;
int rc;
u8 vprog, band;
if (uV < FTSMPS_BAND1_UV_MIN && max_uV >= FTSMPS_BAND1_UV_MIN)
uV = FTSMPS_BAND1_UV_MIN;
if (uV < FTSMPS_BAND1_UV_MIN || uV > FTSMPS_BAND3_UV_MAX) {
pr_err("%s: request v=[%d, %d] is outside possible "
"v=[%d, %d]\n", vreg->name, min_uV, max_uV,
FTSMPS_BAND1_UV_MIN, FTSMPS_BAND3_UV_MAX);
return -EINVAL;
}
/* Round up for set points in the gaps between bands. */
if (uV > FTSMPS_BAND1_UV_MAX && uV < FTSMPS_BAND2_UV_MIN)
uV = FTSMPS_BAND2_UV_MIN;
else if (uV > FTSMPS_BAND2_UV_MAX
&& uV < FTSMPS_BAND3_UV_SET_POINT_MIN)
uV = FTSMPS_BAND3_UV_SET_POINT_MIN;
if (uV > FTSMPS_BAND2_UV_MAX) {
vprog = (uV - FTSMPS_BAND3_UV_MIN + FTSMPS_BAND3_UV_STEP - 1)
/ FTSMPS_BAND3_UV_STEP;
band = FTSMPS_VCTRL_BAND_3;
uV = FTSMPS_BAND3_UV_MIN + vprog * FTSMPS_BAND3_UV_STEP;
} else if (uV > FTSMPS_BAND1_UV_MAX) {
vprog = (uV - FTSMPS_BAND2_UV_MIN + FTSMPS_BAND2_UV_STEP - 1)
/ FTSMPS_BAND2_UV_STEP;
band = FTSMPS_VCTRL_BAND_2;
uV = FTSMPS_BAND2_UV_MIN + vprog * FTSMPS_BAND2_UV_STEP;
} else {
vprog = (uV - FTSMPS_BAND1_UV_MIN
+ FTSMPS_BAND1_UV_LOG_STEP - 1)
/ FTSMPS_BAND1_UV_LOG_STEP;
uV = FTSMPS_BAND1_UV_MIN + vprog * FTSMPS_BAND1_UV_LOG_STEP;
vprog *= FTSMPS_BAND1_UV_LOG_STEP / FTSMPS_BAND1_UV_PHYS_STEP;
band = FTSMPS_VCTRL_BAND_1;
}
if (uV > max_uV) {
pr_err("%s: request v=[%d, %d] cannot be met by any setpoint\n",
vreg->name, min_uV, max_uV);
return -EINVAL;
}
rc = msm_spm_set_vdd(rdev_get_id(rdev), band | vprog);
if (!rc) {
if (uV > vreg->uV) {
/* Wait for voltage to stabalize. */
udelay((uV - vreg->uV) / REGULATOR_SLEW_RATE);
}
vreg->uV = uV;
} else {
pr_err("%s: msm_spm_set_vdd failed %d\n", vreg->name, rc);
}
return rc;
}
static int max8986_regulator_is_enabled(struct regulator_dev *rdev)
{
struct max8986_regl_priv *regl_priv = rdev_get_drvdata(rdev);
int id = rdev_get_id(rdev);
return _max8986_regulator_is_enabled(regl_priv, id);
}
static int s2m_set_max_int_voltage(struct regulator_dev *rdev, unsigned sel)
{
struct s2mps16_info *s2mps16 = rdev_get_drvdata(rdev);
int ret, ldo_sel;
int buck_val, int_max = 0;
int reg_id = rdev_get_id(rdev);
unsigned int old_sel_buck = 0, old_val_buck, old_val_ldo, buck_delay = 0, target_val;
char name[16];
if (reg_id == S2MPS16_BUCK4) { /*INT*/
old_sel_buck = s2mps16->buck4_sel;
s2mps16->buck4_sel = sel;
} else if (reg_id == S2MPS16_BUCK5) { /*DISP_CAM*/
old_sel_buck = s2mps16->buck5_sel;
s2mps16->buck5_sel = sel;
}
old_val_buck = rdev->desc->min_uV + (rdev->desc->uV_step * old_sel_buck);
old_val_ldo = s2mps16->int_max;
buck_val = rdev->desc->min_uV + (rdev->desc->uV_step * sel);
target_val = buck_val + s2mps16->int_delta;
if (target_val > LDO8_MAX)
target_val = LDO8_MAX;
if (target_val > s2mps16->int_max) { /* UP */
ldo_sel = DIV_ROUND_UP(target_val - regulators[s2mps16->desc_type][S2MPS16_LDO8].min_uV,
regulators[s2mps16->desc_type][S2MPS16_LDO8].uV_step);
if (ldo_sel < 0)
goto out;
/* Update int_max */
s2mps16->int_max = target_val;
exynos_ss_regulator("LDO8", S2MPS16_REG_L8CTRL, target_val, ESS_FLAG_IN);
ret = sec_reg_update(s2mps16->iodev, S2MPS16_REG_L8CTRL, ldo_sel, 0x3f);
if (ret < 0) {
exynos_ss_regulator("LDO8", S2MPS16_REG_L8CTRL, target_val, ESS_FLAG_ON);
goto out;
}
exynos_ss_regulator("LDO8", S2MPS16_REG_L8CTRL, target_val, ESS_FLAG_OUT);
udelay(DIV_ROUND_UP((s2mps16->int_max - old_val_ldo), 12000));
snprintf(name, sizeof(name), "BUCK%d", (reg_id - S2MPS16_BUCK1) + 1);
exynos_ss_regulator(name, rdev->desc->vsel_reg, buck_val, ESS_FLAG_IN);
s2mps16->vsel_value[reg_id] = sel;
ret = sec_reg_write(s2mps16->iodev, rdev->desc->vsel_reg, sel);
if (ret < 0) {
exynos_ss_regulator(name, rdev->desc->vsel_reg, buck_val, ESS_FLAG_ON);
goto out;
}
exynos_ss_regulator(name, rdev->desc->vsel_reg, buck_val, ESS_FLAG_OUT);
} else {
if (buck_val < old_val_buck)
buck_delay = DIV_ROUND_UP((old_val_buck - buck_val),
rdev->constraints->ramp_delay);
else
buck_delay = DIV_ROUND_UP((buck_val- old_val_buck),
rdev->constraints->ramp_delay);
snprintf(name, sizeof(name), "BUCK%d", (reg_id - S2MPS16_BUCK1) + 1);
exynos_ss_regulator(name, rdev->desc->vsel_reg, buck_val, ESS_FLAG_IN);
s2mps16->vsel_value[reg_id] = sel;
ret = sec_reg_write(s2mps16->iodev, rdev->desc->vsel_reg, sel);
if (ret < 0) {
exynos_ss_regulator(name, rdev->desc->vsel_reg, buck_val, ESS_FLAG_ON);
goto out;
}
exynos_ss_regulator(name, rdev->desc->vsel_reg, buck_val, ESS_FLAG_OUT);
udelay(buck_delay);
int_max = s2m_get_max_int_voltage(s2mps16);
if (s2mps16->int_max != int_max) {
s2mps16->int_max = int_max;
ret = DIV_ROUND_UP(int_max -
regulators[s2mps16->desc_type][S2MPS16_LDO8].min_uV,
regulators[s2mps16->desc_type][S2MPS16_LDO8].uV_step);
if (ret < 0)
goto out;
exynos_ss_regulator("LDO8", S2MPS16_REG_L8CTRL, int_max, ESS_FLAG_IN);
ret = sec_reg_update(s2mps16->iodev, S2MPS16_REG_L8CTRL,
ret, 0x3f);
exynos_ss_regulator("LDO8", S2MPS16_REG_L8CTRL, int_max, ESS_FLAG_OUT);
if (ret < 0)
goto out;
udelay(DIV_ROUND_UP((old_val_ldo - s2mps16->int_max), 12000));
}
}
return ret;
out:
pr_warn("%s: failed to set the max int voltage\n", __func__);
return ret;
}
static int mc34708_sw_get_normal_voltage(struct regulator_dev *reg)
{
unsigned int register_val = 0;
int voltage = 0, mV = 0;
int id = rdev_get_id(reg);
switch (id) {
case MC34708_SW1A:
CHECK_ERROR(pmic_read_reg(MC34708_REG_SW1AB,
®ister_val, PMIC_ALL_BITS));
voltage = BITFEXT(register_val, SW1A);
mV = bit_value_to_uv(voltage, SW1_MIN_UV, SW1_STEP_UV) / 1000;
break;
case MC34708_SW1B:
CHECK_ERROR(pmic_read_reg(MC34708_REG_SW1AB,
®ister_val, PMIC_ALL_BITS));
voltage = BITFEXT(register_val, SW1B);
mV = bit_value_to_uv(voltage, SW1_MIN_UV, SW1_STEP_UV) / 1000;
break;
case MC34708_SW2:
CHECK_ERROR(pmic_read_reg(MC34708_REG_SW2_3,
®ister_val, PMIC_ALL_BITS));
voltage = BITFEXT(register_val, SW2);
mV = bit_value_to_uv(voltage, SW2_MIN_UV, SW2_STEP_UV) / 1000;
break;
case MC34708_SW3:
CHECK_ERROR(pmic_read_reg(MC34708_REG_SW2_3,
®ister_val, PMIC_ALL_BITS));
voltage = BITFEXT(register_val, SW3);
mV = bit_value_to_mv(voltage, SW3_MIN_MV, SW3_STEP_MV);
break;
case MC34708_SW4A:
CHECK_ERROR(pmic_read_reg(MC34708_REG_SW4AB,
®ister_val, PMIC_ALL_BITS));
voltage = BITFEXT(register_val, SW4AHI);
if (voltage == 0) {
voltage = BITFEXT(register_val, SW4A);
mV = bit_value_to_mv(voltage, SW4_MIN_MV, SW4_STEP_MV);
} else if (voltage == 1)
mV = SW4_HI_2500_MV;
else if (voltage == 2)
mV = SW4_HI_3150_MV;
else
mV = SW4_HI_3300_MV;
break;
case MC34708_SW4B:
CHECK_ERROR(pmic_read_reg(MC34708_REG_SW4AB,
®ister_val, PMIC_ALL_BITS));
voltage = BITFEXT(register_val, SW4BHI);
if (voltage == 0) {
voltage = BITFEXT(register_val, SW4B);
mV = bit_value_to_mv(voltage, SW4_MIN_MV, SW4_STEP_MV);
} else if (voltage == 1)
mV = SW4_HI_2500_MV;
else if (voltage == 2)
mV = SW4_HI_3150_MV;
else
mV = SW4_HI_3300_MV;
break;
case MC34708_SW5:
CHECK_ERROR(pmic_read_reg(MC34708_REG_SW5,
®ister_val, PMIC_ALL_BITS));
voltage = BITFEXT(register_val, SW5);
mV = bit_value_to_mv(voltage, SW5_MIN_MV, SW5_STEP_MV);
break;
default:
break;
}
if (mV == 0)
return -EINVAL;
else
return mV * 1000;
}
int da9052_ldo_buck_set_voltage(struct regulator_dev *rdev,
int min_uV, int max_uV)
{
struct da9052_regulator_priv *priv = rdev_get_drvdata(rdev);
struct da9052_ssc_msg ssc_msg;
int id = rdev_get_id(rdev);
int ret;
int ldo_volt = 0;
/* KPIT - Below if condition is there for added setvoltage attribute
in sysfs */
if (0 == max_uV)
max_uV = da9052_regulators[id].reg_const.max_uV;
/* Compare voltage range */
if (min_uV > max_uV)
return -EINVAL;
/* Check Minimum/ Maximum voltage range */
if (min_uV < da9052_regulators[id].reg_const.min_uV ||
min_uV > da9052_regulators[id].reg_const.max_uV)
return -EINVAL;
if (max_uV < da9052_regulators[id].reg_const.min_uV ||
max_uV > da9052_regulators[id].reg_const.max_uV)
return -EINVAL;
/* Get the ldo register value */
/* Varying step size for BUCK PERI */
if ((da9052_regulators[id].reg_desc.id == DA9052_BUCK_PERI) &&
(min_uV >= DA9052_BUCK_PERI_VALUES_3000)) {
ldo_volt = (DA9052_BUCK_PERI_VALUES_3000 -
da9052_regulators[id].reg_const.min_uV)/
(da9052_regulators[id].step_uV);
ldo_volt += (min_uV - DA9052_BUCK_PERI_VALUES_3000)/
(DA9052_BUCK_PERI_STEP_ABOVE_3000);
} else{
ldo_volt = (min_uV - da9052_regulators[id].reg_const.min_uV)/
(da9052_regulators[id].step_uV);
/* Check for maximum value */
if ((ldo_volt * da9052_regulators[id].step_uV) +
da9052_regulators[id].reg_const.min_uV > max_uV)
return -EINVAL;
}
/* Configure LDO Voltage, CONF bits */
ssc_msg.addr = da9052_regulators[id].reg_add;
ssc_msg.data = 0;
/* Read register */
da9052_lock(priv->da9052);
ret = priv->da9052->read(priv->da9052, &ssc_msg);
if (ret) {
da9052_unlock(priv->da9052);
return -EIO;
}
ssc_msg.data = (ssc_msg.data & ~(da9052_regulators[id].mask_bits));
ssc_msg.data |= ldo_volt;
ret = priv->da9052->write(priv->da9052, &ssc_msg);
if (ret) {
da9052_unlock(priv->da9052);
return -EIO;
}
/* Set the GO LDO/BUCk bits so that the voltage changes */
ssc_msg.addr = DA9052_SUPPLY_REG;
ssc_msg.data = 0;
ret = priv->da9052->read(priv->da9052, &ssc_msg);
if (ret) {
da9052_unlock(priv->da9052);
return -EIO;
}
switch (id) {
case DA9052_LDO2:
ssc_msg.data = (ssc_msg.data | DA9052_SUPPLY_VLDO2GO);
break;
case DA9052_LDO3:
ssc_msg.data = (ssc_msg.data | DA9052_SUPPLY_VLDO3GO);
break;
case DA9052_BUCK_CORE:
ssc_msg.data = (ssc_msg.data | DA9052_SUPPLY_VBCOREGO);
break;
case DA9052_BUCK_PRO:
ssc_msg.data = (ssc_msg.data | DA9052_SUPPLY_VBPROGO);
break;
case DA9052_BUCK_MEM:
ssc_msg.data = (ssc_msg.data | DA9052_SUPPLY_VBMEMGO);
break;
default:
da9052_unlock(priv->da9052);
return -EINVAL;
}
ret = priv->da9052->write(priv->da9052, &ssc_msg);
if (ret) {
da9052_unlock(priv->da9052);
return -EIO;
}
da9052_unlock(priv->da9052);
return 0;
}
static int max8893_get_ldo(struct regulator_dev *rdev)
{
return rdev_get_id(rdev);
}
static int s5m8751_regulator_get_voltage(struct regulator_dev *rdev)
{
struct s5m8751_regulator *regulator = rdev_get_drvdata(rdev);
struct s5m8751 *s5m8751 = regulator->s5m8751;
int ret;
int volt_reg, regu = rdev_get_id(rdev);
uint8_t mask, val;
switch (regu) {
case S5M8751_LDO1:
volt_reg = S5M8751_LDO1_VSET;
mask = S5M8751_LDO1_VSET_MASK;
break;
case S5M8751_LDO2:
volt_reg = S5M8751_LDO2_VSET;
mask = S5M8751_LDO2_VSET_MASK;
break;
case S5M8751_LDO3:
volt_reg = S5M8751_LDO3_VSET;
mask = S5M8751_LDO3_VSET_MASK;
break;
case S5M8751_LDO4:
volt_reg = S5M8751_LDO4_VSET;
mask = S5M8751_LDO4_VSET_MASK;
break;
case S5M8751_LDO5:
volt_reg = S5M8751_LDO5_VSET;
mask = S5M8751_LDO5_VSET_MASK;
break;
case S5M8751_LDO6:
volt_reg = S5M8751_LDO6_VSET;
mask = S5M8751_LDO6_VSET_MASK;
break;
case S5M8751_BUCK1_1:
volt_reg = S5M8751_BUCK1_V1_SET;
mask = S5M8751_BUCK1_V1_SET_MASK;
break;
case S5M8751_BUCK1_2:
volt_reg = S5M8751_BUCK1_V2_SET;
mask = S5M8751_BUCK1_V2_SET_MASK;
break;
case S5M8751_BUCK2_1:
volt_reg = S5M8751_BUCK2_V1_SET;
mask = S5M8751_BUCK2_V1_SET_MASK;
break;
case S5M8751_BUCK2_2:
volt_reg = S5M8751_BUCK2_V2_SET;
mask = S5M8751_BUCK2_V2_SET_MASK;
break;
default:
return -EINVAL;
}
ret = s5m8751_reg_read(s5m8751, volt_reg, &val);
if (ret)
goto out;
val &= mask;
ret = s5m8751_val_to_mvolts(val, info[regu].min_vol,
info[regu].step_vol) * 1000;
out:
return ret;
}
static int max8660_dcdc_disable(struct regulator_dev *rdev)
{
struct max8660 *max8660 = rdev_get_drvdata(rdev);
u8 mask = (rdev_get_id(rdev) == MAX8660_V3) ? ~1 : ~4;
return max8660_write(max8660, MAX8660_OVER1, mask, 0);
}
/* Specifies the PMIC internal slew rate in uV/us. */
#define REGULATOR_SLEW_RATE 1250
static int pmic8901_rev;
static int saw_set_voltage(struct regulator_dev *dev, int min_uV, int max_uV)
{
/* Initialize min_uV to minimum possible set point value */
static int prev_min_uV[NR_CPUS] = {
[0 ... NR_CPUS - 1] = MIN_CORE_VOLTAGE
};
int rc, delay = 0, id;
u8 vlevel, band;
/* Calculate a time value to delay for so that voltage can stabalize. */
id = rdev_get_id(dev);
if (id >= 0 && id < num_possible_cpus()) {
if (min_uV > prev_min_uV[id])
delay = (min_uV - prev_min_uV[id]) /
REGULATOR_SLEW_RATE;
prev_min_uV[id] = min_uV;
}
/*
* Scale down setpoint for PMIC 8901 v1 as it outputs a voltage
* that is ~10% higher than the setpoint for SMPS regulators
*/
if (pmic8901_rev <= 0)
pmic8901_rev = pm8901_rev(NULL);
if (IS_PMIC_8901_V1(pmic8901_rev))
