static int __init tegra_mc_timing_init(void) { #if defined(CONFIG_ARCH_TEGRA_14x_SOC) u32 reg = readl(mc + MC_EMEM_ARB_HYSTERESIS_2); reg &= ~HYST_DISPLAYD; writel(reg, mc + MC_EMEM_ARB_HYSTERESIS_2); #endif tegra_mc_timing_save(); return 0; }
static int __init tegra_mc_timing_init(void) { tegra_mc_timing_save(); return 0; }