void vPortTaskIdle(void)
{
/* Wait Untill a task was in ready state */
vPortEnableInterrupt();
/* vPortSetIpl(0); */
while(OSCurTsk == INVALID_TASK);
vPortDispatch();
}
/* This is a default implementation of what is otherwise an application defined
callback function used to install the tick interrupt handler. It is provided as
an application callback because the kernel will run on lots of different
MicroBlaze and FPGA configurations - not all of which will have the same timer
peripherals defined or available. vApplicationSetupTimerInterrupt() is declared
as a weak symbol, allowing the application writer to provide their own
implementation, if this default implementation is not suitable. */
void vApplicationSetupTimerInterrupt( void )
{
portBASE_TYPE xStatus;
const unsigned char ucTickTimerCounterNumber = ( unsigned char ) 0U;
const unsigned char ucRunTimeStatsCounterNumber = ( unsigned char ) 1U;
const unsigned long ulCounterValue = ( ( XPAR_TMRCTR_0_CLOCK_FREQ_HZ / configTICK_RATE_HZ ) - 1UL );
extern void vPortTickISR( void *pvUnused );
/* Initialise the timer/counter. */
xStatus = XTmrCtr_Initialize( &xTickTimerInstance, XPAR_TMRCTR_0_DEVICE_ID );
if( xStatus == XST_SUCCESS )
{
/* Install the tick interrupt handler as the timer ISR.
*NOTE* The xPortInstallInterruptHandler() API function must be used for
this purpose. */
xStatus = xPortInstallInterruptHandler( XPAR_INTC_0_TMRCTR_0_VEC_ID, vPortTickISR, NULL );
}
if( xStatus == pdPASS )
{
/* Enable the timer interrupt in the interrupt controller.
*NOTE* The vPortEnableInterrupt() API function must be used for this
purpose. */
vPortEnableInterrupt( XPAR_INTC_0_TMRCTR_0_VEC_ID );
/* Configure the timer interrupt handler. This installs the handler
directly, rather than through the Xilinx driver. This is done for
efficiency. */
XTmrCtr_SetHandler( &xTickTimerInstance, ( void * ) vPortTickISR, NULL );
/* Set the correct period for the timer. */
XTmrCtr_SetResetValue( &xTickTimerInstance, ucTickTimerCounterNumber, ulCounterValue );
/* Enable the interrupts. Auto-reload mode is used to generate a
periodic tick. Note that interrupts are disabled when this function is
called, so interrupts will not start to be processed until the first
task has started to run. */
XTmrCtr_SetOptions( &xTickTimerInstance, ucTickTimerCounterNumber, ( XTC_INT_MODE_OPTION | XTC_AUTO_RELOAD_OPTION | XTC_DOWN_COUNT_OPTION ) );
/* Start the timer. */
XTmrCtr_Start( &xTickTimerInstance, ucTickTimerCounterNumber );
/* The second timer is used as the time base for the run time stats.
Auto-reload mode is used to ensure the timer does not stop. */
XTmrCtr_SetOptions( &xTickTimerInstance, ucRunTimeStatsCounterNumber, XTC_AUTO_RELOAD_OPTION );
/* Start the timer. */
XTmrCtr_Start( &xTickTimerInstance, ucRunTimeStatsCounterNumber );
}
/* Sanity check that the function executed as expected. */
configASSERT( ( xStatus == pdPASS ) );
}
/* This is an application defined callback function used to install the tick
interrupt handler. It is provided as an application callback because the kernel
will run on lots of different MicroBlaze and FPGA configurations - not all of
which will have the same timer peripherals defined or available. This example
uses the AXI Timer 0. If that is available on your hardware platform then this
example callback implementation should not require modification. The name of
the interrupt handler that should be installed is vPortTickISR(), which the
function below declares as an extern. */
void vApplicationSetupTimerInterrupt( void )
{
portBASE_TYPE xStatus;
const unsigned char ucTimerCounterNumber = ( unsigned char ) 0U;
const unsigned long ulCounterValue = ( ( TIMER_CLOCK_FREQ / configTICK_RATE_HZ ) - 1UL );
extern void vPortTickISR( void *pvUnused );
/* Initialise the timer/counter. */
xStatus = XTmrCtr_Initialize( &xTimer0Instance, TIMER_DEVICE_ID );
if (xStatus == XST_DEVICE_IS_STARTED)
{
xTimer0Instance.IsReady = XIL_COMPONENT_IS_READY;
XTmrCtr_Stop( &xTimer0Instance, TIMER_DEVICE_ID );
XTmrCtr_Reset( &xTimer0Instance, TIMER_DEVICE_ID );
xStatus = XTmrCtr_Initialize( &xTimer0Instance, TIMER_DEVICE_ID );
xStatus = XST_SUCCESS;
}
if( xStatus == XST_SUCCESS )
{
/* Install the tick interrupt handler as the timer ISR.
*NOTE* The xPortInstallInterruptHandler() API function must be used for
this purpose. */
xStatus = xPortInstallInterruptHandler(TIMER_INTR_ID, vPortTickISR, NULL );
}
if( xStatus == pdPASS )
{
/* Enable the timer interrupt in the interrupt controller.
*NOTE* The vPortEnableInterrupt() API function must be used for this
purpose. */
vPortEnableInterrupt(TIMER_INTR_ID);
/* Configure the timer interrupt handler. */
XTmrCtr_SetHandler( &xTimer0Instance, ( void * ) vPortTickISR, NULL );
/* Set the correct period for the timer. */
XTmrCtr_SetResetValue( &xTimer0Instance, ucTimerCounterNumber, ulCounterValue );
/* Enable the interrupts. Auto-reload mode is used to generate a
periodic tick. Note that interrupts are disabled when this function is
called, so interrupts will not start to be processed until the first
task has started to run. */
XTmrCtr_SetOptions( &xTimer0Instance, ucTimerCounterNumber, ( XTC_INT_MODE_OPTION | XTC_AUTO_RELOAD_OPTION | XTC_DOWN_COUNT_OPTION ) );
/* Start the timer. */
XTmrCtr_Start( &xTimer0Instance, ucTimerCounterNumber );
}
/* Sanity check that the function executed as expected. */
configASSERT( ( xStatus == pdPASS ) );
}
xComPortHandle xSerialPortInitMinimal( unsigned long ulWantedBaud, unsigned portBASE_TYPE uxQueueLength )
{
portBASE_TYPE xStatus;
/* The standard demo header file requires a baud rate to be passed into this
function. However, in this case the baud rate is configured when the
hardware is generated, leaving the ulWantedBaud parameter redundant. */
( void ) ulWantedBaud;
/* Create the queue used to hold Rx characters. */
xRxedChars = xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE ) sizeof( signed char ) );
/* If the queue was created correctly, then setup the serial port
hardware. */
if( xRxedChars != NULL )
{
xStatus = XUartLite_Initialize( &xUartLiteInstance, XPAR_UARTLITE_1_DEVICE_ID );
if( xStatus == XST_SUCCESS )
{
/* Complete initialisation of the UART and its associated
interrupts. */
XUartLite_ResetFifos( &xUartLiteInstance );
/* Install the handlers that the standard Xilinx library interrupt
service routine will call when Rx and Tx events occur
respectively. */
XUartLite_SetRecvHandler( &xUartLiteInstance, ( XUartLite_Handler ) prvRxHandler, NULL );
XUartLite_SetSendHandler( &xUartLiteInstance, ( XUartLite_Handler ) prvTxHandler, NULL );
/* Install the standard Xilinx library interrupt handler itself.
*NOTE* The xPortInstallInterruptHandler() API function must be used
for this purpose. */
xStatus = xPortInstallInterruptHandler( XPAR_INTC_0_UARTLITE_1_VEC_ID, ( XInterruptHandler ) XUartLite_InterruptHandler, &xUartLiteInstance );
/* Enable the interrupt in the peripheral. */
XUartLite_EnableIntr( xUartLiteInstance.RegBaseAddress );
/* Enable the interrupt in the interrupt controller.
*NOTE* The vPortEnableInterrupt() API function must be used for this
purpose. */
vPortEnableInterrupt( XPAR_INTC_0_UARTLITE_1_VEC_ID );
}
configASSERT( xStatus == pdPASS );
}
/* This demo file only supports a single port but something must be
returned to comply with the standard demo header file. */
return ( xComPortHandle ) 0;
}
static void prvSetupHardware( void )
{
portBASE_TYPE xStatus;
const unsigned char ucSetToOutput = 0U;
/* Initialize the GPIO for the LEDs. */
xStatus = XGpio_Initialize( &xOutputGPIOInstance, XPAR_LEDS_4BITS_DEVICE_ID );
if( xStatus == XST_SUCCESS )
{
/* All bits on this channel are going to be outputs (LEDs). */
XGpio_SetDataDirection( &xOutputGPIOInstance, ulGPIOOutputChannel, ucSetToOutput );
/* Start with all LEDs off. */
ucGPIOState = 0U;
XGpio_DiscreteWrite( &xOutputGPIOInstance, ulGPIOOutputChannel, ucGPIOState );
}
/* Initialise the GPIO for the button inputs. */
if( xStatus == XST_SUCCESS )
{
xStatus = XGpio_Initialize( &xInputGPIOInstance, XPAR_PUSH_BUTTONS_4BITS_DEVICE_ID );
}
if( xStatus == XST_SUCCESS )
{
/* Install the handler defined in this task for the button input.
*NOTE* The FreeRTOS defined xPortInstallInterruptHandler() API function
must be used for this purpose. */
xStatus = xPortInstallInterruptHandler( XPAR_MICROBLAZE_0_INTC_PUSH_BUTTONS_4BITS_IP2INTC_IRPT_INTR, prvButtonInputInterruptHandler, NULL );
if( xStatus == pdPASS )
{
/* Set buttons to input. */
XGpio_SetDataDirection( &xInputGPIOInstance, ulGPIOInputChannel, ~( ucSetToOutput ) );
/* Enable the button input interrupts in the interrupt controller.
*NOTE* The vPortEnableInterrupt() API function must be used for this
purpose. */
vPortEnableInterrupt( XPAR_MICROBLAZE_0_INTC_PUSH_BUTTONS_4BITS_IP2INTC_IRPT_INTR );
/* Enable GPIO channel interrupts. */
XGpio_InterruptEnable( &xInputGPIOInstance, ulGPIOInputChannel );
XGpio_InterruptGlobalEnable( &xInputGPIOInstance );
}
}
configASSERT( ( xStatus == pdPASS ) );
}
/**
* In this function, the hardware should be initialized.
* Called from ethernetif_init().
*
* @param pxNetIf the already initialized lwip network interface structure
* for this etherpxNetIf
*/
static void prvLowLevelInit( struct netif *pxNetIf )
{
portBASE_TYPE xStatus;
extern void vInitialisePHY( XEmacLite *xemaclitep );
unsigned portBASE_TYPE uxOriginalPriority;
/* Hardware initialisation can take some time, so temporarily lower the
task priority to ensure other functionality is not adversely effected.
The priority will get raised again before this function exits. */
uxOriginalPriority = uxTaskPriorityGet( NULL );
vTaskPrioritySet( NULL, tskIDLE_PRIORITY );
/* set MAC hardware address length */
pxNetIf->hwaddr_len = ETHARP_HWADDR_LEN;
/* set MAC hardware address */
pxNetIf->hwaddr[ 0 ] = configMAC_ADDR0;
pxNetIf->hwaddr[ 1 ] = configMAC_ADDR1;
pxNetIf->hwaddr[ 2 ] = configMAC_ADDR2;
pxNetIf->hwaddr[ 3 ] = configMAC_ADDR3;
pxNetIf->hwaddr[ 4 ] = configMAC_ADDR4;
pxNetIf->hwaddr[ 5 ] = configMAC_ADDR5;
/* device capabilities */
pxNetIf->flags = NETIF_FLAG_BROADCAST | NETIF_FLAG_ETHARP | NETIF_FLAG_LINK_UP;
/* maximum transfer unit */
pxNetIf->mtu = netifMAX_MTU;
/* Broadcast capability */
pxNetIf->flags = NETIF_FLAG_BROADCAST | NETIF_FLAG_ETHARP | NETIF_FLAG_LINK_UP;
/* Initialize the mac */
xStatus = XEmacLite_Initialize( &xEMACInstance, XPAR_EMACLITE_0_DEVICE_ID );
if( xStatus == XST_SUCCESS )
{
/* Set mac address */
XEmacLite_SetMacAddress( &xEMACInstance, ( Xuint8* )( pxNetIf->hwaddr ) );
/* Flush any frames already received */
XEmacLite_FlushReceive( &xEMACInstance );
/* Set Rx, Tx interrupt handlers */
XEmacLite_SetRecvHandler( &xEMACInstance, ( void * ) pxNetIf, prvRxHandler );
XEmacLite_SetSendHandler( &xEMACInstance, NULL, prvTxHandler );
/* Enable Rx, Tx interrupts */
XEmacLite_EnableInterrupts( &xEMACInstance );
/* Install the standard Xilinx library interrupt handler itself.
*NOTE* The xPortInstallInterruptHandler() API function must be used
for this purpose. */
xStatus = xPortInstallInterruptHandler( XPAR_INTC_0_EMACLITE_0_VEC_ID, ( XInterruptHandler ) XEmacLite_InterruptHandler, &xEMACInstance );
vInitialisePHY( &xEMACInstance );
/* Enable the interrupt in the interrupt controller.
*NOTE* The vPortEnableInterrupt() API function must be used for this
purpose. */
vPortEnableInterrupt( XPAR_INTC_0_EMACLITE_0_VEC_ID );
}
/* Reset the task priority back to its original value. */
vTaskPrioritySet( NULL, uxOriginalPriority );
configASSERT( xStatus == pdPASS );
}
static err_t low_level_init(struct netif *netif)
{
struct xemac_s *xemac;
XEmacLite_Config *config;
XEmacLite *xemaclitep;
struct xtopology_t *xtopologyp;
xemacliteif_s *xemacliteif;
unsigned link_speed = 1000;
xemaclitep = mem_malloc(sizeof *xemaclitep);
#ifndef XLWIP_CONFIG_INCLUDE_EMACLITE_ON_ZYNQ
#if XPAR_INTC_0_HAS_FAST == 1
xemaclitep_fast = xemaclitep;
#endif
#endif
if (xemaclitep == NULL) {
LWIP_DEBUGF(NETIF_DEBUG, ("xemacliteif_init: out of memory\r\n"));
return ERR_MEM;
}
xemac = mem_malloc(sizeof *xemac);
if (xemac == NULL) {
LWIP_DEBUGF(NETIF_DEBUG, ("xemacliteif_init: out of memory\r\n"));
return ERR_MEM;
}
xemacliteif = mem_malloc(sizeof *xemacliteif);
if (xemacliteif == NULL) {
LWIP_DEBUGF(NETIF_DEBUG, ("xemacliteif_init: out of memory\r\n"));
return ERR_MEM;
}
/* obtain pointer to topology structure for this emac */
xemac->topology_index = xtopology_find_index((unsigned)(netif->state));
xtopologyp = &xtopology[xemac->topology_index];
/* obtain config of this emaclite */
config = xemaclite_lookup_config((unsigned)(netif->state));
/* maximum transfer unit */
netif->mtu = XEL_MTU_SIZE;
/* broadcast capability */
netif->flags = NETIF_FLAG_BROADCAST | NETIF_FLAG_ETHARP | NETIF_FLAG_LINK_UP;
/* initialize the mac */
XEmacLite_Initialize(xemaclitep, config->DeviceId);
xemaclitep->NextRxBufferToUse = 0;
#if XLWIP_CONFIG_INCLUDE_EMACLITE_ON_ZYNQ == 1
XScuGic_RegisterHandler(xtopologyp->scugic_baseaddr,
xtopologyp->intc_emac_intr,
(Xil_ExceptionHandler)XEmacLite_InterruptHandler,
xemaclitep);
XScuGic_SetPriTrigTypeByDistAddr(INTC_DIST_BASE_ADDR,
xtopologyp->intc_emac_intr,
EMACLITE_INTR_PRIORITY_SET_IN_GIC,
TRIG_TYPE_RISING_EDGE_SENSITIVE);
XScuGic_EnableIntr(INTC_DIST_BASE_ADDR,
xtopologyp->intc_emac_intr);
#else
#if NO_SYS
#if XPAR_INTC_0_HAS_FAST == 1
XIntc_RegisterFastHandler(xtopologyp->intc_baseaddr,
xtopologyp->intc_emac_intr,
(XFastInterruptHandler)XEmacLite_FastInterruptHandler);
#else
XIntc_RegisterHandler(xtopologyp->intc_baseaddr,
xtopologyp->intc_emac_intr,
(XInterruptHandler)XEmacLite_InterruptHandler,
xemaclitep);
#endif
#else
xPortInstallInterruptHandler( XPAR_INTC_0_EMACLITE_0_VEC_ID, ( XInterruptHandler ) XEmacLite_InterruptWrapper, xemaclitep );
vPortEnableInterrupt( XPAR_INTC_0_EMACLITE_0_VEC_ID );
#endif
#endif
/* set mac address */
XEmacLite_SetMacAddress(xemaclitep, (unsigned char*)(netif->hwaddr));
/* flush any frames already received */
XEmacLite_FlushReceive(xemaclitep);
/* set Rx, Tx interrupt handlers */
XEmacLite_SetRecvHandler(xemaclitep, (void *)(xemac), xemacif_recv_handler);
XEmacLite_SetSendHandler(xemaclitep, (void *)(xemac), xemacif_send_handler);
/* enable Rx, Tx interrupts */
XEmacLite_EnableInterrupts(xemaclitep);
#if !NO_SYS
sys_sem_new(&xemac->sem_rx_data_available, 0);
#endif
/* replace the state in netif (currently the base address of emaclite)
* with the xemacliteif instance pointer.
* this contains a pointer to the config table entry
*/
xemac->type = xemac_type_xps_emaclite;
xemac->state = (void *)xemacliteif;
netif->state = (void *)xemac;
xemacliteif->instance = xemaclitep;
xemacliteif->recv_q = pq_create_queue();
if (!xemacliteif->recv_q)
return ERR_MEM;
xemacliteif->send_q = pq_create_queue();
if (!xemacliteif->send_q)
return ERR_MEM;
/* Initialize PHY */
/* set PHY <--> MAC data clock */
#ifdef CONFIG_LINKSPEED_AUTODETECT
link_speed = get_IEEE_phy_speed_emaclite(xemaclitep);
xil_printf("auto-negotiated link speed: %d\r\n", link_speed);
#elif defined(CONFIG_LINKSPEED1000)
xil_printf("Link speed of 1000 Mbps not possible\r\n");
#elif defined(CONFIG_LINKSPEED100)
link_speed = 100;
configure_IEEE_phy_speed_emaclite(xemaclitep, link_speed);
xil_printf("link speed: %d\r\n", link_speed);
#elif defined(CONFIG_LINKSPEED10)
link_speed = 10;
configure_IEEE_phy_speed_emaclite(xemaclitep, link_speed);
xil_printf("link speed: %d\r\n", link_speed);
#endif
return ERR_OK;
}
