/*! \brief Main function. */ int main(void) { /* Initialize the board. * The board-specific conf_board.h file contains the configuration of * the board initialization. */ board_init(); sysclk_init(); sleepmgr_init(); irq_initialize_vectors(); cpu_irq_enable(); /* Configure the XCL module: * - Asynchronous mode usage (locks Power Down sleep mode) * - Configure XCL to use XMEGA port D * - Configure LUT in 1 LUTs with 3 differents inputs * - LUT IN0 input on pin 2 or port D * - LUT IN1 input on XCL LUT OUT1 * - LUT OUT0 output on pin 4 or port D * - LUT IN2 input on pin 1 or port D * - LUT IN3 input on pin 3 or port D * - LUT OUT1 output on LUT IN1 * - No time Delay for both LUT0 and LUT1 * - LUT0 performs XOR operation * - LUT1 performs XOR operation */ xcl_enable(XCL_ASYNCHRONOUS); xcl_port(PD); xcl_lut_type(LUT_1LUT3IN); xcl_lut_in0(LUT_IN_PINL); xcl_lut_in1(LUT_IN_XCL); xcl_lut_in2(LUT_IN_PINL); xcl_lut_in3(LUT_IN_PINL); xcl_lut0_output(LUT0_OUT_PIN4); xcl_lut_config_delay(DLY11, LUT_DLY_DISABLE, LUT_DLY_DISABLE); xcl_lut0_truth(XOR); xcl_lut1_truth(XOR); /* * main loop simply enters sleep mode */ while (true) { sleepmgr_enter_sleep(); } }
/*! \brief Main function. */ int main(void) { uint8_t encoded_message[] = { 0xF2, 0xF5, 0xAB, 0x97, 0x96, 0x8C, 0xDF, 0x96, 0x91, 0xDF, 0x9E, 0x91, 0xDF, 0x9A, 0x91, 0x9C, 0x90, 0x9B, 0x9A, 0x9B, 0xDF, 0x92, 0x9A, 0x8C, 0x8C, 0x9E, 0x98, 0x9A, 0xDF, 0x8C, 0x9A, 0x91, 0x8B, 0xDF, 0x99, 0x8D, 0x90, 0x92, 0xDF, 0xA7, 0xB2, 0xBA, 0xB8, 0xBE, 0xDF, 0xAA, 0xAC, 0xBE, 0xAD, 0xAB, 0xDE }; uint8_t i; /* Initialize the board. * The board-specific conf_board.h file contains the configuration of * the board initialization. */ board_init(); sysclk_init(); pmic_init(); cpu_irq_enable(); sleepmgr_init(); sleepmgr_lock_mode(SLEEPMGR_STDBY); /* USART options. */ static usart_xmegae_rs232_options_t USART_SERIAL_OPTIONS = { .baudrate = USART_SERIAL_EXAMPLE_BAUDRATE, .charlength = USART_SERIAL_CHAR_LENGTH, .paritytype = USART_SERIAL_PARITY, .stopbits = USART_SERIAL_STOP_BIT, .start_frame_detection = false, .one_wire = false, .pec_length = USART_SERIAL_VARIABLE_CHAR_LENGTH, .pec_action = USART_PECACT_PERC01_gc, .encoding_type = USART_DECTYPE_DATA_gc, .encoding_stream = USART_LUTACT_BOTH_gc, }; /* Initialize usart driver in RS232 mode */ usart_xmegae_init_rs232(USART_SERIAL_EXAMPLE, &USART_SERIAL_OPTIONS); usart_set_rx_interrupt_level(USART_SERIAL_EXAMPLE, USART_INT_LVL_LO); xcl_port(USART_SERIAL_XCL_PORT); xcl_lut_type(LUT_2LUT2IN); xcl_lut_in0(USART_SERIAL_LUT_IN_PIN); xcl_lut_in1(LUT_IN_XCL); xcl_lut0_output(LUT0_OUT_DISABLE); xcl_lut_config_delay(DLY11, LUT_DLY_DISABLE, LUT_DLY_DISABLE); xcl_lut0_truth(NOT_IN0); xcl_lut_in2(LUT_IN_XCL); xcl_lut_in3(LUT_IN_XCL); xcl_lut1_truth(NOT_IN3); /* Send "message header" */ for (i = 0; i < sizeof(encoded_message); i++) { usart_putchar(USART_SERIAL_EXAMPLE, encoded_message[i]); while (!usart_tx_is_complete(USART_SERIAL_EXAMPLE)) { } usart_clear_tx_complete(USART_SERIAL_EXAMPLE); } /* Incoming character is process under interrupt * main loop simply enters sleep mode */ while (true) { sleepmgr_enter_sleep(); } }
/** * \internal * \brief Test XCL Glue Logic module with 3 Inputs XOR * * This tests check the capabilty of the XCL Glue Logic Drivers to hangle * a 3 inputs XOR operation. * * \param test Current test case. */ static void run_xcl_glue_logic_3inputs_xor_test( const struct test_case *test) { port_pin_t in0, in2, in3, out0; bool out; in0 = IOPORT_CREATE_PIN(PORTD, 2); in2 = IOPORT_CREATE_PIN(PORTD, 1); in3 = IOPORT_CREATE_PIN(PORTD, 3); out0 = IOPORT_CREATE_PIN(PORTD, 4); ioport_configure_pin(in0, IOPORT_DIR_OUTPUT); ioport_configure_pin(in2, IOPORT_DIR_OUTPUT); ioport_configure_pin(in3, IOPORT_DIR_OUTPUT); /* Configure the XCL module: * - Asynchronous mode usage (locks Power Down sleep mode) * - Configure XCL to use ATxmega32E5 port D * - Configure LUT in 1 LUTs with 3 differents inputs * - LUT IN0 input on pin 2 of port D * - LUT IN1 input on XCL LUT OUT1 * - LUT OUT0 output on pin 4 of port D * - LUT IN2 input on pin 1 of port D * - LUT IN3 input on pin 3 of port D * - LUT OUT1 output on LUT IN1 * - No time Delay for both LUT0 and LUT1 * - LUT0 performs XOR operation * - LUT1 performs XOR operation */ xcl_enable(XCL_ASYNCHRONOUS); xcl_port(PD); xcl_lut_type(LUT_1LUT3IN); xcl_lut_in0(LUT_IN_PINL); xcl_lut_in1(LUT_IN_XCL); xcl_lut_in2(LUT_IN_PINL); xcl_lut_in3(LUT_IN_PINL); xcl_lut0_output(LUT0_OUT_PIN4); xcl_lut_config_delay(DLY11, LUT_DLY_DISABLE, LUT_DLY_DISABLE); xcl_lut0_truth(XOR); xcl_lut1_truth(XOR); gpio_set_pin_low(in0); gpio_set_pin_low(in2); gpio_set_pin_low(in3); asm("nop"); asm("nop"); /* give two cycles propagation delay to read the port pin */ out = ioport_get_pin_level(out0); test_assert_true(test, out == false, " XCL XOR failure"); gpio_set_pin_high(in0); gpio_set_pin_low(in2); gpio_set_pin_low(in3); asm("nop"); asm("nop"); /* give two cycles propagation delay to read the port pin */ out = ioport_get_pin_level(out0); test_assert_true(test, out == true, " XCL XOR failure"); gpio_set_pin_low(in0); gpio_set_pin_high(in2); gpio_set_pin_low(in3); asm("nop"); asm("nop"); /* give two cycles propagation delay to read the port pin */ out = ioport_get_pin_level(out0); test_assert_true(test, out == true, " XCL XOR failure"); gpio_set_pin_low(in0); gpio_set_pin_low(in2); gpio_set_pin_high(in3); asm("nop"); asm("nop"); /* give two cycles propagation delay to read the port pin */ out = ioport_get_pin_level(out0); test_assert_true(test, out == true, " XCL XOR failure"); gpio_set_pin_low(in0); gpio_set_pin_high(in2); gpio_set_pin_high(in3); asm("nop"); asm("nop"); /* give two cycles propagation delay to read the port pin */ out = ioport_get_pin_level(out0); test_assert_true(test, out == false, " XCL XOR failure"); gpio_set_pin_high(in0); gpio_set_pin_high(in2); gpio_set_pin_high(in3); asm("nop"); asm("nop"); /* give two cycles propagation delay to read the port pin */ out = ioport_get_pin_level(out0); test_assert_true(test, out == true, " XCL XOR failure"); }