+------------------------------------------------------------------------------+ 
|                                                                              |            
|                 layer[2] SoC for Spartan-3E Starter Kit                      |
|                                                                              |
+------------------------------------------------------------------------------+

   The layer[2] system-on-a-chip combines to the greatest possible extent a 
   MIPS I(tm) compatible CPU with various memories and I/O-controllers.
   The spectrum of supported memories includes (inter alia) adjacent to an 
   internal 16 kB memory, a flash-memory of 16 MB.
   The input/output capabilities of the system are realized by a PS/2 keyboard 
   controller for handling the input and a VGA-textmode-controller responsible 
   for output purposes.
   For the communication with other computer systems a RS-232 interface is used.
   
   The implementation of the hardware components was accomplished by the usage 
   of the VHDL hardware description language and furthermore these components 
   were synthesised for the Spartan-3E Starter Kit.
   Because of the compatibility with the MIPS I(tm) ISA, it is additionally 
   possible to compile software with the GCC for layer[2].

+------------------------------------------------------------------------------+
| Toolchain Setup                                                              |
+------------------------------------------------------------------------------+
   This Section helps you with setting up the toolchain appropriatly.
   
   +---------------------------------------------------------------------------+
   | cygwin                                                                    |
   +---------------------------------------------------------------------------+ 
      Installing cygwin is pretty easy. Just download the Installer from the 
      cygwin homepage.

      After you have selected a download mirror, you will be prompted a 
      "Select Packages" Window. We need Python for the upload script 
      <sw/common/upload.py> and the memory file generator script 
      <sw/common/vhd.py>, so check if its node is set to Default 
      (This should suffice).

      The Devel node contains 'make', 'subversion', 'binutils' and the 'gcc'. 
      These packages should be selected by default.
      
   +---------------------------------------------------------------------------+ 
   | ISE WebPack                                                               |
   +---------------------------------------------------------------------------+
      You can download the WebPack here if you haven't already installed it.

      The hardware build script xilinx/Makefile assumes that you have installed 
      the WebPack at "C:\Xilinx". If your installation is located somewhere 
      else, don't forget to adjust the build script.
      
   +---------------------------------------------------------------------------+   
   | pySerial                                                                  |
   +---------------------------------------------------------------------------+
      Download and extract pySerial. Open cygwin and navigate into the pySerial 
      directory. Type

            python setup.py install
            
      If you still get some error when using the upload script, you probably 
      need to install pyWin as well.
      
   +---------------------------------------------------------------------------+
   | GCC Cross Compiler                                                        |
   +---------------------------------------------------------------------------+
      Go to Cygwin Mirror Sites and download the newest source packages 
      'binutils-*-src.tar.bz', 'gcc-core-*-src.tar.bz' as well as 
      'mpfr-*-src.tar.bz'. First we define some global variables. In cygwin type
      line-by-line:

            export TARGET=mips-elf
            export PREFIX=/usr/local/$TARGET
            export PATH=$PATH:$PREFIX/bin
            
      Extract the archives into the directories 'binutils', 'gcc' and 'mpfr' 
      respectively. In cygwin go to your directory that contains the extracted 
      directories and type line-by-line:

            mkdir build-binutils
            cd build-binutils
            ../binutils/configure --target=$TARGET --prefix=$PREFIX
            make
            make install
            cd ..
            
      Next, we compile MPFR which is a prerequisite for GCC:

            mkdir build-mpfr
            cd build-mpfr
            ../mpfr/configure -–target=$TARGET -–prefix=$PREFIX
            make
            make install
            cd ..
            
      And finally, GCC:

            mkdir build-gcc
            cd build-gcc
            ../gcc/configure --with-newlib --without-headers \
            --enable-languages="c" --target=$TARGET --prefix=$PREFIX \
            --with-gnu-ld --with-gnu-as --disable-libssp --with-mpfr=$PREFIX
            make
            make install
            cd ..
            
      If the compilation ends with an error, search 'build-gcc' for the binaries
      'mips-elf-cc1.exe' and 'mips-elf-gcc.exe' and copy them manually into the 
      directory </usr/local/mips-elf/bin>

      
+------------------------------------------------------------------------------+
| User Guide                                                                   |
+------------------------------------------------------------------------------+
   The following section describes how to build and upload the hardware, the 
   bootloader and the demo software.
   
   +---------------------------------------------------------------------------+
   | Hardware                                                                  |
   +---------------------------------------------------------------------------+
      To build the hardware just navigate to <xilinx/> and enter

            make build
      
      Once completed, you can upload it onto your Starter Kit with

            make upload
      
      This just loads it directly onto your Spartan-3E. If you wish to load the 
      design to the Plattform Flash type

            make prom
      
      If nothing shows up on the display, you might accidetally erased the CPLD.
      Start the iMPACT GUI and upload <xilinx/CPLD_bypass_logic.jed> to the 
      CPLD.
      
   +---------------------------------------------------------------------------+
   | Building the Bootloader                                                   |
   +---------------------------------------------------------------------------+      
      The source for the 'void Bootloader' is located at <sw/void>. You can 
      build it with

            make standalone
            
      This will create the binary and translates it into the VHDL memory file 
      <sw/bin/data.vhd>. You need to rebuild the hardware subsequently.
      
   +---------------------------------------------------------------------------+   
   | Configuring 'upload.py'                                                   |
   +---------------------------------------------------------------------------+
      The serial port number of the upload script <sw/common/upload.py> needs to 
      be adjusted.

            34] port = 4, # 'COM5',
            
   +---------------------------------------------------------------------------+   
   | Uploading images                                                          |
   +---------------------------------------------------------------------------+
      Start layer[2] and select 'Upload image ...'. You can navigate with the 
      'ARROW UP' and 'ARROW DOWN' keys. The system now waits for some incomming 
      serial transmission.
      In cygwin switch to the directory where <sw/tennmino/> resides and type

            make upload
            
      This will build and upload the application. If everything went well, 
      you'll see the 'void Bootloader' start-up screen again.

      If you select 'View memory contents ...', you can monitor the contents of 
      the StrataFlash and the DDR. 'ARROW UP' and 'ARROW DOWN' increases or 
      decreases the starting address of the displayed memory contents 
      respectively. Press 'ESC' to return.

      With 'Start ...' the contents of the StrataFlash will be loaded to the DDR
      and the system starts the execution of the uploaded program.