README

This project presents the development of MIPS multicycle architecture, proposed by Harris & Harris' Digital Design and Computer Architecture, with Alliance VLSI tools, using a top-down approach.

Name		Name	Last commit message	Last commit date
Latest commit History 33 Commits
include		include
instructions		instructions
.gitignore		.gitignore
CATAL		CATAL
README.md		README.md
and2.vhd		and2.vhd
control_genlib.c		control_genlib.c
control_genpat.c		control_genpat.c
ctrl_aludec.vhd		ctrl_aludec.vhd
ctrl_aludec_genpat.c		ctrl_aludec_genpat.c
ctrl_fsm.vhd		ctrl_fsm.vhd
ctrl_fsm_genpat.c		ctrl_fsm_genpat.c
datapath_caps.vhd		datapath_caps.vhd
datapath_genlib.c		datapath_genlib.c
datapath_genpat.c		datapath_genpat.c
dpt_alu.vhd		dpt_alu.vhd
dpt_alu1.vhd		dpt_alu1.vhd
dpt_alu1_genpat.c		dpt_alu1_genpat.c
dpt_alu32_genlib.c		dpt_alu32_genlib.c
dpt_alu32_zero.vhd		dpt_alu32_zero.vhd
dpt_alu_genpat.c		dpt_alu_genpat.c
dpt_buffer.vhd		dpt_buffer.vhd
dpt_buffer_genpat.c		dpt_buffer_genpat.c
dpt_four.vhd		dpt_four.vhd
dpt_mux2.vhd		dpt_mux2.vhd
dpt_mux2_5b.vhd		dpt_mux2_5b.vhd
dpt_mux2_genpat.c		dpt_mux2_genpat.c
dpt_mux4.vhd		dpt_mux4.vhd
dpt_mux4_genpat.c		dpt_mux4_genpat.c
dpt_pcsl2.vhd		dpt_pcsl2.vhd
dpt_pcsl2_genpat.c		dpt_pcsl2_genpat.c
dpt_reg.vhd		dpt_reg.vhd
dpt_reg_genpat.c		dpt_reg_genpat.c
dpt_regfile.vhd		dpt_regfile.vhd
dpt_regfile_genpat.c		dpt_regfile_genpat.c
dpt_signext.vhd		dpt_signext.vhd
dpt_signext_genpat.c		dpt_signext_genpat.c
dpt_sl2.vhd		dpt_sl2.vhd
dpt_sl2_genpat.c		dpt_sl2_genpat.c
mips_genlib.c		mips_genlib.c
mips_genpat.c		mips_genpat.c
nt.vhd		nt.vhd
or2.vhd		or2.vhd

gutierrezps/mips-on-alliance-vlsi

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