/** * @brief Main program * @param None * @retval None */ int main(void) { /*!< At this stage the microcontroller clock setting is already configured, this is done through SystemInit() function which is called from startup file (startup_stm32l1xx_xx.s) before to branch to application main. To reconfigure the default setting of SystemInit() function, refer to system_stm32l1xx.c file */ /* Preconfiguration before using DAC----------------------------------------*/ DAC_PreConfig(); /* TIM2 Configuration ------------------------------------------------------*/ /* TIM2 Periph clock enable */ RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM2, ENABLE); /* Time base configuration */ TIM_TimeBaseStructInit(&TIM_TimeBaseStructure); TIM_TimeBaseStructure.TIM_Period = 0xFF; TIM_TimeBaseStructure.TIM_Prescaler = 0x0; TIM_TimeBaseStructure.TIM_ClockDivision = 0x0; TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up; TIM_TimeBaseInit(TIM2, &TIM_TimeBaseStructure); /* TIM2 TRGO selection */ TIM_SelectOutputTrigger(TIM2, TIM_TRGOSource_Update); /* TIM2 enable counter */ TIM_Cmd(TIM2, ENABLE); /* Configures Button GPIO and EXTI Line */ STM_EVAL_PBInit(BUTTON_KEY, BUTTON_MODE_EXTI); while (1) { /* If the wave form is changed */ if (WaveChange == 1) { /* Switch the selected waves forms according the Button status */ if (SelectedWavesForm == 1) { /* The sine wave and the escalator wave has been selected */ /* Sine Wave generator ---------------------------------------------*/ DAC_DeInit(); /* DAC channel1 and channel2 Configuration */ DAC_InitStructure.DAC_Trigger = DAC_Trigger_T2_TRGO; DAC_InitStructure.DAC_WaveGeneration = DAC_WaveGeneration_None; DAC_InitStructure.DAC_OutputBuffer = DAC_OutputBuffer_Enable; DMA_DeInit(DMA1_Channel3); DMA_InitStructure.DMA_PeripheralBaseAddr = DAC_DHR12R2_Address; DMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t)&Sine12bit; DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralDST; DMA_InitStructure.DMA_BufferSize = 32; DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable; DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable; DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord; DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord; DMA_InitStructure.DMA_Mode = DMA_Mode_Circular; DMA_InitStructure.DMA_Priority = DMA_Priority_High; DMA_InitStructure.DMA_M2M = DMA_M2M_Disable; DMA_Init(DMA1_Channel3, &DMA_InitStructure); /* Enable DMA1 Channel3 */ DMA_Cmd(DMA1_Channel3, ENABLE); /* DAC Channel2 Init */ DAC_Init(DAC_Channel_2, &DAC_InitStructure); /* Enable DAC Channel2 */ DAC_Cmd(DAC_Channel_2, ENABLE); /* Enable DMA for DAC Channel2 */ DAC_DMACmd(DAC_Channel_2, ENABLE); /* Escalator Wave generator ----------------------------------------*/ /* DAC channel1 Configuration */ DAC_InitStructure.DAC_OutputBuffer = DAC_OutputBuffer_Enable; DAC_Init(DAC_Channel_1, &DAC_InitStructure); /* DMA1 channel2 configuration */ DMA_DeInit(DMA1_Channel2); DMA_InitStructure.DMA_PeripheralBaseAddr = DAC_DHR8R1_Address; DMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t)&Escalator8bit; DMA_InitStructure.DMA_BufferSize = 6; DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte; DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte; DMA_Init(DMA1_Channel2, &DMA_InitStructure); /* Enable DMA1 Channel2 */ DMA_Cmd(DMA1_Channel2, ENABLE); /* Enable DAC Channel1: Once the DAC channel1 is enabled, PA.05 is automatically connected to the DAC converter. */ DAC_Cmd(DAC_Channel_1, ENABLE); /* Enable DMA for DAC Channel1 */ DAC_DMACmd(DAC_Channel_1, ENABLE); } /* The triangle wave and the noise wave has been selected */ else { /* Noise Wave generator --------------------------------------------*/ /* DAC channel1 Configuration */ DAC_InitStructure.DAC_Trigger = DAC_Trigger_T2_TRGO; DAC_InitStructure.DAC_WaveGeneration = DAC_WaveGeneration_Noise; DAC_InitStructure.DAC_LFSRUnmask_TriangleAmplitude = DAC_LFSRUnmask_Bits8_0; DAC_InitStructure.DAC_OutputBuffer = DAC_OutputBuffer_Enable; DAC_Init(DAC_Channel_1, &DAC_InitStructure); /* Enable DAC Channel1: Once the DAC channel1 is enabled, PA.04 is automatically connected to the DAC converter. */ DAC_Cmd(DAC_Channel_1, ENABLE); /* Set DAC Channel1 DHR12L register */ DAC_SetChannel1Data(DAC_Align_12b_L, 0x7FF0); /* Enable DAC channel1 wave generator */ DAC_WaveGenerationCmd(DAC_Channel_1, DAC_Wave_Noise , ENABLE); /* Triangle Wave generator -----------------------------------------*/ DAC_DeInit(); /* DAC channel2 Configuration */ DAC_InitStructure.DAC_Trigger = DAC_Trigger_T2_TRGO; DAC_InitStructure.DAC_WaveGeneration = DAC_WaveGeneration_Triangle; DAC_InitStructure.DAC_LFSRUnmask_TriangleAmplitude = DAC_TriangleAmplitude_1023; DAC_InitStructure.DAC_OutputBuffer = DAC_OutputBuffer_Enable; DAC_Init(DAC_Channel_2, &DAC_InitStructure); /* Enable DAC Channel2: Once the DAC channel2 is enabled, PA.05 is automatically connected to the DAC converter. */ DAC_Cmd(DAC_Channel_2, ENABLE); /* Set DAC channel2 DHR12RD register */ DAC_SetChannel2Data(DAC_Align_12b_R, 0x100); } WaveChange = !WaveChange; } } }
/** * @brief Read the configuration register from the LM75. * @param None * @retval LM75 configuration register value. */ uint8_t LM75_ReadConfReg(void) { uint8_t LM75_BufferRX[2] ={0,0}; /* Test on BUSY Flag */ LM75_Timeout = LM75_LONG_TIMEOUT; while (I2C_GetFlagStatus(LM75_I2C,I2C_FLAG_BUSY)) { if((LM75_Timeout--) == 0) return LM75_TIMEOUT_UserCallback(); } /* Configure DMA Peripheral */ LM75_DMA_Config(LM75_DMA_RX, (uint8_t*)LM75_BufferRX, 2); /* Enable DMA NACK automatic generation */ I2C_DMALastTransferCmd(LM75_I2C, ENABLE); /* Enable the I2C peripheral */ I2C_GenerateSTART(LM75_I2C, ENABLE); /* Test on SB Flag */ LM75_Timeout = LM75_FLAG_TIMEOUT; while (!I2C_GetFlagStatus(LM75_I2C,I2C_FLAG_SB)) { if((LM75_Timeout--) == 0) return LM75_TIMEOUT_UserCallback(); } /* Send device address for write */ I2C_Send7bitAddress(LM75_I2C, LM75_ADDR, I2C_Direction_Transmitter); /* Test on ADDR Flag */ LM75_Timeout = LM75_FLAG_TIMEOUT; while (!I2C_CheckEvent(LM75_I2C, I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED)) { if((LM75_Timeout--) == 0) return LM75_TIMEOUT_UserCallback(); } /* Send the device's internal address to write to */ I2C_SendData(LM75_I2C, LM75_REG_CONF); /* Test on TXE FLag (data sent) */ LM75_Timeout = LM75_FLAG_TIMEOUT; while ((!I2C_GetFlagStatus(LM75_I2C,I2C_FLAG_TXE)) && (!I2C_GetFlagStatus(LM75_I2C,I2C_FLAG_BTF))) { if((LM75_Timeout--) == 0) return LM75_TIMEOUT_UserCallback(); } /* Send START condition a second time */ I2C_GenerateSTART(LM75_I2C, ENABLE); /* Test on SB Flag */ LM75_Timeout = LM75_FLAG_TIMEOUT; while (!I2C_GetFlagStatus(LM75_I2C,I2C_FLAG_SB)) { if((LM75_Timeout--) == 0) return LM75_TIMEOUT_UserCallback(); } /* Send LM75 address for read */ I2C_Send7bitAddress(LM75_I2C, LM75_ADDR, I2C_Direction_Receiver); /* Test on ADDR Flag */ LM75_Timeout = LM75_FLAG_TIMEOUT; while (!I2C_CheckEvent(LM75_I2C, I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED)) { if((LM75_Timeout--) == 0) return LM75_TIMEOUT_UserCallback(); } /* Enable I2C DMA request */ I2C_DMACmd(LM75_I2C,ENABLE); /* Enable DMA RX Channel */ DMA_Cmd(LM75_DMA_RX_CHANNEL, ENABLE); /* Wait until DMA Transfer Complete */ LM75_Timeout = LM75_LONG_TIMEOUT; while (!DMA_GetFlagStatus(LM75_DMA_RX_TCFLAG)) { if((LM75_Timeout--) == 0) return LM75_TIMEOUT_UserCallback(); } /* Send STOP Condition */ I2C_GenerateSTOP(LM75_I2C, ENABLE); /* Disable DMA RX Channel */ DMA_Cmd(LM75_DMA_RX_CHANNEL, DISABLE); /* Disable I2C DMA request */ I2C_DMACmd(LM75_I2C,DISABLE); /* Clear DMA RX Transfer Complete Flag */ DMA_ClearFlag(LM75_DMA_RX_TCFLAG); /*!< Return Temperature value */ return (uint8_t)LM75_BufferRX[0]; }
/** * @brief Enables or disables the LM75. * @param NewState: specifies the LM75 new status. This parameter can be ENABLE * or DISABLE. * @retval None */ uint8_t LM75_ShutDown(FunctionalState NewState) { uint8_t LM75_BufferRX[2] ={0,0}; uint8_t LM75_BufferTX = 0; __IO uint8_t RegValue = 0; /* Test on BUSY Flag */ LM75_Timeout = LM75_LONG_TIMEOUT; while (I2C_GetFlagStatus(LM75_I2C,I2C_FLAG_BUSY)) { if((LM75_Timeout--) == 0) return LM75_TIMEOUT_UserCallback(); } /* Configure DMA Peripheral */ LM75_DMA_Config(LM75_DMA_RX, (uint8_t*)LM75_BufferRX, 2); /* Enable DMA NACK automatic generation */ I2C_DMALastTransferCmd(LM75_I2C, ENABLE); /* Enable the I2C peripheral */ I2C_GenerateSTART(LM75_I2C, ENABLE); /* Test on SB Flag */ LM75_Timeout = LM75_FLAG_TIMEOUT; while (!I2C_GetFlagStatus(LM75_I2C,I2C_FLAG_SB)) { if((LM75_Timeout--) == 0) return LM75_TIMEOUT_UserCallback(); } /* Send device address for write */ I2C_Send7bitAddress(LM75_I2C, LM75_ADDR, I2C_Direction_Transmitter); /* Test on ADDR Flag */ LM75_Timeout = LM75_FLAG_TIMEOUT; while (!I2C_CheckEvent(LM75_I2C, I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED)) { if((LM75_Timeout--) == 0) return LM75_TIMEOUT_UserCallback(); } /* Send the device's internal address to write to */ I2C_SendData(LM75_I2C, LM75_REG_CONF); /* Test on TXE FLag (data sent) */ LM75_Timeout = LM75_FLAG_TIMEOUT; while ((!I2C_GetFlagStatus(LM75_I2C,I2C_FLAG_TXE)) && (!I2C_GetFlagStatus(LM75_I2C,I2C_FLAG_BTF))) { if((LM75_Timeout--) == 0) return LM75_TIMEOUT_UserCallback(); } /* Send START condition a second time */ I2C_GenerateSTART(LM75_I2C, ENABLE); /* Test on SB Flag */ LM75_Timeout = LM75_FLAG_TIMEOUT; while (!I2C_GetFlagStatus(LM75_I2C,I2C_FLAG_SB)) { if((LM75_Timeout--) == 0) return LM75_TIMEOUT_UserCallback(); } /* Send LM75 address for read */ I2C_Send7bitAddress(LM75_I2C, LM75_ADDR, I2C_Direction_Receiver); /* Test on ADDR Flag */ LM75_Timeout = LM75_FLAG_TIMEOUT; while (!I2C_CheckEvent(LM75_I2C, I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED)) { if((LM75_Timeout--) == 0) return LM75_TIMEOUT_UserCallback(); } /* Enable I2C DMA request */ I2C_DMACmd(LM75_I2C,ENABLE); /* Enable DMA RX Channel */ DMA_Cmd(LM75_DMA_RX_CHANNEL, ENABLE); /* Wait until DMA Transfer Complete */ LM75_Timeout = LM75_LONG_TIMEOUT; while (!DMA_GetFlagStatus(LM75_DMA_RX_TCFLAG)) { if((LM75_Timeout--) == 0) return LM75_TIMEOUT_UserCallback(); } /* Send STOP Condition */ I2C_GenerateSTOP(LM75_I2C, ENABLE); /* Disable DMA RX Channel */ DMA_Cmd(LM75_DMA_RX_CHANNEL, DISABLE); /* Disable I2C DMA request */ I2C_DMACmd(LM75_I2C,DISABLE); /* Clear DMA RX Transfer Complete Flag */ DMA_ClearFlag(LM75_DMA_RX_TCFLAG); /*!< Get received data */ RegValue = (uint8_t)LM75_BufferRX[0]; /*---------------------------- Transmission Phase ---------------------------*/ /*!< Enable or disable SD bit */ if (NewState != DISABLE) { /*!< Enable LM75 */ LM75_BufferTX = RegValue & LM75_SD_RESET; } else { /*!< Disable LM75 */ LM75_BufferTX = RegValue | LM75_SD_SET; } /* Test on BUSY Flag */ LM75_Timeout = LM75_LONG_TIMEOUT; while (!I2C_GetFlagStatus(LM75_I2C,I2C_FLAG_BUSY)) { if((LM75_Timeout--) == 0) return LM75_TIMEOUT_UserCallback(); } /* Configure DMA Peripheral */ LM75_DMA_Config(LM75_DMA_TX, (uint8_t*)(&LM75_BufferTX), 1); /* Enable the I2C peripheral */ I2C_GenerateSTART(LM75_I2C, ENABLE); /* Test on SB Flag */ LM75_Timeout = LM75_FLAG_TIMEOUT; while (I2C_GetFlagStatus(LM75_I2C,I2C_FLAG_SB) == RESET) { if((LM75_Timeout--) == 0) return LM75_TIMEOUT_UserCallback(); } /* Transmit the slave address and enable writing operation */ I2C_Send7bitAddress(LM75_I2C, LM75_ADDR, I2C_Direction_Transmitter); /* Test on ADDR Flag */ LM75_Timeout = LM75_FLAG_TIMEOUT; while (!I2C_CheckEvent(LM75_I2C, I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED)) { if((LM75_Timeout--) == 0) return LM75_TIMEOUT_UserCallback(); } /* Transmit the first address for r/w operations */ I2C_SendData(LM75_I2C, LM75_REG_CONF); /* Test on TXE FLag (data sent) */ LM75_Timeout = LM75_FLAG_TIMEOUT; while ((!I2C_GetFlagStatus(LM75_I2C,I2C_FLAG_TXE)) && (!I2C_GetFlagStatus(LM75_I2C,I2C_FLAG_BTF))) { if((LM75_Timeout--) == 0) return LM75_TIMEOUT_UserCallback(); } /* Enable I2C DMA request */ I2C_DMACmd(LM75_I2C,ENABLE); /* Enable DMA TX Channel */ DMA_Cmd(LM75_DMA_TX_CHANNEL, ENABLE); /* Wait until DMA Transfer Complete */ LM75_Timeout = LM75_LONG_TIMEOUT; while (!DMA_GetFlagStatus(LM75_DMA_TX_TCFLAG)) { if((LM75_Timeout--) == 0) return LM75_TIMEOUT_UserCallback(); } /* Wait until BTF Flag is set before generating STOP */ LM75_Timeout = LM75_LONG_TIMEOUT; while ((!I2C_GetFlagStatus(LM75_I2C,I2C_FLAG_BTF))) { if((LM75_Timeout--) == 0) return LM75_TIMEOUT_UserCallback(); } /* Send STOP Condition */ I2C_GenerateSTOP(LM75_I2C, ENABLE); /* Disable DMA TX Channel */ DMA_Cmd(LM75_DMA_TX_CHANNEL, DISABLE); /* Disable I2C DMA request */ I2C_DMACmd(LM75_I2C,DISABLE); /* Clear DMA TX Transfer Complete Flag */ DMA_ClearFlag(LM75_DMA_TX_TCFLAG); return LM75_OK; }
/* returns the count of bytes still to be transmitted: blocking returns zero */ ot_int mpipe_txndef(ot_u8* data, ot_bool blocking, mpipe_priority data_priority) { #ifndef RADIO_DEBUG Twobytes crcval; ot_int data_length = data[2]; int i; data_length += 6; data_two = data[2]; if (data_priority != MPIPE_Ack) { if (mpipe.state != MPIPE_Idle) { return -1; } mpipe.priority = data_priority; mpipe.pktbuf = data; mpipe.pktlen = data_length; } data[data_length++] = mpipe.sequence.ubyte[UPPER]; data[data_length++] = mpipe.sequence.ubyte[LOWER]; // no hardware crc16 on this cpu crcval.ushort = crc_calc_block(data_length, data); data[data_length++] = crcval.ubyte[UPPER]; data[data_length++] = crcval.ubyte[LOWER]; mpipe.state = MPIPE_Tx_Wait; if (dma_running) { for (;;) asm("nop"); // starting to send when was already sending } DMA_DeInit(USART3_TX_DMA_CHANNEL); UTX_DMA_Init.DMA_BufferSize = (uint16_t)data_length; //UTX_DMA_Init.DMA_MemoryBaseAddr = (uint32_t)&data[0]; // ? is data on the stack or does it persist after return ? // if (data_length >= sizeof(mpipe_tx_buf)) { for (;;) asm("nop"); } for (i = 0; i < data_length; i++) mpipe_tx_buf[i] = data[i]; UTX_DMA_Init.DMA_MemoryBaseAddr = (uint32_t)&mpipe_tx_buf[0]; /*UTX_DMA_Init.DMA_BufferSize = (uint16_t)(sizeof(const_data)-1); UTX_DMA_Init.DMA_MemoryBaseAddr = (uint32_t)&const_data[0];*/ DMA_Init(USART3_TX_DMA_CHANNEL, &UTX_DMA_Init); DMA_ClearFlag(DMA1_FLAG_TC2); DMA_Cmd(USART3_TX_DMA_CHANNEL, ENABLE); if (blocking == True) { while (DMA_GetITStatus(DMA1_IT_TC2) == RESET) asm("nop"); mpipe_txdone(); // always return 0 on success return 0; } else { DMA_ITConfig(USART3_TX_DMA_CHANNEL, DMA_IT_TC, ENABLE); // return number of bytes being transmitted dma_running = 1; return data_length; } #endif /* !RADIO_DEBUG */ }
void DMA_I2C1MasterRead(unsigned char device_id, unsigned short mem_byte_addr, unsigned short rx_count, unsigned char *rx_data ) { unsigned char temp; unsigned short i; unsigned char *p; DMA_InitTypeDef DMA_InitStructure; p = rx_data; //I2C_Cmd(I2C1, DISABLE); I2C_Send7bitAddress(I2C1, 0xA8, I2C_Direction_Transmitter); I2C_Cmd(I2C1, ENABLE); //send byte mem addr temp = ((mem_byte_addr) & 0xff); I2CTXByte(I2C1,CMD_WRITE,temp); //tx memory addr while(1) { if(I2C_GetITStatus(I2C1, I2C_FLAG_STOP_DET)) { break; } } //I2C_Cmd(I2C1, DISABLE); I2C_Send7bitAddress(I2C1, 0xA8, I2C_Direction_Receiver); I2C_Cmd(I2C1, ENABLE); DMA_DeInit(DMA1_Channel2); /* DMA_InitStructure.DMA_PeripheralBaseAddr = (I2C1_BASE + 0x10); DMA_InitStructure.DMA_MemoryBaseAddr = 0x20004000; DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralSRC; DMA_InitStructure.DMA_BufferSize = rx_count; DMA_InitStructure.DMA_PeripheralInc = DMA_SrcInc_Disable; DMA_InitStructure.DMA_MemoryInc = DMA_DstInc_Enable; DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte; DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte; DMA_InitStructure.DMA_Mode = DMA_Mode_Hardware; DMA_InitStructure.DMA_Priority = DMA_Priority_Low; DMA_InitStructure.DMA_DST_PER = DST_PER_ACK0; DMA_InitStructure.DMA_SRC_PER = SRC_PER_ACK7; */ DMA_InitStructure.DMA_PeripheralBaseAddr = (I2C1_BASE + 0x10); DMA_InitStructure.DMA_MemoryBaseAddr =0x20004000; DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralSRC; DMA_InitStructure.DMA_BufferSize = rx_count; DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Enable; DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Disable; DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte; DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte; DMA_InitStructure.DMA_Mode = DMA_Mode_Normal; DMA_InitStructure.DMA_Priority = DMA_Priority_Low; DMA_InitStructure.DMA_M2M = DMA_M2M_Disable; DMA_Init(DMA1_Channel2, &DMA_InitStructure); DMA_Cmd(DMA1_Channel2, ENABLE); I2C_DMA_DIR = RDMAE_SET; I2C_DMACmd(I2C1, ENABLE); for(i=0;i<rx_count;i++) { I2C1->IC_DATA_CMD = 0x0100; while(1) { if(I2C_GetITStatus(I2C1, I2C_IT_TX_EMPTY)) { break; } } } DMAcheckStatus(DMA1_FLAG_TC2); DMA_Cmd(DMA1_Channel2, DISABLE); I2C_DMACmd(I2C1, DISABLE); //I2C_Cmd(I2C1, DISABLE); }
void KWPInit(void) { USART_InitTypeDef USART_InitStructure; DMA_InitTypeDef DMA_InitStructure; USART_ClockInitTypeDef USART_ClockInitStructure; GPIO_InitTypeDef GPIO_InitStructure; int bits; // int i; USART2RxBufGetPos=0; USART2TxBufGetPos=0; USART2TxBufPutPos=0; //Open USART2 clock RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART3, ENABLE); //Open DMA clock RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1, ENABLE); //Open GPIO clock RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA, ENABLE); RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB, ENABLE); RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOC, ENABLE); RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB | RCC_APB2Periph_AFIO , ENABLE); //Power GPIO_InitStructure.GPIO_Pin = GPIO_Pin_8; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_OD; GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz; //V2 CONFIG //GPIO_Init(GPIOB, &GPIO_InitStructure); GPIO_Init(GPIOC, &GPIO_InitStructure); KWP_PWR_ON; //RX_REF: PB.9 // GPIO_InitStructure.GPIO_Pin = GPIO_Pin_9; // GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP; // GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz; // GPIO_Init(GPIOB, &GPIO_InitStructure); // KWP_RX_REF_LOW; //TX1_PU // GPIO_InitStructure.GPIO_Pin = GPIO_Pin_4; // GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP; // GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz; // GPIO_Init(GPIOC, &GPIO_InitStructure); // KWP_TX1_UP_ON; //TX2_PU // GPIO_InitStructure.GPIO_Pin = GPIO_Pin_1; // GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP; // GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz; // GPIO_Init(GPIOA, &GPIO_InitStructure); // KWP_TX2_UP_ON; //TX2_EN // GPIO_InitStructure.GPIO_Pin = GPIO_Pin_1; // GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP; // GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz; // GPIO_Init(GPIOA, &GPIO_InitStructure); // KWP_TX2_EN_ON; //UART2: Configure USART2 Tx (PA.2) as alternate function push-pull GPIO_InitStructure.GPIO_Pin = GPIO_Pin_10; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; GPIO_Init(GPIOB, &GPIO_InitStructure); //Configure USART2 Rx (PA.3) as input floating GPIO_InitStructure.GPIO_Pin = GPIO_Pin_11; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IPU; GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; GPIO_Init(GPIOB, &GPIO_InitStructure); //DMA Init for USART2_RX // DMA_DeInit(DMA1_Channel6); // DMA_InitStructure.DMA_PeripheralBaseAddr = (u32)USART2+4; // DMA_InitStructure.DMA_MemoryBaseAddr = (u32)USART2RxBuf; // DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralSRC; // DMA_InitStructure.DMA_BufferSize = USART2_RX_BUF_SIZE; // DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable; // DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable; // DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte; // DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte; // DMA_InitStructure.DMA_Mode = DMA_Mode_Circular; // DMA_InitStructure.DMA_Priority = DMA_Priority_High; // DMA_InitStructure.DMA_M2M = DMA_M2M_Disable; // DMA_Init(DMA1_Channel6, &DMA_InitStructure); //for(i=0;i<10;i++) //{ // USART2RxBuf[3+i] = 0xae; //} //DMA Init for USART3_RX DMA_DeInit(DMA1_Channel3); DMA_InitStructure.DMA_PeripheralBaseAddr = (u32)USART3+4; DMA_InitStructure.DMA_MemoryBaseAddr = (u32)USART2RxBuf; DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralSRC; DMA_InitStructure.DMA_BufferSize = USART2_RX_BUF_SIZE; DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable; DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable; DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte; DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte; DMA_InitStructure.DMA_Mode = DMA_Mode_Circular; DMA_InitStructure.DMA_Priority = DMA_Priority_High; DMA_InitStructure.DMA_M2M = DMA_M2M_Disable; DMA_Init(DMA1_Channel3, &DMA_InitStructure); //通道3是usart3的接收 //Set USART2_RX to DMA mode USART_DMACmd(USART3, USART_DMAReq_Rx, ENABLE); //Start DMA Transfer DMA_Cmd(DMA1_Channel3, ENABLE); //Init USART1 USART_ClockInitStructure.USART_Clock = USART_Clock_Disable; USART_ClockInitStructure.USART_CPOL = USART_CPOL_Low; USART_ClockInitStructure.USART_CPHA = USART_CPHA_2Edge; USART_ClockInitStructure.USART_LastBit = USART_LastBit_Disable; //Configure the USART2 synchronous paramters USART_ClockInit(USART3, &USART_ClockInitStructure); //Configure USART1 basic and asynchronous paramters USART_InitStructure.USART_BaudRate = KWPBaud; USART_InitStructure.USART_WordLength = KWPBits; USART_InitStructure.USART_StopBits = KWPStopBits; USART_InitStructure.USART_Parity = KWPParity; USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None; USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx; USART_Init(USART3, &USART_InitStructure); //Calc count the bit count for a word bits=1; //Startup bit if(USART_InitStructure.USART_WordLength==USART_WordLength_8b){ bits+=8;//data_bits + parity_bit }else{ bits+=9;//data_bits + parity_bit } switch(USART_InitStructure.USART_StopBits){ case USART_StopBits_0_5: bits+=0.5; break; case USART_StopBits_1: bits+=1; break; case USART_StopBits_1_5: bits+=1.5; break; case USART_StopBits_2: bits+=2; break; } KWPOneByteTakeUs=(u32)( bits * 1000000.0 / (double)USART_InitStructure.USART_BaudRate +0.5); //四舍五入 //Enable USART3 USART_Cmd(USART3, ENABLE); }
void usart3_init(void) { /* RCC initialization */ RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOC, ENABLE); RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART3, ENABLE); RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA1, ENABLE); /* GPIO initialization */ GPIO_PinAFConfig(GPIOC, GPIO_PinSource10, GPIO_AF_USART3); GPIO_PinAFConfig(GPIOC, GPIO_PinSource11, GPIO_AF_USART3); GPIO_InitTypeDef GPIO_InitStruct = { .GPIO_Pin = GPIO_Pin_10 | GPIO_Pin_11, .GPIO_Mode = GPIO_Mode_AF, .GPIO_Speed = GPIO_Speed_50MHz, .GPIO_OType = GPIO_OType_PP, .GPIO_PuPd = GPIO_PuPd_UP }; GPIO_Init(GPIOC, &GPIO_InitStruct); /* USART initialization */ USART_InitTypeDef USART_InitStruct = { .USART_BaudRate = 9600, .USART_Mode = USART_Mode_Rx | USART_Mode_Tx, .USART_WordLength = USART_WordLength_8b, .USART_StopBits = USART_StopBits_1, .USART_Parity = USART_Parity_No }; USART_Init(USART3, &USART_InitStruct); USART_Cmd(USART3, ENABLE); USART_ClearFlag(USART3, USART_FLAG_TC); /* DMA initialization */ DMA_ClearFlag(DMA1_Stream4, DMA_FLAG_TCIF4); } char usart_getc(void) { while(USART_GetFlagStatus(USART3, USART_FLAG_RXNE) != SET); return USART_ReceiveData(USART3); } void usart_puts(uint8_t *datas, int size) { DMA_ClearFlag(DMA1_Stream4, DMA_FLAG_TCIF4); /* Setup the DMA */ DMA_InitTypeDef DMA_InitStructure = { .DMA_BufferSize = (uint32_t)size, .DMA_FIFOMode = DMA_FIFOMode_Disable, .DMA_FIFOThreshold = DMA_FIFOThreshold_Full, .DMA_MemoryBurst = DMA_MemoryBurst_Single, .DMA_MemoryDataSize = DMA_MemoryDataSize_Byte, .DMA_MemoryInc = DMA_MemoryInc_Enable, .DMA_Mode = DMA_Mode_Normal, .DMA_PeripheralBaseAddr = (uint32_t)(&USART3->DR), .DMA_PeripheralBurst = DMA_PeripheralBurst_Single, .DMA_PeripheralInc = DMA_PeripheralInc_Disable, .DMA_Priority = DMA_Priority_Medium, .DMA_Channel = DMA_Channel_7, .DMA_DIR = DMA_DIR_MemoryToPeripheral, .DMA_Memory0BaseAddr = (uint32_t)datas }; DMA_Init(DMA1_Stream4, &DMA_InitStructure); /* Enable DMA to sent the data */ DMA_Cmd(DMA1_Stream4, ENABLE); USART_DMACmd(USART3, USART_DMAReq_Tx, ENABLE); while(DMA_GetFlagStatus(DMA1_Stream4, DMA_FLAG_TCIF4) == RESET); } int main() { usart3_init(); char *string = "STM32: Hello World!\n\r"; while(1) { usart_puts(string, strlen(string) + 1); } return 0; }
/** * @brief Main program. * @param None * @retval None */ int main(void) { /* System Clocks Configuration */ RCC_Configuration(); /* Once the DAC channel is enabled, the corresponding GPIO pin is automatically connected to the DAC converter. In order to avoid parasitic consumption, the GPIO pin should be configured in analog */ GPIO_Configuration(); /* TIM2 Configuration */ /* Time base configuration */ TIM_TimeBaseStructInit(&TIM_TimeBaseStructure); TIM_TimeBaseStructure.TIM_Period = 0x19; TIM_TimeBaseStructure.TIM_Prescaler = 0x0; TIM_TimeBaseStructure.TIM_ClockDivision = 0x0; TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up; TIM_TimeBaseInit(TIM2, &TIM_TimeBaseStructure); /* TIM2 TRGO selection */ TIM_SelectOutputTrigger(TIM2, TIM_TRGOSource_Update); /* DAC channel1 Configuration */ DAC_InitStructure.DAC_Trigger = DAC_Trigger_T2_TRGO; DAC_InitStructure.DAC_WaveGeneration = DAC_WaveGeneration_None; DAC_InitStructure.DAC_OutputBuffer = DAC_OutputBuffer_Disable; DAC_Init(DAC_Channel_1, &DAC_InitStructure); /* DAC channel2 Configuration */ DAC_Init(DAC_Channel_2, &DAC_InitStructure); /* Fill Sine32bit table */ for (Idx = 0; Idx < 32; Idx++) { DualSine12bit[Idx] = (Sine12bit[Idx] << 16) + (Sine12bit[Idx]); } /* DMA2 channel4 configuration */ DMA_DeInit(DMA2_Channel4); DMA_InitStructure.DMA_PeripheralBaseAddr = DAC_DHR12RD_Address; DMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t)&DualSine12bit; DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralDST; DMA_InitStructure.DMA_BufferSize = 32; DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable; DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable; DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Word; DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Word; DMA_InitStructure.DMA_Mode = DMA_Mode_Circular; DMA_InitStructure.DMA_Priority = DMA_Priority_High; DMA_InitStructure.DMA_M2M = DMA_M2M_Disable; DMA_Init(DMA2_Channel4, &DMA_InitStructure); /* Enable DMA2 Channel4 */ DMA_Cmd(DMA2_Channel4, ENABLE); /* Enable DAC Channel1: Once the DAC channel1 is enabled, PA.04 is automatically connected to the DAC converter. */ DAC_Cmd(DAC_Channel_1, ENABLE); /* Enable DAC Channel2: Once the DAC channel2 is enabled, PA.05 is automatically connected to the DAC converter. */ DAC_Cmd(DAC_Channel_2, ENABLE); /* Enable DMA for DAC Channel2 */ DAC_DMACmd(DAC_Channel_2, ENABLE); /* TIM2 enable counter */ TIM_Cmd(TIM2, ENABLE); while (1) { } }
serialPort_t *uartOpen(USART_TypeDef *USARTx, serialReceiveCallbackPtr callback, uint32_t baudRate, portMode_t mode, portOptions_t options) { uartPort_t *s = NULL; if (USARTx == USART1) { s = serialUSART1(baudRate, mode, options); #ifdef USE_USART2 } else if (USARTx == USART2) { s = serialUSART2(baudRate, mode, options); #endif #ifdef USE_USART3 } else if (USARTx == USART3) { s = serialUSART3(baudRate, mode, options); #endif #ifdef USE_USART4 } else if (USARTx == UART4) { s = serialUSART4(baudRate, mode, options); #endif #ifdef USE_USART5 } else if (USARTx == UART5) { s = serialUSART5(baudRate, mode, options); #endif #ifdef USE_USART6 } else if (USARTx == USART6) { s = serialUSART6(baudRate, mode, options); #endif } else { return (serialPort_t *)s; } s->txDMAEmpty = true; // common serial initialisation code should move to serialPort::init() s->port.rxBufferHead = s->port.rxBufferTail = 0; s->port.txBufferHead = s->port.txBufferTail = 0; // callback works for IRQ-based RX ONLY s->port.callback = callback; s->port.mode = mode; s->port.baudRate = baudRate; s->port.options = options; uartReconfigure(s); // Receive DMA or IRQ DMA_InitTypeDef DMA_InitStructure; if (mode & MODE_RX) { #ifdef STM32F40_41xxx if (s->rxDMAStream) { DMA_StructInit(&DMA_InitStructure); DMA_InitStructure.DMA_PeripheralBaseAddr = s->rxDMAPeripheralBaseAddr; DMA_InitStructure.DMA_Priority = DMA_Priority_Medium; DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable; DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte; DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable; DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte; DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable ; DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_1QuarterFull ; DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single ; DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single; #else if (s->rxDMAChannel) { DMA_StructInit(&DMA_InitStructure); DMA_InitStructure.DMA_PeripheralBaseAddr = s->rxDMAPeripheralBaseAddr; DMA_InitStructure.DMA_Priority = DMA_Priority_Medium; DMA_InitStructure.DMA_M2M = DMA_M2M_Disable; DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable; DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte; DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable; DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte; #endif DMA_InitStructure.DMA_BufferSize = s->port.rxBufferSize; #ifdef STM32F40_41xxx DMA_InitStructure.DMA_Channel = s->rxDMAChannel; DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralToMemory; DMA_InitStructure.DMA_Mode = DMA_Mode_Circular; DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)s->port.rxBuffer; DMA_DeInit(s->rxDMAStream); DMA_Init(s->rxDMAStream, &DMA_InitStructure); DMA_Cmd(s->rxDMAStream, ENABLE); USART_DMACmd(s->USARTx, USART_DMAReq_Rx, ENABLE); s->rxDMAPos = DMA_GetCurrDataCounter(s->rxDMAStream); #else DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralSRC; DMA_InitStructure.DMA_Mode = DMA_Mode_Circular; DMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t)s->port.rxBuffer; DMA_DeInit(s->rxDMAChannel); DMA_Init(s->rxDMAChannel, &DMA_InitStructure); DMA_Cmd(s->rxDMAChannel, ENABLE); USART_DMACmd(s->USARTx, USART_DMAReq_Rx, ENABLE); s->rxDMAPos = DMA_GetCurrDataCounter(s->rxDMAChannel); #endif } else { USART_ClearITPendingBit(s->USARTx, USART_IT_RXNE); USART_ITConfig(s->USARTx, USART_IT_RXNE, ENABLE); } } // Transmit DMA or IRQ if (mode & MODE_TX) { #ifdef STM32F40_41xxx if (s->txDMAStream) { DMA_StructInit(&DMA_InitStructure); DMA_InitStructure.DMA_PeripheralBaseAddr = s->txDMAPeripheralBaseAddr; DMA_InitStructure.DMA_Priority = DMA_Priority_Medium; DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable; DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte; DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable; DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte; DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable ; DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_1QuarterFull ; DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single ; DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single; #else if (s->txDMAChannel) { DMA_StructInit(&DMA_InitStructure); DMA_InitStructure.DMA_PeripheralBaseAddr = s->txDMAPeripheralBaseAddr; DMA_InitStructure.DMA_Priority = DMA_Priority_Medium; DMA_InitStructure.DMA_M2M = DMA_M2M_Disable; DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable; DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte; DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable; DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte; #endif DMA_InitStructure.DMA_BufferSize = s->port.txBufferSize; #ifdef STM32F40_41xxx DMA_InitStructure.DMA_Channel = s->txDMAChannel; DMA_InitStructure.DMA_DIR = DMA_DIR_MemoryToPeripheral; DMA_InitStructure.DMA_Mode = DMA_Mode_Normal; DMA_DeInit(s->txDMAStream); DMA_Init(s->txDMAStream, &DMA_InitStructure); DMA_ITConfig(s->txDMAStream, DMA_IT_TC|DMA_IT_FE|DMA_IT_TE|DMA_IT_DME, ENABLE); DMA_SetCurrDataCounter(s->txDMAStream, 0); #else DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralDST; DMA_InitStructure.DMA_Mode = DMA_Mode_Normal; DMA_DeInit(s->txDMAChannel); DMA_Init(s->txDMAChannel, &DMA_InitStructure); DMA_ITConfig(s->txDMAChannel, DMA_IT_TC, ENABLE); DMA_SetCurrDataCounter(s->txDMAChannel, 0); s->txDMAChannel->CNDTR = 0; #endif USART_DMACmd(s->USARTx, USART_DMAReq_Tx, ENABLE); } else { USART_ITConfig(s->USARTx, USART_IT_TXE, ENABLE); } } USART_Cmd(s->USARTx, ENABLE); return (serialPort_t *)s; } void uartSetBaudRate(serialPort_t *instance, uint32_t baudRate) { uartPort_t *uartPort = (uartPort_t *)instance; uartPort->port.baudRate = baudRate; uartReconfigure(uartPort); } void uartSetMode(serialPort_t *instance, portMode_t mode) { uartPort_t *uartPort = (uartPort_t *)instance; uartPort->port.mode = mode; uartReconfigure(uartPort); }
void ADC_Config( void ) { DMA_InitTypeDef DMA_InitStruct; ADC_InitTypeDef ADC_InitStruct; ADC_CommonInitTypeDef ADC_CommonInitStruct; GPIO_InitTypeDef GPIO_InitStruct; /* ADC Clk *******************************************************************/ RCC_ADCCLKConfig(RCC_ADC12PLLCLK_Div2); ADCx_CLK_ENABLE(); ADCx_DMA_CLK_ENABLE(); /* ADC Pin *******************************************************************/ GPIO_InitStruct.GPIO_Mode = GPIO_Mode_AN; GPIO_InitStruct.GPIO_PuPd = GPIO_PuPd_NOPULL; GPIO_InitStruct.GPIO_Pin = ADCxP_PIN; GPIO_Init(ADCxP_GPIO_PORT, &GPIO_InitStruct); GPIO_InitStruct.GPIO_Pin = ADCxN_PIN; GPIO_Init(ADCxN_GPIO_PORT, &GPIO_InitStruct); /* ADC DMA *******************************************************************/ DMA_DeInit(ADCx_DMA_CHANNEL); DMA_InitStruct.DMA_PeripheralBaseAddr = ADCx_DR_ADDRESS; DMA_InitStruct.DMA_MemoryBaseAddr = (uint32_t)ADC_DMA_ConvBuf; DMA_InitStruct.DMA_DIR = DMA_DIR_PeripheralSRC; DMA_InitStruct.DMA_BufferSize = ADC_BUF_CHENNAL * ADC_BUF_SIZE; DMA_InitStruct.DMA_PeripheralInc = DMA_PeripheralInc_Disable; DMA_InitStruct.DMA_MemoryInc = DMA_MemoryInc_Enable; DMA_InitStruct.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord; DMA_InitStruct.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord; DMA_InitStruct.DMA_Mode = DMA_Mode_Circular; DMA_InitStruct.DMA_Priority = DMA_Priority_Medium; DMA_InitStruct.DMA_M2M = DMA_M2M_Disable; DMA_Init(ADCx_DMA_CHANNEL, &DMA_InitStruct); DMA_Cmd(ADCx_DMA_CHANNEL, ENABLE); /* ADC Calibration ***********************************************************/ ADC_VoltageRegulatorCmd(ADCx, ENABLE); delay_ms(10); ADC_SelectCalibrationMode(ADCx, ADC_CalibrationMode_Single); ADC_StartCalibration(ADCx); while(ADC_GetCalibrationStatus(ADCx) != RESET); calibrationValue = ADC_GetCalibrationValue(ADCx); /* ADC Common Init ***********************************************************/ ADC_CommonInitStruct.ADC_Mode = ADC_Mode_Interleave; // ADC_Mode_Independent ADC_CommonInitStruct.ADC_Clock = ADC_Clock_AsynClkMode; ADC_CommonInitStruct.ADC_DMAAccessMode = ADC_DMAAccessMode_1; ADC_CommonInitStruct.ADC_DMAMode = ADC_DMAMode_Circular; ADC_CommonInitStruct.ADC_TwoSamplingDelay = 0; ADC_CommonInit(ADCx, &ADC_CommonInitStruct); /* ADC Init *****************************************************************/ ADC_InitStruct.ADC_ContinuousConvMode = ADC_ContinuousConvMode_Enable; ADC_InitStruct.ADC_Resolution = ADC_Resolution_12b; ADC_InitStruct.ADC_ExternalTrigConvEvent = ADC_ExternalTrigConvEvent_0; ADC_InitStruct.ADC_ExternalTrigEventEdge = ADC_ExternalTrigEventEdge_None; ADC_InitStruct.ADC_DataAlign = ADC_DataAlign_Right; ADC_InitStruct.ADC_OverrunMode = ADC_OverrunMode_Disable; ADC_InitStruct.ADC_AutoInjMode = ADC_AutoInjec_Disable; ADC_InitStruct.ADC_NbrOfRegChannel = ADC_BUF_SIZE; ADC_Init(ADCx, &ADC_InitStruct); /* ADC Regular Config *******************************************************/ ADC_RegularChannelConfig(ADCx, ADCxP_CHANNEL, 1, ADC_SampleTime_601Cycles5); ADC_RegularChannelConfig(ADCx, ADCxN_CHANNEL, 2, ADC_SampleTime_601Cycles5); /* Enable & Start ***********************************************************/ ADC_DMACmd(ADCx, ENABLE); ADC_Cmd(ADCx, ENABLE); while(!ADC_GetFlagStatus(ADCx, ADC_FLAG_RDY)); DMA_Cmd(ADCx_DMA_CHANNEL, ENABLE); ADC_StartConversion(ADCx); }
/** * @brief Main program. * @param None * @retval None */ int main(void) { /*!< At this stage the microcontroller clock setting is already configured, this is done through SystemInit() function which is called from startup file (startup_stm32f10x_xx.s) before to branch to application main. To reconfigure the default setting of SystemInit() function, refer to system_stm32f10x.c file */ /* System Clocks Configuration */ RCC_Configuration(); /* FSMC for SRAM and SRAM pins configuration */ SRAM_Init(); /* Write to FSMC -----------------------------------------------------------*/ /* DMA2 channel5 configuration */ DMA_DeInit(DMA2_Channel5); DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)SRC_Const_Buffer; DMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t)Bank1_SRAM3_ADDR; DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralSRC; DMA_InitStructure.DMA_BufferSize = 32; DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Enable; DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable; DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Word; DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Word; DMA_InitStructure.DMA_Mode = DMA_Mode_Normal; DMA_InitStructure.DMA_Priority = DMA_Priority_High; DMA_InitStructure.DMA_M2M = DMA_M2M_Enable; DMA_Init(DMA2_Channel5, &DMA_InitStructure); /* Enable DMA2 channel5 */ DMA_Cmd(DMA2_Channel5, ENABLE); /* Check if DMA2 channel5 transfer is finished */ while(!DMA_GetFlagStatus(DMA2_FLAG_TC5)); /* Clear DMA2 channel5 transfer complete flag bit */ DMA_ClearFlag(DMA2_FLAG_TC5); /* Read from FSMC ----------------------------------------------------------*/ /* Destination buffer initialization */ for(Idx=0; Idx<128; Idx++) DST_Buffer[Idx]=0; /* DMA1 channel3 configuration */ DMA_DeInit(DMA1_Channel3); DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)Bank1_SRAM3_ADDR; DMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t)DST_Buffer; DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralSRC; DMA_InitStructure.DMA_BufferSize = 128; DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Enable; DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable; DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte; DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte; DMA_InitStructure.DMA_Mode = DMA_Mode_Normal; DMA_InitStructure.DMA_Priority = DMA_Priority_High; DMA_InitStructure.DMA_M2M = DMA_M2M_Enable; DMA_Init(DMA1_Channel3, &DMA_InitStructure); /* Enable DMA1 channel3 */ DMA_Cmd(DMA1_Channel3, ENABLE); /* Check if DMA1 channel3 transfer is finished */ while(!DMA_GetFlagStatus(DMA1_FLAG_TC3)); /* Clear DMA1 channel3 transfer complete flag bit */ DMA_ClearFlag(DMA1_FLAG_TC3); /* Check if the transmitted and received data are equal */ TransferStatus = Buffercmp(SRC_Const_Buffer, (uint32_t*)DST_Buffer, BufferSize); /* TransferStatus = PASSED, if the transmitted and received data are the same */ /* TransferStatus = FAILED, if the transmitted and received data are different */ while (1) { } }
/** * @brief Configure the DMA controller according to the Stream parameters * defined in main.h file * @param None * @retval None */ static void DMA_Config(void) { NVIC_InitTypeDef NVIC_InitStructure; DMA_InitTypeDef DMA_InitStructure; __IO uint32_t Timeout = TIMEOUT_MAX; /* Enable DMA clock */ RCC_AHB1PeriphClockCmd(DMA_STREAM_CLOCK, ENABLE); /* Reset DMA Stream registers (for debug purpose) */ DMA_DeInit(DMA_STREAM); /* Check if the DMA Stream is disabled before enabling it. Note that this step is useful when the same Stream is used multiple times: enabled, then disabled then re-enabled... In this case, the DMA Stream disable will be effective only at the end of the ongoing data transfer and it will not be possible to re-configure it before making sure that the Enable bit has been cleared by hardware. If the Stream is used only once, this step might be bypassed. */ while (DMA_GetCmdStatus(DMA_STREAM) != DISABLE) { } /* Configure DMA Stream */ DMA_InitStructure.DMA_Channel = DMA_CHANNEL; DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)aSRC_Const_Buffer; DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)aDST_Buffer; DMA_InitStructure.DMA_DIR = DMA_DIR_MemoryToMemory; DMA_InitStructure.DMA_BufferSize = (uint32_t)BUFFER_SIZE; DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Enable; DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable; DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Word; DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Word; DMA_InitStructure.DMA_Mode = DMA_Mode_Normal; DMA_InitStructure.DMA_Priority = DMA_Priority_High; DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable; DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_Full; DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single; DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single; DMA_Init(DMA_STREAM, &DMA_InitStructure); /* Enable DMA Stream Transfer Complete interrupt */ DMA_ITConfig(DMA_STREAM, DMA_IT_TC, ENABLE); /* DMA Stream enable */ DMA_Cmd(DMA_STREAM, ENABLE); /* Check if the DMA Stream has been effectively enabled. The DMA Stream Enable bit is cleared immediately by hardware if there is an error in the configuration parameters and the transfer is no started (ie. when wrong FIFO threshold is configured ...) */ Timeout = TIMEOUT_MAX; while ((DMA_GetCmdStatus(DMA_STREAM) != ENABLE) && (Timeout-- > 0)) { } /* Check if a timeout condition occurred */ if (Timeout == 0) { /* Manage the error: to simplify the code enter an infinite loop */ while (1) { } } /* Enable the DMA Stream IRQ Channel */ NVIC_InitStructure.NVIC_IRQChannel = DMA_STREAM_IRQ; NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0; NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0; NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; NVIC_Init(&NVIC_InitStructure); }
IPD_Data Wifi_CheckDMABuff_ForIPDData() { currentIPD.Valid = 0; //if((Millis() - lastDMABuffPoll) >= DMA_Rx_Buff_Poll_Int_ms) // { //Probably need to check for new client ({clientNum},CONNECT) lastDMABuffPoll = Millis(); ESP_IPD_Data_Buffer_Pntr = memmem(USART3_RxBuffer,RxBuffSize,"+IPD",4); if(ESP_IPD_Data_Buffer_Pntr) { //position = DMA_GetCurrDataCounter(DMA1_Channel3); //position = strlen(USART3_RxBuffer); //Copy IPD message and data to its own buffer so DMA can go about its business strcpy(ESP_IPD_DataBuffer,ESP_IPD_Data_Buffer_Pntr); DMA_Cmd(DMA1_Channel3,DISABLE); //Wipes the received message from the DMA buffer (using the pointer to the data) //This makes sure the data doesn't get mistaken for a new request, on the next buffer polling. ClearArray_Size(ESP_IPD_Data_Buffer_Pntr,strlen(ESP_IPD_Data_Buffer_Pntr)); DMA_Initialize(USART3_RxBuffer, RxBuffSize); //now we process since DMA isn't going to stomp on us. currentIPD = ProcessIPD_Data(ESP_IPD_DataBuffer); //TODO: Need to add a level of error detection/correction as data may be missing the if(strstr(currentIPD.RequestType, "POST")) { //if URI contains dimming (the test for now) if(strstr(currentIPD.URI, "dimming")) { if(strstr(currentIPD.URI, "?"))//If query String is found { URI = strtok(currentIPD.URI, "?"); if(strstr(URI,"="))//If URI was sent prepended with a '/' this will be true { queryString1 = strtok(URI, "="); queryValue1 = strtok(NULL, "\0"); } else { queryString1 = strtok(NULL, "="); if(strstr(currentIPD.URI, "&")) { queryValue1 = strtok(NULL, "&"); } else { queryValue1 = strtok(NULL, "\0"); } } currentIPD.Valid = 1; } dimmingValueToValidate = atoi(queryValue1); if(dimmingValueToValidate <= 13000) { dimmingValue = dimmingValueToValidate; RefreshCustomRESTResponseDimmer("172.20.112.136", "192.168.4.1", dimmingValue); //SendRESTResponse(currentIPD.ConnectionNum, RESTResponse_Headers_Test_OK, customRESTResponse); } else { RefreshCustomRESTResponse("172.20.112.136", "192.168.4.1", "dimmingValue", "InvalidValue"); } currentIPD.Valid = 1; } } //printf("Incoming webrequest\r\n"); } //DMA_Rx_Buff_Index = strlen(USART3_RxBuffer); //tstBuff = mempcpy(USART3_RxBuffer_Buffer, USART3_RxBuffer, RxBuffSize); //DMA_Rx_Buff_Index = tstBuff - &USART3_RxBuffer_Buffer[0]; //tstBuff = memmem(USART3_RxBuffer,sizeof(USART3_RxBuffer),"OK\r\n",4); //ClearArray_Size(USART3_RxBuffer, sizeof(USART3_RxBuffer)); // } return currentIPD; }
static void dac1_config(void) { DAC_InitTypeDef DAC_InitStructure; DMA_InitTypeDef DMA_InitStructure; NVIC_InitTypeDef NVIC_InitStructure; /* DAC channel 1 Configuration */ /* This line fixed a bug that cost me 5 days, bad wave amplitude value, and some STM32F4 periph library bugs caused triangle wave geneartion to be enable resulting in a low level tone on the SM1000, that we thought was caused by analog issues like layour or power supply biasing */ DAC_StructInit(&DAC_InitStructure); DAC_InitStructure.DAC_Trigger = DAC_Trigger_T6_TRGO; DAC_InitStructure.DAC_WaveGeneration = DAC_WaveGeneration_None; DAC_InitStructure.DAC_OutputBuffer = DAC_OutputBuffer_Enable; DAC_Init(DAC_Channel_1, &DAC_InitStructure); /* DMA1_Stream5 channel7 configuration **************************************/ /* Table 35 page 219 of the monster data sheet */ DMA_DeInit(DMA1_Stream5); DMA_InitStructure.DMA_Channel = DMA_Channel_7; DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)DAC_DHR12R1_ADDRESS; DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)dac1_buf; DMA_InitStructure.DMA_DIR = DMA_DIR_MemoryToPeripheral; DMA_InitStructure.DMA_BufferSize = DAC_BUF_SZ; DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable; DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable; DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord; DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord; DMA_InitStructure.DMA_Mode = DMA_Mode_Circular; DMA_InitStructure.DMA_Priority = DMA_Priority_High; DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable; DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_HalfFull; DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single; DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single; DMA_Init(DMA1_Stream5, &DMA_InitStructure); /* Enable DMA Half & Complete interrupts */ DMA_ITConfig(DMA1_Stream5, DMA_IT_TC | DMA_IT_HT, ENABLE); /* Enable the DMA Stream IRQ Channel */ NVIC_InitStructure.NVIC_IRQChannel = DMA1_Stream5_IRQn; NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0; NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0; NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; NVIC_Init(&NVIC_InitStructure); /* Enable DMA1_Stream5 */ DMA_Cmd(DMA1_Stream5, ENABLE); /* Enable DAC Channel 1 */ DAC_Cmd(DAC_Channel_1, ENABLE); /* Enable DMA for DAC Channel 1 */ DAC_DMACmd(DAC_Channel_1, ENABLE); }
/** * @brief Main program. * @param None * @retval None */ void main(void) { uint8_t arrayindex = 0; uint8_t index1 = 0, index2 = 0; ErrorStatus cryptostatus = ERROR; /* Initialize LEDs mounted on STM8L1528-EVAL board */ STM_EVAL_LEDInit(LED1); STM_EVAL_LEDInit(LED3); /****************************************************************************/ /* Encryption phase */ /****************************************************************************/ /* Prepare the buffer to be transferred by DMA: Alternating key and plain text */ while (arrayindex < PLAINTEXT_SIZE * 2) { SrcBuffer[arrayindex] = EncryptionKey[index1]; arrayindex++; SrcBuffer[arrayindex] = PlainText[index2]; arrayindex++; index1++; index2++; if (index1 == 16) index1 = 0; } /* DMA configuration to transfer data to/from AES --------------------------*/ /* Enable DMA1 clock */ CLK_PeripheralClockConfig(CLK_Peripheral_DMA1, ENABLE); /* DMA DeInit */ DMA_GlobalDeInit(); DMA_DeInit(DMA1_Channel0); DMA_DeInit(DMA1_Channel3); /* DMA1 channel 0 configuration Input phase: data transfer from memory "SrcBuffer" to AES_DINR register */ DMA_Init(DMA1_Channel0, (uint16_t)SrcBuffer, AES_DINR_ADDRESS, PLAINTEXT_SIZE * 2, DMA_DIR_MemoryToPeripheral, DMA_Mode_Normal, DMA_MemoryIncMode_Inc, DMA_Priority_VeryHigh, DMA_MemoryDataSize_Byte); /* DMA1 channel 3 configuration Output phase: data transfer from AES_DOUTR register to memory "CypherText" */ DMA_Init(DMA1_Channel3, (uint16_t)CypherText, AES_DOUTR_ADDRESS, PLAINTEXT_SIZE, DMA_DIR_PeripheralToMemory, DMA_Mode_Normal, DMA_MemoryIncMode_Inc, DMA_Priority_VeryHigh, DMA_MemoryDataSize_Byte); /* DMA1 Channel 0 and channel 3 enable */ DMA_Cmd(DMA1_Channel0, ENABLE); DMA_Cmd(DMA1_Channel3, ENABLE); /* DMA1 global enable */ DMA_GlobalCmd(ENABLE); /* AES configuration to encrypt data using DMA transfer --------------------*/ /* Enable AES clock */ CLK_PeripheralClockConfig(CLK_Peripheral_AES, ENABLE); /* Select the encryption mode */ AES_OperationModeConfig(AES_Operation_Encryp); /* Enable using DMA for data transfer */ AES_DMAConfig(AES_DMATransfer_InOut, ENABLE); /* Enable the AES peripheral: the AES initiates the DMA request */ AES_Cmd(ENABLE); /* Wait for transfer from AES_DOUTR to memory to be completed */ while (DMA_GetFlagStatus(DMA1_FLAG_TC3) == RESET); /****************************************************************************/ /* Decryption phase */ /****************************************************************************/ /* Prepare the buffer to be transferred by DMA: Alternating key and cypher text */ arrayindex = 0; index1 = 0; index2 = 0; while (arrayindex < PLAINTEXT_SIZE * 2) { SrcBuffer[arrayindex] = EncryptionKey[index1]; arrayindex++; SrcBuffer[arrayindex] = CypherText[index2]; arrayindex++; index1++; index2++; if (index1 == 16) index1 = 0; } /* Disable the AES peripheral to change AES operation mode */ AES_Cmd(DISABLE); /* DeInit DMA1 channel 3 */ DMA_DeInit(DMA1_Channel3); /* DMA1 global disable */ DMA_GlobalCmd(DISABLE); /* DMA1 channel 0 is already configured in Encryption phase Input phase: data transfer from memory "SrcBuffer" to AES_DINR register */ /* Reconfigure channel 0 counter to start a new transfer */ DMA_Cmd(DMA1_Channel0, DISABLE); DMA_SetCurrDataCounter(DMA1_Channel0, PLAINTEXT_SIZE * 2); /* DMA1 channel 3 configuration Output phase: data transfer from AES_DOUTR register to memory "ComputedPlainText" */ DMA_Init(DMA1_Channel3, (uint16_t)ComputedPlainText, AES_DOUTR_ADDRESS, PLAINTEXT_SIZE, DMA_DIR_PeripheralToMemory, DMA_Mode_Normal, DMA_MemoryIncMode_Inc, DMA_Priority_VeryHigh, DMA_MemoryDataSize_Byte); /* DMA1 Channel 0 and Channel 3 enable */ DMA_Cmd(DMA1_Channel3, ENABLE); DMA_Cmd(DMA1_Channel0, ENABLE); /* DMA1 global enable */ DMA_GlobalCmd(ENABLE); /********** AES configuration to decrypt data using DMA transfer ***********/ /* Select the key derivation and decryption mode */ AES_OperationModeConfig(AES_Operation_KeyDerivAndDecryp); /* Enable the AES peripheral */ AES_Cmd(ENABLE); /* wait for transfer from AES_DOUTR register to memory to be completed */ while (DMA_GetFlagStatus(DMA1_FLAG_TC3) == RESET); /****************************************************************************/ /* Checking buffers */ /****************************************************************************/ /* Check if decrypted cypher text is equal to original plain text */ cryptostatus = Buffercmp(PlainText, ComputedPlainText, PLAINTEXT_SIZE); if (cryptostatus == SUCCESS) { /* Turn on green led LD1 */ STM_EVAL_LEDOn(LED1); } else { /* Turn on red led LD3 */ STM_EVAL_LEDOn(LED3); } /* Infinite loop */ while (1) {} }
static void max7456_send_dma(void* tx_buffer, void* rx_buffer, uint16_t buffer_size) { DMA_InitTypeDef DMA_InitStructure; #ifdef MAX7456_DMA_CHANNEL_RX static uint16_t dummy[] = {0xffff}; #else UNUSED(rx_buffer); #endif while (dma_transaction_in_progress); // Wait for prev DMA transaction DMA_DeInit(MAX7456_DMA_CHANNEL_TX); #ifdef MAX7456_DMA_CHANNEL_RX DMA_DeInit(MAX7456_DMA_CHANNEL_RX); #endif // Common to both channels DMA_StructInit(&DMA_InitStructure); DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)(&(MAX7456_SPI_INSTANCE->DR)); DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte; DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte; DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable; DMA_InitStructure.DMA_BufferSize = buffer_size; DMA_InitStructure.DMA_Mode = DMA_Mode_Normal; DMA_InitStructure.DMA_Priority = DMA_Priority_Low; #ifdef MAX7456_DMA_CHANNEL_RX // Rx Channel #ifdef STM32F4 DMA_InitStructure.DMA_Memory0BaseAddr = rx_buffer ? (uint32_t)rx_buffer : (uint32_t)(dummy); DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralToMemory; #else DMA_InitStructure.DMA_MemoryBaseAddr = rx_buffer ? (uint32_t)rx_buffer : (uint32_t)(dummy); DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralSRC; #endif DMA_InitStructure.DMA_MemoryInc = rx_buffer ? DMA_MemoryInc_Enable : DMA_MemoryInc_Disable; DMA_Init(MAX7456_DMA_CHANNEL_RX, &DMA_InitStructure); DMA_Cmd(MAX7456_DMA_CHANNEL_RX, ENABLE); #endif // Tx channel #ifdef STM32F4 DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)tx_buffer; //max7456_screen; DMA_InitStructure.DMA_DIR = DMA_DIR_MemoryToPeripheral; #else DMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t)tx_buffer; //max7456_screen; DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralDST; #endif DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable; DMA_Init(MAX7456_DMA_CHANNEL_TX, &DMA_InitStructure); DMA_Cmd(MAX7456_DMA_CHANNEL_TX, ENABLE); #ifdef MAX7456_DMA_CHANNEL_RX DMA_ITConfig(MAX7456_DMA_CHANNEL_RX, DMA_IT_TC, ENABLE); #else DMA_ITConfig(MAX7456_DMA_CHANNEL_TX, DMA_IT_TC, ENABLE); #endif // Enable SPI TX/RX request ENABLE_MAX7456; dma_transaction_in_progress = 1; SPI_I2S_DMACmd(MAX7456_SPI_INSTANCE, #ifdef MAX7456_DMA_CHANNEL_RX SPI_I2S_DMAReq_Rx | #endif SPI_I2S_DMAReq_Tx, ENABLE); }
void ADC_config(void) { DMA_InitTypeDef DMA_InitStructure_ADC; NVIC_InitTypeDef NVIC_InitStructure; GPIO_InitTypeDef GPIO_InitSt_C, GPIO_InitSt_D; ADC_CommonInitTypeDef ADC_struct; ADC_InitTypeDef ADC_InitStructure; TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure; RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA2 | RCC_AHB1Periph_GPIOC | RCC_AHB1Periph_GPIOD, ENABLE); RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM3, ENABLE); RCC_APB2PeriphClockCmd(RCC_APB2Periph_ADC1, ENABLE); //CONFIGURE DMA FOR ADC DMA_InitStructure_ADC.DMA_Channel = DMA_Channel_0; DMA_InitStructure_ADC.DMA_PeripheralBaseAddr = ADC_DR_ADDRESS; DMA_InitStructure_ADC.DMA_DIR = DMA_DIR_PeripheralToMemory; DMA_InitStructure_ADC.DMA_BufferSize = NUMBER_SAMPL_ADC; DMA_InitStructure_ADC.DMA_PeripheralInc = DMA_PeripheralInc_Disable; DMA_InitStructure_ADC.DMA_MemoryInc = DMA_MemoryInc_Enable; DMA_InitStructure_ADC.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord; DMA_InitStructure_ADC.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord; DMA_InitStructure_ADC.DMA_Mode = DMA_Mode_Normal; DMA_InitStructure_ADC.DMA_Priority = DMA_Priority_High; DMA_InitStructure_ADC.DMA_FIFOMode = DMA_FIFOMode_Enable; DMA_InitStructure_ADC.DMA_FIFOThreshold = DMA_FIFOThreshold_HalfFull; DMA_InitStructure_ADC.DMA_PeripheralBurst = DMA_PeripheralBurst_Single; DMA_Init(DMA2_Stream0, &DMA_InitStructure_ADC); //enable DMA interrupt DMA_ITConfig(DMA2_Stream0, DMA_IT_TC, ENABLE); NVIC_InitStructure.NVIC_IRQChannel = DMA2_Stream0_IRQn; NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 2; NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0; NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; NVIC_Init(&NVIC_InitStructure); DMA_Cmd(DMA2_Stream0, ENABLE); //CONFIGURE GPIO FOR ADC; /*ADC Channel 10 -> PC0*/ GPIO_InitSt_C.GPIO_Pin = GPIO_Pin_0; GPIO_InitSt_C.GPIO_Mode = GPIO_Mode_AN; GPIO_InitSt_C.GPIO_PuPd = GPIO_PuPd_NOPULL ; GPIO_Init(GPIOC, &GPIO_InitSt_C); //ADC COMMON INIT ADC_struct.ADC_Mode = ADC_Mode_Independent ; ADC_struct.ADC_Prescaler = ADC_Prescaler_Div8; //700kHz ADC_struct.ADC_DMAAccessMode = ADC_DMAAccessMode_1; ADC_struct.ADC_TwoSamplingDelay = ADC_TwoSamplingDelay_5Cycles; ADC_CommonInit(&ADC_struct); //ADC CHANNEL INIT ADC_InitStructure.ADC_Resolution = ADC_Resolution_12b; ADC_InitStructure.ADC_ScanConvMode = DISABLE; ADC_InitStructure.ADC_ContinuousConvMode = DISABLE; ADC_InitStructure.ADC_ExternalTrigConvEdge = ADC_ExternalTrigConvEdge_Rising; ADC_InitStructure.ADC_ExternalTrigConv = ADC_ExternalTrigConv_T3_TRGO; ADC_InitStructure.ADC_DataAlign = ADC_DataAlign_Right; ADC_InitStructure.ADC_NbrOfConversion = 1; ADC_Init(ADC1, &ADC_InitStructure); ADC_RegularChannelConfig(ADC1, ADC_Channel_10, 1, ADC_SampleTime_3Cycles); ADC_DMARequestAfterLastTransferCmd(ADC1, DISABLE); // ENABLE ADC1 DMA ADC_DMACmd(ADC1, ENABLE); // ENABLE ADC1 ADC_Cmd(ADC1, ENABLE); /*configure TIM3*/ TIM_TimeBaseStructInit(&TIM_TimeBaseStructure); TIM_TimeBaseStructure.TIM_Period = 0; TIM_TimeBaseStructure.TIM_Prescaler = 0; TIM_TimeBaseStructure.TIM_ClockDivision = 0; TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up; TIM_TimeBaseInit(TIM3, &TIM_TimeBaseStructure); TIM_SelectOutputTrigger(TIM3, TIM_TRGOSource_Update); /* Input Trigger selection */ TIM_ETRConfig(TIM3, TIM_ExtTRGPSC_OFF, TIM_ExtTRGPolarity_NonInverted, 0); TIM_SelectInputTrigger(TIM3, TIM_TS_ETRF); /* Slave Mode selection: Trigger Mode */ TIM_SelectSlaveMode(TIM3, TIM_SlaveMode_Trigger); /*Trigger ADC -> PD2*/ GPIO_InitSt_D.GPIO_Mode = GPIO_Mode_AF; GPIO_InitSt_D.GPIO_PuPd = GPIO_PuPd_DOWN; GPIO_InitSt_D.GPIO_Pin = GPIO_Pin_2; GPIO_Init(GPIOD, &GPIO_InitSt_D); GPIO_PinAFConfig(GPIOD, GPIO_PinSource2, GPIO_AF_TIM3); }
//****************************************************************************** int ADC_device_init(void) { /* TODO: Ditch malloc here, this can be done statically */ size_t adcBufferSize = sizeof(uint16_t) * TOTAL_ADC_CHANNELS; ADCConvertedValues = portMalloc(adcBufferSize); memset(ADCConvertedValues, 0, adcBufferSize); ADC_InitTypeDef ADC_InitStructure; ADC_CommonInitTypeDef ADC_CommonInitStructure; DMA_InitTypeDef DMA_InitStructure; ADC_DeInit(); ADC_GPIO_Configuration(); /* Enable peripheral clocks ************************************************ */ RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA2, ENABLE); RCC_APB2PeriphClockCmd(RCC_APB2Periph_ADC2, ENABLE); /* DMA2_Stream0 channel0 configuration ************************************* */ DMA_DeInit(DMA2_Stream2); DMA_InitStructure.DMA_Channel = DMA_Channel_1; DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)&ADC2->DR; DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)&ADCConvertedValues[0]; DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralToMemory; DMA_InitStructure.DMA_BufferSize = 9; DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable; DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable; DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord; DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord; DMA_InitStructure.DMA_Mode = DMA_Mode_Circular; DMA_InitStructure.DMA_Priority = DMA_Priority_High; DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable; DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_HalfFull; DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single; DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single; DMA_Init(DMA2_Stream2, &DMA_InitStructure); /* DMA2_Stream0 enable */ DMA_Cmd(DMA2_Stream2, ENABLE); /* ADC Common Init ********************************************************* */ ADC_CommonInitStructure.ADC_Mode = ADC_Mode_Independent; ADC_CommonInitStructure.ADC_Prescaler = ADC_Prescaler_Div2; ADC_CommonInitStructure.ADC_DMAAccessMode = ADC_DMAAccessMode_1; ADC_CommonInitStructure.ADC_TwoSamplingDelay = ADC_TwoSamplingDelay_5Cycles; ADC_CommonInit(&ADC_CommonInitStructure); /* ADC2 Init *************************************************************** */ ADC_InitStructure.ADC_Resolution = ADC_Resolution_12b; ADC_InitStructure.ADC_ScanConvMode = ENABLE; ADC_InitStructure.ADC_ContinuousConvMode = ENABLE; ADC_InitStructure.ADC_ExternalTrigConvEdge = ADC_ExternalTrigConvEdge_None; ADC_InitStructure.ADC_ExternalTrigConv = ADC_ExternalTrigConv_T1_CC1; ADC_InitStructure.ADC_DataAlign = ADC_DataAlign_Right; ADC_InitStructure.ADC_NbrOfConversion = 9; ADC_Init(ADC2, &ADC_InitStructure); /* ADC2 regular channel configuration ***************************** */ ADC_RegularChannelConfig(ADC2, ADC_Channel_14, 1, ADC_SampleTime_480Cycles); ADC_RegularChannelConfig(ADC2, ADC_Channel_15, 2, ADC_SampleTime_480Cycles); ADC_RegularChannelConfig(ADC2, ADC_Channel_8, 3, ADC_SampleTime_480Cycles); ADC_RegularChannelConfig(ADC2, ADC_Channel_9, 4, ADC_SampleTime_480Cycles); ADC_RegularChannelConfig(ADC2, ADC_Channel_13, 5, ADC_SampleTime_480Cycles); ADC_RegularChannelConfig(ADC2, ADC_Channel_12, 6, ADC_SampleTime_480Cycles); ADC_RegularChannelConfig(ADC2, ADC_Channel_11, 7, ADC_SampleTime_480Cycles); ADC_RegularChannelConfig(ADC2, ADC_Channel_4, 8, ADC_SampleTime_480Cycles); ADC_RegularChannelConfig(ADC2, ADC_Channel_10, 9, ADC_SampleTime_480Cycles); /* Enable DMA request after last transfer (Single-ADC mode) */ ADC_DMARequestAfterLastTransferCmd(ADC2, ENABLE); /* Enable ADC2 DMA */ ADC_DMACmd(ADC2, ENABLE); /* Enable ADC2 ************************************************************* */ ADC_Cmd(ADC2, ENABLE); /* Start ADC2 Software Conversion */ ADC_SoftwareStartConv(ADC2); return 1; }
void Usart::sendbydma(const char *data, const int len){ strcpy(send_buf, data); DMA_ClearFlag(DMA2_Stream7, DMA_FLAG_TCIF7); DMA_Cmd(DMA2_Stream7, ENABLE); USART_DMACmd(USART1, USART_DMAReq_Tx, ENABLE); }
/** * @brief ADC1 Channel Vbat configuration * @note This function Configure the ADC peripheral 1) Enable peripheral clocks 2) DMA2_Stream0 channel 0 configuration 3) Configure ADC1 Channel18 (VBAT) * @param None * @retval None */ static void ADC_Config(void) { ADC_InitTypeDef ADC_InitStructure; ADC_CommonInitTypeDef ADC_CommonInitStructure; DMA_InitTypeDef DMA_InitStructure; /* Enable peripheral clocks *************************************************/ RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA2, ENABLE); RCC_APB2PeriphClockCmd(ADCx_CLK, ENABLE); /* DMA2_Stream0 channel0 configuration **************************************/ DMA_DeInit(DMA2_Stream0); DMA_InitStructure.DMA_Channel = DMA_CHANNELx; DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)ADCx_DR_ADDRESS; DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)&uhADCConvertedValue; DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralToMemory; DMA_InitStructure.DMA_BufferSize = 1; DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable; DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Disable; DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord; DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord; DMA_InitStructure.DMA_Mode = DMA_Mode_Circular; DMA_InitStructure.DMA_Priority = DMA_Priority_High; DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable; DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_HalfFull; DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single; DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single; DMA_Init(DMA_STREAMx, &DMA_InitStructure); /* DMA2_Stream0 enable */ DMA_Cmd(DMA_STREAMx, ENABLE); /* ADC Common Init **********************************************************/ ADC_CommonInitStructure.ADC_Mode = ADC_Mode_Independent; ADC_CommonInitStructure.ADC_Prescaler = ADC_Prescaler_Div2; ADC_CommonInitStructure.ADC_DMAAccessMode = ADC_DMAAccessMode_Disabled; ADC_CommonInitStructure.ADC_TwoSamplingDelay = ADC_TwoSamplingDelay_5Cycles; ADC_CommonInit(&ADC_CommonInitStructure); /* ADC1 Init ****************************************************************/ ADC_InitStructure.ADC_Resolution = ADC_Resolution_12b; ADC_InitStructure.ADC_ScanConvMode = DISABLE; ADC_InitStructure.ADC_ContinuousConvMode = ENABLE; ADC_InitStructure.ADC_ExternalTrigConvEdge = ADC_ExternalTrigConvEdge_None; ADC_InitStructure.ADC_ExternalTrigConv = ADC_ExternalTrigConv_T1_CC1; ADC_InitStructure.ADC_DataAlign = ADC_DataAlign_Right; ADC_InitStructure.ADC_NbrOfConversion = 1; ADC_Init(ADCx, &ADC_InitStructure); /* Enable ADC1 DMA */ ADC_DMACmd(ADCx, ENABLE); /* ADC1 regular channel18 (VBAT) configuration ******************************/ ADC_RegularChannelConfig(ADCx, ADC_Channel_Vbat, 1, ADC_SampleTime_15Cycles); /* Enable VBAT channel */ ADC_VBATCmd(ENABLE); /* Enable DMA request after last transfer (Single-ADC mode) */ ADC_DMARequestAfterLastTransferCmd(ADCx, ENABLE); /* Enable ADC1 **************************************************************/ ADC_Cmd(ADCx, ENABLE); }
void AGC_Init(void) { NVIC_InitTypeDef NVIC_InitStructure; ADC_InitTypeDef ADC_InitStructure; DMA_InitTypeDef DMA_InitStructure; GPIO_InitTypeDef GPIO_InitStructure; NVIC_InitStructure.NVIC_IRQChannel = DMA2_Channel4_5_IRQn; NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 2; NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0; NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; NVIC_Init(&NVIC_InitStructure); RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA, ENABLE); GPIO_InitStructure.GPIO_Pin = ADC_CHANNEL10_PIN; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AIN; GPIO_Init(ADC_PORT, &GPIO_InitStructure); RCC_ADCCLKConfig(RCC_PCLK2_Div6); RCC_APB2PeriphClockCmd(RCC_APB2Periph_ADC3, ENABLE); ADC_DeInit(ADC3); ADC_InitStructure.ADC_Mode = ADC_Mode_Independent; ADC_InitStructure.ADC_ScanConvMode = DISABLE; ADC_InitStructure.ADC_ContinuousConvMode = DISABLE; ADC_InitStructure.ADC_ExternalTrigConv = ADC_ExternalTrigConv_T8_TRGO; ADC_InitStructure.ADC_DataAlign = ADC_DataAlign_Right; ADC_InitStructure.ADC_NbrOfChannel = 1; ADC_Init(ADC3, &ADC_InitStructure); ADC_RegularChannelConfig(ADC3, ADC_Channel_10, 1, ADC_SampleTime_71Cycles5); ADC_DMACmd(ADC3, ENABLE); ADC_Cmd(ADC3, ENABLE); ADC_ResetCalibration(ADC3); while (ADC_GetResetCalibrationStatus(ADC3)) ; ADC_StartCalibration(ADC3); while (ADC_GetCalibrationStatus(ADC3)) ; ADC_ExternalTrigConvCmd(ADC3, ENABLE); RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA2, ENABLE); DMA_DeInit(DMA2_Channel5); DMA_InitStructure.DMA_PeripheralBaseAddr = ADC3_DR_ADDRESS; DMA_InitStructure.DMA_MemoryBaseAddr = (u32) (&AgcSampleBuf); DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralSRC; DMA_InitStructure.DMA_BufferSize = AGC_BUF_NUM; DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable; DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable; DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord; DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord; DMA_InitStructure.DMA_Mode = DMA_Mode_Circular; DMA_InitStructure.DMA_Priority = DMA_Priority_Medium; DMA_InitStructure.DMA_M2M = DMA_M2M_Disable; DMA_Init(DMA2_Channel5, &DMA_InitStructure); DMA_ClearFlag(DMA2_IT_TC5 | DMA2_IT_HT5); DMA_ITConfig(DMA2_Channel5, DMA_IT_TC | DMA_IT_HT, ENABLE); DMA_Cmd(DMA2_Channel5, ENABLE); #ifdef FILTER ch1_iir_reset(); #endif PGA113_Init(); }
void adcInit(adcConfig_t *config) { ADC_InitTypeDef ADC_InitStructure; DMA_InitTypeDef DMA_InitStructure; uint8_t i; uint8_t configuredAdcChannels = 0; memset(&adcOperatingConfig, 0, sizeof(adcOperatingConfig)); if (config->vbat.enabled) { adcOperatingConfig[ADC_BATTERY].tag = config->vbat.ioTag; } if (config->rssi.enabled) { adcOperatingConfig[ADC_RSSI].tag = config->rssi.ioTag; //RSSI_ADC_CHANNEL; } if (config->external1.enabled) { adcOperatingConfig[ADC_EXTERNAL1].tag = config->external1.ioTag; //EXTERNAL1_ADC_CHANNEL; } if (config->currentMeter.enabled) { adcOperatingConfig[ADC_CURRENT].tag = config->currentMeter.ioTag; //CURRENT_METER_ADC_CHANNEL; } ADCDevice device = adcDeviceByInstance(ADC_INSTANCE); if (device == ADCINVALID) return; adcDevice_t adc = adcHardware[device]; bool adcActive = false; for (int i = 0; i < ADC_CHANNEL_COUNT; i++) { if (!adcOperatingConfig[i].tag) continue; adcActive = true; IOInit(IOGetByTag(adcOperatingConfig[i].tag), OWNER_ADC_BATT + i, 0); IOConfigGPIO(IOGetByTag(adcOperatingConfig[i].tag), IO_CONFIG(GPIO_Mode_AN, 0, GPIO_OType_OD, GPIO_PuPd_NOPULL)); adcOperatingConfig[i].adcChannel = adcChannelByTag(adcOperatingConfig[i].tag); adcOperatingConfig[i].dmaIndex = configuredAdcChannels++; adcOperatingConfig[i].sampleTime = ADC_SampleTime_480Cycles; adcOperatingConfig[i].enabled = true; } if (!adcActive) { return; } RCC_ClockCmd(adc.rccADC, ENABLE); dmaInit(dmaGetIdentifier(adc.DMAy_Streamx), OWNER_ADC, 0); DMA_DeInit(adc.DMAy_Streamx); DMA_StructInit(&DMA_InitStructure); DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)&adc.ADCx->DR; DMA_InitStructure.DMA_Channel = adc.channel; DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)adcValues; DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralToMemory; DMA_InitStructure.DMA_BufferSize = configuredAdcChannels; DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable; DMA_InitStructure.DMA_MemoryInc = configuredAdcChannels > 1 ? DMA_MemoryInc_Enable : DMA_MemoryInc_Disable; DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord; DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord; DMA_InitStructure.DMA_Mode = DMA_Mode_Circular; DMA_InitStructure.DMA_Priority = DMA_Priority_High; DMA_Init(adc.DMAy_Streamx, &DMA_InitStructure); DMA_Cmd(adc.DMAy_Streamx, ENABLE); ADC_CommonInitTypeDef ADC_CommonInitStructure; ADC_CommonStructInit(&ADC_CommonInitStructure); ADC_CommonInitStructure.ADC_Mode = ADC_Mode_Independent; ADC_CommonInitStructure.ADC_Prescaler = ADC_Prescaler_Div8; ADC_CommonInitStructure.ADC_DMAAccessMode = ADC_DMAAccessMode_Disabled; ADC_CommonInitStructure.ADC_TwoSamplingDelay = ADC_TwoSamplingDelay_5Cycles; ADC_CommonInit(&ADC_CommonInitStructure); ADC_StructInit(&ADC_InitStructure); ADC_InitStructure.ADC_ContinuousConvMode = ENABLE; ADC_InitStructure.ADC_Resolution = ADC_Resolution_12b; ADC_InitStructure.ADC_ExternalTrigConv = ADC_ExternalTrigConv_T1_CC1; ADC_InitStructure.ADC_ExternalTrigConvEdge = ADC_ExternalTrigConvEdge_None; ADC_InitStructure.ADC_DataAlign = ADC_DataAlign_Right; ADC_InitStructure.ADC_NbrOfConversion = configuredAdcChannels; ADC_InitStructure.ADC_ScanConvMode = configuredAdcChannels > 1 ? ENABLE : DISABLE; // 1=scan more that one channel in group ADC_Init(adc.ADCx, &ADC_InitStructure); uint8_t rank = 1; for (i = 0; i < ADC_CHANNEL_COUNT; i++) { if (!adcOperatingConfig[i].enabled) { continue; } ADC_RegularChannelConfig(adc.ADCx, adcOperatingConfig[i].adcChannel, rank++, adcOperatingConfig[i].sampleTime); } ADC_DMARequestAfterLastTransferCmd(adc.ADCx, ENABLE); ADC_DMACmd(adc.ADCx, ENABLE); ADC_Cmd(adc.ADCx, ENABLE); ADC_SoftwareStartConv(adc.ADCx); }
void DMA_I2C1MasterWrite(unsigned char device_id, unsigned short mem_byte_addr, unsigned short tx_count, unsigned char *tx_data ) { unsigned short temp; unsigned short i; unsigned char *p; DMA_InitTypeDef DMA_InitStructure; p = tx_data; for(i=0;i<tx_count;i++) { *((volatile unsigned int*)(0x20003000+i*4)) = *(p++); } //I2C_Cmd(I2C1, DISABLE); I2C_Send7bitAddress(I2C1, 0xA8, I2C_Direction_Transmitter); I2C_Cmd(I2C1, ENABLE); //send byte mem addr temp = ((mem_byte_addr) & 0xff); I2CTXByte(I2C1,CMD_WRITE,temp); //tx memory addr I2C_DMA_DIR = TDMAE_SET; I2C_DMACmd(I2C1, ENABLE); DMA_DeInit(DMA1_Channel7); /* DMA_InitStructure.DMA_PeripheralBaseAddr = (I2C1_BASE + 0x10); DMA_InitStructure.DMA_MemoryBaseAddr = 0x20003000; DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralDST ; DMA_InitStructure.DMA_BufferSize = tx_count; DMA_InitStructure.DMA_PeripheralInc = DMA_DstInc_Disable; DMA_InitStructure.DMA_MemoryInc = DMA_SrcInc_Enable; DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte; DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte; DMA_InitStructure.DMA_Mode = DMA_Mode_Hardware; DMA_InitStructure.DMA_Priority = DMA_Priority_Low; DMA_InitStructure.DMA_DST_PER = DST_PER_ACK6; DMA_InitStructure.DMA_SRC_PER = SRC_PER_ACK1; */ DMA_InitStructure.DMA_PeripheralBaseAddr = (I2C1_BASE + 0x10); DMA_InitStructure.DMA_MemoryBaseAddr =0x20003000; DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralDST ; DMA_InitStructure.DMA_BufferSize = tx_count; DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable; DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable; DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte; DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte; DMA_InitStructure.DMA_Mode = DMA_Mode_Normal; DMA_InitStructure.DMA_Priority = DMA_Priority_Low; DMA_InitStructure.DMA_M2M = DMA_M2M_Disable; DMA_Init(DMA1_Channel7, &DMA_InitStructure); DMA_Cmd(DMA1_Channel7, ENABLE); DMAcheckStatus(DMA1_FLAG_TC7); I2CTXEmptyCheck(I2C1); //dec stop while(1) { if(I2C_GetITStatus(I2C1, I2C_FLAG_STOP_DET)) { temp = I2C1->IC_CLR_STOP_DET; break; } } DMA_Cmd(DMA1_Channel7, DISABLE); I2C_DMACmd(I2C1, DISABLE); Delay(0x000ffff); //I2C_Cmd(I2C1, DISABLE); }
void adcInit(void) { GPIO_InitTypeDef GPIO_InitStructure; DMA_InitTypeDef DMA_InitStructure; ADC_CommonInitTypeDef ADC_CommonInitStructure; ADC_InitTypeDef ADC_InitStructure; NVIC_InitTypeDef NVIC_InitStructure; AQ_NOTICE("ADC init\n"); memset((void *)&adcData, 0, sizeof(adcData)); // energize mag's set/reset circuit adcData.magSetReset = digitalInit(GPIOE, GPIO_Pin_10, 1); // use auto-zero function of gyros adcData.rateAutoZero = digitalInit(GPIOE, GPIO_Pin_8, 0); // bring ACC's SELF TEST line low adcData.accST = digitalInit(GPIOE, GPIO_Pin_12, 0); // bring ACC's SCALE line low (ADXL3X5 requires this line be tied to GND or left floating) adcData.accScale = digitalInit(GPIOC, GPIO_Pin_15, 0); GPIO_StructInit(&GPIO_InitStructure); GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AN; GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL; GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_2 | GPIO_Pin_3 | GPIO_Pin_4 | GPIO_Pin_5 | GPIO_Pin_6 | GPIO_Pin_7; GPIO_Init(GPIOA, &GPIO_InitStructure); GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1; GPIO_Init(GPIOB, &GPIO_InitStructure); GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_2 | GPIO_Pin_3 | GPIO_Pin_4 | GPIO_Pin_5; GPIO_Init(GPIOC, &GPIO_InitStructure); RCC_APB2PeriphClockCmd(RCC_APB2Periph_ADC1 | RCC_APB2Periph_ADC2 | RCC_APB2Periph_ADC3, ENABLE); adcData.sample = ADC_SAMPLES - 1; // Use STM32F4's Triple Regular Simultaneous Mode capable of ~ 6M samples per second DMA_DeInit(ADC_DMA_STREAM); DMA_InitStructure.DMA_Channel = ADC_DMA_CHANNEL; DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)adcDMAData.adc123Raw1; DMA_InitStructure.DMA_PeripheralBaseAddr = ((uint32_t)0x40012308); DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralToMemory; DMA_InitStructure.DMA_BufferSize = ADC_CHANNELS * 3 * 2; DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable; DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable; DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord; DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord; DMA_InitStructure.DMA_Mode = DMA_Mode_Circular; DMA_InitStructure.DMA_Priority = DMA_Priority_VeryHigh; DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Enable; DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_Full; DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single; DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single; DMA_Init(ADC_DMA_STREAM, &DMA_InitStructure); DMA_ITConfig(ADC_DMA_STREAM, DMA_IT_HT | DMA_IT_TC, ENABLE); DMA_ClearITPendingBit(ADC_DMA_STREAM, ADC_DMA_FLAGS); DMA_Cmd(ADC_DMA_STREAM, ENABLE); NVIC_InitStructure.NVIC_IRQChannel = ADC_DMA_IRQ; NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0; NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0; NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; NVIC_Init(&NVIC_InitStructure); // ADC Common Init ADC_CommonStructInit(&ADC_CommonInitStructure); ADC_CommonInitStructure.ADC_Mode = ADC_TripleMode_RegSimult; ADC_CommonInitStructure.ADC_Prescaler = ADC_Prescaler_Div2; ADC_CommonInitStructure.ADC_DMAAccessMode = ADC_DMAAccessMode_1; ADC_CommonInit(&ADC_CommonInitStructure); // ADC1 configuration ADC_StructInit(&ADC_InitStructure); ADC_InitStructure.ADC_Resolution = ADC_Resolution_12b; ADC_InitStructure.ADC_ScanConvMode = ENABLE; ADC_InitStructure.ADC_ContinuousConvMode = ENABLE; ADC_InitStructure.ADC_ExternalTrigConvEdge = ADC_ExternalTrigConvEdge_None; ADC_InitStructure.ADC_DataAlign = ADC_DataAlign_Right; ADC_InitStructure.ADC_NbrOfConversion = 16; ADC_Init(ADC1, &ADC_InitStructure); ADC_RegularChannelConfig(ADC1, ADC_CHANNEL_MAGX, 1, ADC_SAMPLE_TIME); // magX ADC_RegularChannelConfig(ADC1, ADC_CHANNEL_MAGX, 2, ADC_SAMPLE_TIME); // magX ADC_RegularChannelConfig(ADC1, ADC_CHANNEL_MAGX, 3, ADC_SAMPLE_TIME); // magX ADC_RegularChannelConfig(ADC1, ADC_CHANNEL_MAGX, 4, ADC_SAMPLE_TIME); // magX ADC_RegularChannelConfig(ADC1, ADC_CHANNEL_MAGY, 5, ADC_SAMPLE_TIME); // magY ADC_RegularChannelConfig(ADC1, ADC_CHANNEL_MAGY, 6, ADC_SAMPLE_TIME); // magY ADC_RegularChannelConfig(ADC1, ADC_CHANNEL_MAGY, 7, ADC_SAMPLE_TIME); // magY ADC_RegularChannelConfig(ADC1, ADC_CHANNEL_MAGY, 8, ADC_SAMPLE_TIME); // magY ADC_RegularChannelConfig(ADC1, ADC_CHANNEL_MAGZ, 9, ADC_SAMPLE_TIME); // magZ ADC_RegularChannelConfig(ADC1, ADC_CHANNEL_MAGZ, 10, ADC_SAMPLE_TIME); // magZ ADC_RegularChannelConfig(ADC1, ADC_CHANNEL_MAGZ, 11, ADC_SAMPLE_TIME); // magZ ADC_RegularChannelConfig(ADC1, ADC_CHANNEL_MAGZ, 12, ADC_SAMPLE_TIME); // magZ ADC_RegularChannelConfig(ADC1, ADC_CHANNEL_RATEX, 13, ADC_SAMPLE_TIME); // rateX ADC_RegularChannelConfig(ADC1, ADC_CHANNEL_RATEX, 14, ADC_SAMPLE_TIME); // rateX ADC_RegularChannelConfig(ADC1, ADC_CHANNEL_RATEX, 15, ADC_SAMPLE_TIME); // rateX ADC_RegularChannelConfig(ADC1, ADC_CHANNEL_RATEX, 16, ADC_SAMPLE_TIME); // rateX // Enable ADC1 DMA since ADC1 is the Master ADC_DMACmd(ADC1, ENABLE); // ADC2 configuration ADC_StructInit(&ADC_InitStructure); ADC_InitStructure.ADC_Resolution = ADC_Resolution_12b; ADC_InitStructure.ADC_ScanConvMode = ENABLE; ADC_InitStructure.ADC_ContinuousConvMode = ENABLE; ADC_InitStructure.ADC_ExternalTrigConvEdge = ADC_ExternalTrigConvEdge_None; ADC_InitStructure.ADC_DataAlign = ADC_DataAlign_Right; ADC_InitStructure.ADC_NbrOfConversion = 16; ADC_Init(ADC2, &ADC_InitStructure); ADC_RegularChannelConfig(ADC2, ADC_CHANNEL_RATEY, 1, ADC_SAMPLE_TIME); // rateY ADC_RegularChannelConfig(ADC2, ADC_CHANNEL_RATEY, 2, ADC_SAMPLE_TIME); // rateY ADC_RegularChannelConfig(ADC2, ADC_CHANNEL_RATEY, 3, ADC_SAMPLE_TIME); // rateY ADC_RegularChannelConfig(ADC2, ADC_CHANNEL_RATEY, 4, ADC_SAMPLE_TIME); // rateY ADC_RegularChannelConfig(ADC2, ADC_CHANNEL_ACCX, 5, ADC_SAMPLE_TIME); // accX ADC_RegularChannelConfig(ADC2, ADC_CHANNEL_ACCX, 6, ADC_SAMPLE_TIME); // accX ADC_RegularChannelConfig(ADC2, ADC_CHANNEL_ACCX, 7, ADC_SAMPLE_TIME); // accX ADC_RegularChannelConfig(ADC2, ADC_CHANNEL_ACCX, 8, ADC_SAMPLE_TIME); // accX ADC_RegularChannelConfig(ADC2, ADC_CHANNEL_ACCY, 9, ADC_SAMPLE_TIME); // accY ADC_RegularChannelConfig(ADC2, ADC_CHANNEL_ACCY, 10, ADC_SAMPLE_TIME); // accY ADC_RegularChannelConfig(ADC2, ADC_CHANNEL_ACCY, 11, ADC_SAMPLE_TIME); // accY ADC_RegularChannelConfig(ADC2, ADC_CHANNEL_ACCY, 12, ADC_SAMPLE_TIME); // accY ADC_RegularChannelConfig(ADC2, ADC_CHANNEL_ACCZ, 13, ADC_SAMPLE_TIME); // accZ ADC_RegularChannelConfig(ADC2, ADC_CHANNEL_ACCZ, 14, ADC_SAMPLE_TIME); // accZ ADC_RegularChannelConfig(ADC2, ADC_CHANNEL_ACCZ, 15, ADC_SAMPLE_TIME); // accZ ADC_RegularChannelConfig(ADC2, ADC_CHANNEL_ACCZ, 16, ADC_SAMPLE_TIME); // accZ // ADC3 configuration ADC_StructInit(&ADC_InitStructure); ADC_InitStructure.ADC_Resolution = ADC_Resolution_12b; ADC_InitStructure.ADC_ScanConvMode = ENABLE; ADC_InitStructure.ADC_ContinuousConvMode = ENABLE; ADC_InitStructure.ADC_ExternalTrigConvEdge = ADC_ExternalTrigConvEdge_None; ADC_InitStructure.ADC_DataAlign = ADC_DataAlign_Right; ADC_InitStructure.ADC_NbrOfConversion = 16; ADC_Init(ADC3, &ADC_InitStructure); ADC_RegularChannelConfig(ADC3, ADC_CHANNEL_RATEZ, 1, ADC_SAMPLE_TIME); // rateZ ADC_RegularChannelConfig(ADC3, ADC_CHANNEL_RATEZ, 2, ADC_SAMPLE_TIME); // rateZ ADC_RegularChannelConfig(ADC3, ADC_CHANNEL_RATEZ, 3, ADC_SAMPLE_TIME); // rateZ ADC_RegularChannelConfig(ADC3, ADC_CHANNEL_RATEZ, 4, ADC_SAMPLE_TIME); // rateZ ADC_RegularChannelConfig(ADC3, ADC_CHANNEL_TEMP1, 5, ADC_SAMPLE_TIME); // temp1 ADC_RegularChannelConfig(ADC3, ADC_CHANNEL_TEMP2, 6, ADC_SAMPLE_TIME); // temp2 ADC_RegularChannelConfig(ADC3, ADC_CHANNEL_PRES1, 7, ADC_SAMPLE_TIME); // pressure1 ADC_RegularChannelConfig(ADC3, ADC_CHANNEL_PRES1, 8, ADC_SAMPLE_TIME); // pressure1 ADC_RegularChannelConfig(ADC3, ADC_CHANNEL_PRES1, 9, ADC_SAMPLE_TIME); // pressure1 ADC_RegularChannelConfig(ADC3, ADC_CHANNEL_PRES1, 10, ADC_SAMPLE_TIME); // pressure1 ADC_RegularChannelConfig(ADC3, ADC_CHANNEL_VIN, 11, ADC_SAMPLE_TIME); // Vin ADC_RegularChannelConfig(ADC3, ADC_CHANNEL_TEMP3, 12, ADC_SAMPLE_TIME); // temp3 ADC_RegularChannelConfig(ADC3, ADC_CHANNEL_PRES2, 13, ADC_SAMPLE_TIME); // pressure2 ADC_RegularChannelConfig(ADC3, ADC_CHANNEL_PRES2, 14, ADC_SAMPLE_TIME); // pressure2 ADC_RegularChannelConfig(ADC3, ADC_CHANNEL_PRES2, 15, ADC_SAMPLE_TIME); // pressure2 ADC_RegularChannelConfig(ADC3, ADC_CHANNEL_PRES2, 16, ADC_SAMPLE_TIME); // pressure2 // Enable DMA request after last transfer (Multi-ADC mode) ADC_MultiModeDMARequestAfterLastTransferCmd(ENABLE); // Enable ADC_Cmd(ADC1, ENABLE); ADC_Cmd(ADC2, ENABLE); ADC_Cmd(ADC3, ENABLE); adcData.adcFlag = CoCreateFlag(1, 0); adcTaskStack = aqStackInit(ADC_STACK_SIZE, "ADC"); adcData.adcTask = CoCreateTask(adcTaskCode, (void *)0, ADC_PRIORITY, &adcTaskStack[ADC_STACK_SIZE-1], ADC_STACK_SIZE); // Start ADC1 Software Conversion ADC_SoftwareStartConv(ADC1); yield(100); // set initial temperatures adcData.temp1 = adcIDGVoltsToTemp(adcData.voltages[ADC_VOLTS_TEMP1]); adcData.temp2 = adcIDGVoltsToTemp(adcData.voltages[ADC_VOLTS_TEMP2]); adcData.temp3 = adcT1VoltsToTemp(adcData.voltages[ADC_VOLTS_TEMP3]); analogData.vIn = adcVsenseToVin(adcData.voltages[ADC_VOLTS_VIN]); adcCalibOffsets(); }
/*=====================================================================================================*/ void ADC_Config( void ) { DMA_InitTypeDef DMA_InitStruct; ADC_InitTypeDef ADC_InitStruct; ADC_CommonInitTypeDef ADC_CommonInitStruct; GPIO_InitTypeDef GPIO_InitStruct; /* ADC Clk Init *************************************************************/ RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOA, ENABLE); RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA2, ENABLE); RCC_APB2PeriphClockCmd(RCC_APB2Periph_ADC1, ENABLE); /* ADC_I PA4 */ /* ADC_V PA5 */ GPIO_InitStruct.GPIO_Pin = GPIO_Pin_4 | GPIO_Pin_5; GPIO_InitStruct.GPIO_Mode = GPIO_Mode_AN; GPIO_InitStruct.GPIO_PuPd = GPIO_PuPd_NOPULL; GPIO_Init(GPIOA, &GPIO_InitStruct); /* ADC DMA Init *************************************************************/ DMA_InitStruct.DMA_Channel = DMA_Channel_0; DMA_InitStruct.DMA_PeripheralBaseAddr = (u32)ADC1_DR_ADDRESS; // Peripheral address DMA_InitStruct.DMA_Memory0BaseAddr = (u32)&ADC_DMA_Buf; // Memory address DMA_InitStruct.DMA_DIR = DMA_DIR_PeripheralToMemory; // Peripheral to Memory DMA_InitStruct.DMA_BufferSize = ADC_Sample*ADC_Channel; // Memory Buffer Size DMA_InitStruct.DMA_PeripheralInc = DMA_PeripheralInc_Disable; // Peripheral address 遞增 Disable DMA_InitStruct.DMA_MemoryInc = DMA_MemoryInc_Enable; // Memory address 遞增 Enable DMA_InitStruct.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord; // Peripheral Data Size 16bit DMA_InitStruct.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord; // Memory Data Size 16bit DMA_InitStruct.DMA_Mode = DMA_Mode_Circular; // 循環模式 Enable DMA_InitStruct.DMA_Priority = DMA_Priority_High; // ADC DMA通道 高優先級 DMA_InitStruct.DMA_FIFOMode = DMA_FIFOMode_Disable; // DMA FIFO Disable DMA_InitStruct.DMA_FIFOThreshold = DMA_FIFOThreshold_HalfFull; DMA_InitStruct.DMA_MemoryBurst = DMA_MemoryBurst_Single; DMA_InitStruct.DMA_PeripheralBurst = DMA_PeripheralBurst_Single; DMA_Init(DMA2_Stream0, &DMA_InitStruct); DMA_Cmd(DMA2_Stream0, ENABLE); /* ADC Common Init **********************************************************/ ADC_CommonInitStruct.ADC_Mode = ADC_Mode_Independent; // 獨立模式 ADC_CommonInitStruct.ADC_Prescaler = ADC_Prescaler_Div2; // 預分頻2 ADC_CommonInitStruct.ADC_DMAAccessMode = ADC_DMAAccessMode_Disabled; // ADC DMA Mode Disable ADC_CommonInitStruct.ADC_TwoSamplingDelay = ADC_TwoSamplingDelay_5Cycles; // 轉換延遲時間 ADC_CommonInit(&ADC_CommonInitStruct); /* ADC Init *****************************************************************/ ADC_InitStruct.ADC_Resolution = ADC_Resolution_12b; // 解析度 12bit ADC_InitStruct.ADC_ScanConvMode = ENABLE; // 掃描模式 ADC_InitStruct.ADC_ContinuousConvMode = ENABLE; // 連續轉換模式 ADC_InitStruct.ADC_ExternalTrigConvEdge = ADC_ExternalTrigConvEdge_None; // 外部觸發 Disable ADC_InitStruct.ADC_DataAlign = ADC_DataAlign_Right; // ADC數據右對齊 ADC_InitStruct.ADC_NbrOfConversion = ADC_Channel; // 轉換ADC通道數目 ADC_Init(ADC1, &ADC_InitStruct); /* ADC Regular Config *******************************************************/ ADC_RegularChannelConfig(ADC1, ADC_Channel_4, 1, ADC_SampleTime_3Cycles); // ADC_I ADC_RegularChannelConfig(ADC1, ADC_Channel_5, 2, ADC_SampleTime_3Cycles); // ADC_V ADC_DMARequestAfterLastTransferCmd(ADC1, ENABLE); ADC_DMACmd(ADC1, ENABLE); ADC_ContinuousModeCmd(ADC1, ENABLE); ADC_Cmd(ADC1, ENABLE); ADC_SoftwareStartConv(ADC1); }
void SENSOR_Force_Init(void) { GPIO_InitTypeDef GPIO_InitStructure; ADC_InitTypeDef ADC_InitStructure; ADC_CommonInitTypeDef ADC_CommonInitStructure; DMA_InitTypeDef DMA_InitStructure; /* GPIO Config ------------------------------------------------------------------*/ /* Enable GPIOF Clock */ RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOF, ENABLE); // Configure ADC3 Channel13 pin as analog input for New Force sensors' (1,2,3,4) I/Os GPIO_StructInit(&GPIO_InitStructure); // Reset init structure, if not it can cause issues... //ADC3 CH9 CH14 CH15 CH4 CH5 CH6 CH7 CH8 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_3|GPIO_Pin_4|GPIO_Pin_5|GPIO_Pin_6| GPIO_Pin_7|GPIO_Pin_8|GPIO_Pin_9|GPIO_Pin_10; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AN; GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; GPIO_InitStructure.GPIO_OType = GPIO_OType_PP; GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_DOWN; GPIO_Init(GPIOF, &GPIO_InitStructure); /* DMA2 Config ------------------------------------------------------------------*/ /* Enable DMA2 Clock */ RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA2, ENABLE); /* DMA2 Stream0 channel0 configuration */ DMA_DeInit(DMA2_Stream1); DMA_InitStructure.DMA_Channel = DMA_Channel_2; DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)ADC3_DR_ADDRESS; DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)&ADC3ConvertedValue; DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralToMemory; DMA_InitStructure.DMA_BufferSize = 8; DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable; DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable; DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord; DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord; DMA_InitStructure.DMA_Mode = DMA_Mode_Circular; DMA_InitStructure.DMA_Priority = DMA_Priority_High; DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable; DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_HalfFull; DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single; DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single; DMA_Init(DMA2_Stream1, &DMA_InitStructure); DMA_Cmd(DMA2_Stream1, ENABLE); /* ADC Config -------------------------------------------------------------------*/ /* Enable ADC3 Clock */ RCC_APB2PeriphClockCmd(RCC_APB2Periph_ADC3,ENABLE); /* ADC Common Init */ ADC_CommonInitStructure.ADC_Mode = ADC_Mode_Independent; ADC_CommonInitStructure.ADC_Prescaler = ADC_Prescaler_Div4; ADC_CommonInitStructure.ADC_DMAAccessMode = ADC_DMAAccessMode_1; // //ADC_CommonInitStructure.ADC_DMAAccessMode = ADC_DMAAccessMode_Disabled; ADC_CommonInitStructure.ADC_TwoSamplingDelay = ADC_TwoSamplingDelay_15Cycles; ADC_CommonInit(&ADC_CommonInitStructure); /* ADC1 Init */ ADC_InitStructure.ADC_Resolution = ADC_Resolution_12b; //ADC_InitStructure.ADC_ScanConvMode = DISABLE; ADC_InitStructure.ADC_ScanConvMode = ENABLE; ADC_InitStructure.ADC_ContinuousConvMode = ENABLE; // gtz02nov ADC_InitStructure.ADC_ExternalTrigConv = ADC_ExternalTrigConvEdge_None; ADC_InitStructure.ADC_ExternalTrigConvEdge = ADC_ExternalTrigConvEdge_None; //gtz01nov ADC_InitStructure.ADC_ExternalTrigConv = ADC_ExternalTrigConv_T1_CC1; ADC_InitStructure.ADC_DataAlign = ADC_DataAlign_Right; //ADC_InitStructure.ADC_NbrOfConversion = 1; ADC_InitStructure.ADC_NbrOfConversion = 8; ADC_Init(ADC3, &ADC_InitStructure); /* ADC3 regular channelx configuration */ ADC_RegularChannelConfig(ADC3, ADC_Channel_9, 1, ADC_SampleTime_144Cycles);// PF3 ADC_RegularChannelConfig(ADC3, ADC_Channel_14, 2, ADC_SampleTime_144Cycles);// PF4 ADC_RegularChannelConfig(ADC3, ADC_Channel_15, 3, ADC_SampleTime_144Cycles);// PF5 ADC_RegularChannelConfig(ADC3, ADC_Channel_4, 4, ADC_SampleTime_144Cycles);// PF6 ADC_RegularChannelConfig(ADC3, ADC_Channel_5, 5, ADC_SampleTime_144Cycles);// PF7 ADC_RegularChannelConfig(ADC3, ADC_Channel_6, 6, ADC_SampleTime_144Cycles);// PF8 ADC_RegularChannelConfig(ADC3, ADC_Channel_7, 7, ADC_SampleTime_144Cycles);// PF9 ADC_RegularChannelConfig(ADC3, ADC_Channel_8, 8, ADC_SampleTime_144Cycles);// PF10 /* Enable DMA request after last transfer (Single-ADC mode) */ ADC_DMARequestAfterLastTransferCmd(ADC3, ENABLE);//gtz01nov ADC_ContinuousModeCmd(ADC3, ENABLE); /* Enable ADC3 DMA */ ADC_DMACmd(ADC3, ENABLE); /* Enable ADC3 */ ADC_Cmd(ADC3, ENABLE); /* Start ADC3 Software Conversion */ ADC_SoftwareStartConv(ADC3); }
/** * @brief Write to the configuration register of the LM75. * @param RegValue: sepecifies the value to be written to LM75 configuration * register. * @retval None */ uint8_t LM75_WriteConfReg(uint8_t RegValue) { uint8_t LM75_BufferTX = 0; LM75_BufferTX = (uint8_t)(RegValue); /* Test on BUSY Flag */ LM75_Timeout = LM75_LONG_TIMEOUT; while (I2C_GetFlagStatus(LM75_I2C,I2C_FLAG_BUSY)) { if((LM75_Timeout--) == 0) return LM75_TIMEOUT_UserCallback(); } /* Configure DMA Peripheral */ LM75_DMA_Config(LM75_DMA_TX, (uint8_t*)(&LM75_BufferTX), 1); /* Enable the I2C peripheral */ I2C_GenerateSTART(LM75_I2C, ENABLE); /* Test on SB Flag */ LM75_Timeout = LM75_FLAG_TIMEOUT; while (I2C_GetFlagStatus(LM75_I2C,I2C_FLAG_SB) == RESET) { if((LM75_Timeout--) == 0) return LM75_TIMEOUT_UserCallback(); } /* Transmit the slave address and enable writing operation */ I2C_Send7bitAddress(LM75_I2C, LM75_ADDR, I2C_Direction_Transmitter); /* Test on ADDR Flag */ LM75_Timeout = LM75_FLAG_TIMEOUT; while (!I2C_CheckEvent(LM75_I2C, I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED)) { if((LM75_Timeout--) == 0) return LM75_TIMEOUT_UserCallback(); } /* Transmit the first address for r/w operations */ I2C_SendData(LM75_I2C, LM75_REG_CONF); /* Test on TXE FLag (data sent) */ LM75_Timeout = LM75_FLAG_TIMEOUT; while ((!I2C_GetFlagStatus(LM75_I2C,I2C_FLAG_TXE)) && (!I2C_GetFlagStatus(LM75_I2C,I2C_FLAG_BTF))) { if((LM75_Timeout--) == 0) return LM75_TIMEOUT_UserCallback(); } /* Enable I2C DMA request */ I2C_DMACmd(LM75_I2C,ENABLE); /* Enable DMA TX Channel */ DMA_Cmd(LM75_DMA_TX_CHANNEL, ENABLE); /* Wait until DMA Transfer Complete */ LM75_Timeout = LM75_LONG_TIMEOUT; while (!DMA_GetFlagStatus(LM75_DMA_TX_TCFLAG)) { if((LM75_Timeout--) == 0) return LM75_TIMEOUT_UserCallback(); } /* Wait until BTF Flag is set before generating STOP */ LM75_Timeout = LM75_LONG_TIMEOUT; while ((!I2C_GetFlagStatus(LM75_I2C,I2C_FLAG_BTF))) { if((LM75_Timeout--) == 0) return LM75_TIMEOUT_UserCallback(); } /* Send STOP Condition */ I2C_GenerateSTOP(LM75_I2C, ENABLE); /* Disable DMA TX Channel */ DMA_Cmd(LM75_DMA_TX_CHANNEL, DISABLE); /* Disable I2C DMA request */ I2C_DMACmd(LM75_I2C,DISABLE); /* Clear DMA TX Transfer Complete Flag */ DMA_ClearFlag(LM75_DMA_TX_TCFLAG); return LM75_OK; }
void USART1_Initialization(void){ USART_InitTypeDef USART_InitStructure; GPIO_InitTypeDef GPIO_InitStructure; RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1, ENABLE); RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOB, ENABLE); GPIO_InitStructure.GPIO_Pin = GPIO_Pin_6 | GPIO_Pin_7 ; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF ; GPIO_InitStructure.GPIO_OType = GPIO_OType_PP; GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP; GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; GPIO_Init(GPIOB, &GPIO_InitStructure); /* Connect USART pins to AF */ GPIO_PinAFConfig(GPIOB, GPIO_PinSource6, GPIO_AF_0); // USART1_TX GPIO_PinAFConfig(GPIOB, GPIO_PinSource7, GPIO_AF_0); // USART1_RX USART_DeInit(USART1); USART_InitStructure.USART_BaudRate = 57600; USART_InitStructure.USART_WordLength = USART_WordLength_8b; USART_InitStructure.USART_StopBits = USART_StopBits_1; USART_InitStructure.USART_Parity = USART_Parity_No; USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None; USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx; USART_Init(USART1, &USART_InitStructure); USART_Cmd(USART1, ENABLE); USART_ClearFlag(USART1, USART_FLAG_TC); USART_ITConfig(USART1, USART_IT_TXE, DISABLE); USART_ITConfig(USART1, USART_IT_RXNE, ENABLE); /* NVIC Initialization */ NVIC_InitTypeDef NVIC_InitStruct = { .NVIC_IRQChannel = USART1_IRQn, .NVIC_IRQChannelPriority = 0, .NVIC_IRQChannelCmd = ENABLE }; NVIC_Init(&NVIC_InitStruct); } void USART3_Initialization(void){ RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART3 , ENABLE); RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOC, ENABLE); GPIO_InitTypeDef GPIO_InitStructure; GPIO_InitStructure.GPIO_Pin = GPIO_Pin_4 | GPIO_Pin_5 ; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF ; GPIO_InitStructure.GPIO_OType = GPIO_OType_PP; GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP; GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; GPIO_Init(GPIOC, &GPIO_InitStructure); /* Connect USART pins to AF */ GPIO_PinAFConfig(GPIOC, GPIO_PinSource4, GPIO_AF_1); // USART1_TX GPIO_PinAFConfig(GPIOC, GPIO_PinSource5, GPIO_AF_1); // USART1_RX USART_InitTypeDef USART_InitStructure; USART_DeInit(USART3); USART_InitStructure.USART_BaudRate = 57600; USART_InitStructure.USART_WordLength = USART_WordLength_8b; USART_InitStructure.USART_StopBits = USART_StopBits_1; USART_InitStructure.USART_Parity = USART_Parity_No; USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None; USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx; USART_Init(USART3, &USART_InitStructure); USART_Cmd(USART3, ENABLE); USART_ClearFlag(USART3, USART_FLAG_TC); USART_ITConfig(USART3, USART_IT_TXE, DISABLE); USART_ITConfig(USART3, USART_IT_RXNE, ENABLE); /* NVIC Initialization */ NVIC_InitTypeDef NVIC_InitStruct = { .NVIC_IRQChannel = USART3_4_IRQn, .NVIC_IRQChannelPriority = 0, .NVIC_IRQChannelCmd = ENABLE }; NVIC_Init(&NVIC_InitStruct); } void USART3_dma_init(void) { RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1, ENABLE); RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA2, ENABLE); uint8_t dummy = 0; /* DMA Initialization */ DMA_DeInit(DMA1_Channel7); //while (DMA_GetCmdStatus(DMA1_Channel2) != DISABLE); //DMA_GetFlagStatus DMA_InitTypeDef DMA_InitStructure = { /* Configure DMA Initialization Structure */ .DMA_PeripheralBaseAddr = (uint32_t)(&(USART3->TDR)), .DMA_MemoryBaseAddr = (uint32_t)&dummy, .DMA_DIR = DMA_DIR_PeripheralDST, .DMA_BufferSize = (uint32_t)1, .DMA_PeripheralInc = DMA_PeripheralInc_Disable, .DMA_MemoryInc = DMA_MemoryInc_Enable, .DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte, .DMA_MemoryDataSize = DMA_MemoryDataSize_Byte, .DMA_Mode = DMA_Mode_Normal, .DMA_Priority = DMA_Priority_Medium, .DMA_M2M = DMA_M2M_Disable }; DMA_Init(DMA1_Channel7, &DMA_InitStructure); DMA_Cmd(DMA1_Channel7, ENABLE); USART_DMACmd(USART3, USART_DMAReq_Tx, ENABLE); } void usart3_dma_send_text(uint8_t *s){ while (DMA_GetFlagStatus( DMA1_FLAG_TC7) == RESET); DMA_ClearFlag(DMA1_FLAG_TC7); DMA_ClearFlag(DMA1_FLAG_GL7); DMA_ClearFlag(DMA1_FLAG_TE7); DMA_DeInit(DMA1_Channel7); DMA_InitTypeDef DMA_InitStructure = { /* Configure DMA Initialization Structure */ .DMA_PeripheralBaseAddr = (uint32_t)(&(USART3->TDR)), .DMA_MemoryBaseAddr = (uint32_t)s, .DMA_DIR = DMA_DIR_PeripheralDST, .DMA_BufferSize = (uint32_t)strlen((const char *) s), .DMA_PeripheralInc = DMA_PeripheralInc_Disable, .DMA_MemoryInc = DMA_MemoryInc_Enable, .DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte, .DMA_MemoryDataSize = DMA_MemoryDataSize_Byte, .DMA_Mode = DMA_Mode_Normal, .DMA_Priority = DMA_Priority_Medium, .DMA_M2M = DMA_M2M_Disable }; DMA_Init(DMA1_Channel7, &DMA_InitStructure); DMA_Cmd(DMA1_Channel7, ENABLE); USART_DMACmd(USART3, USART_DMAReq_Tx, ENABLE); } uint8_t uart1_data , uart3_data ; void USART1_IRQHandler(void) { if (USART_GetITStatus(USART1, USART_IT_RXNE) != RESET) { uart1_data = USART_ReceiveData(USART1); //USART_SendData(USART1, uart1_data); GPIOC->ODR ^= GPIO_Pin_6; } } void USART3_4_IRQHandler(void){ if (USART_GetITStatus(USART3, USART_IT_RXNE) != RESET) { uart3_data = USART_ReceiveData(USART3); GPIOC->ODR ^= GPIO_Pin_7; } }
// init ADC void init_adc() { // enable clocks RCC_AHB1PeriphClockCmd( RCC_AHB1Periph_DMA2 | RCC_AHB1Periph_GPIOC, ENABLE ); RCC_APB1PeriphClockCmd( RCC_APB1Periph_TIM2, ENABLE ); RCC_APB2PeriphClockCmd( RCC_APB2Periph_ADC1 | RCC_APB2Periph_ADC2, ENABLE ); // configure GPIO GPIO_InitTypeDef GPIO_InitStructure; GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AN; GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL; GPIO_Init( GPIOC, &GPIO_InitStructure ); // setup interrupts NVIC_InitTypeDef NVIC_InitStructure; NVIC_InitStructure.NVIC_IRQChannel = DMA2_Stream0_IRQn; NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0x00; NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0x00; NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; NVIC_Init( &NVIC_InitStructure ); // setup tim2 // freq on 70Khz TIM_TimeBaseInitTypeDef TIM_InitStructure; TIM_TimeBaseStructInit( &TIM_InitStructure ); TIM_InitStructure.TIM_Period = (84000000 / 70000) - 1; TIM_InitStructure.TIM_Prescaler = 0; TIM_InitStructure.TIM_ClockDivision = 0; TIM_InitStructure.TIM_CounterMode = TIM_CounterMode_Up; TIM_TimeBaseInit( TIM2, &TIM_InitStructure ); // TIM2 TRGO Selection TIM_SelectOutputTrigger( TIM2, TIM_TRGOSource_Update ); TIM_Cmd( TIM2, ENABLE ); // dma configuration DMA_InitTypeDef DMA_InitStructure; DMA_InitStructure.DMA_Channel = DMA_Channel_0; DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t) &ADCDualConvertedValues; DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t) 0x40012308; DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralToMemory; DMA_InitStructure.DMA_BufferSize = BUFFERSIZE; DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable; DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable; DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord; DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord; DMA_InitStructure.DMA_Mode = DMA_Mode_Circular; DMA_InitStructure.DMA_Priority = DMA_Priority_High; DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Enable; DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_HalfFull; DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single; DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single; DMA_Init( DMA2_Stream0, &DMA_InitStructure ); // Enable DMA Stream Half/ Transfer Complete interrupt DMA_ITConfig( DMA2_Stream0, DMA_IT_TC | DMA_IT_HT, ENABLE ); DMA_Cmd( DMA2_Stream0, ENABLE ); // configure ADC ADC_CommonInitTypeDef ADC_CommonInitStructure; ADC_InitTypeDef ADC_InitStructure; ADC_CommonInitStructure.ADC_Mode = ADC_DualMode_RegSimult; ADC_CommonInitStructure.ADC_Prescaler = ADC_Prescaler_Div2; ADC_CommonInitStructure.ADC_DMAAccessMode = ADC_DMAAccessMode_1; // 2 half words one by one ADC_CommonInitStructure.ADC_TwoSamplingDelay = ADC_TwoSamplingDelay_5Cycles; ADC_CommonInit( &ADC_CommonInitStructure ); ADC_InitStructure.ADC_Resolution = ADC_Resolution_12b; ADC_InitStructure.ADC_ScanConvMode = DISABLE; ADC_InitStructure.ADC_ContinuousConvMode = DISABLE; ADC_InitStructure.ADC_ExternalTrigConvEdge = ADC_ExternalTrigConvEdge_Rising; ADC_InitStructure.ADC_ExternalTrigConv = ADC_ExternalTrigConv_T2_TRGO; ADC_InitStructure.ADC_DataAlign = ADC_DataAlign_Right; ADC_InitStructure.ADC_NbrOfConversion = 1; ADC_Init( ADC1, &ADC_InitStructure ); ADC_Init( ADC2, &ADC_InitStructure ); // ADC1 Regular Channel 10 ADC_RegularChannelConfig( ADC1, ADC_Channel_10, 1, ADC_SampleTime_15Cycles ); // PC0 // ADC2 Regular Channel 11 ADC_RegularChannelConfig( ADC2, ADC_Channel_11, 1, ADC_SampleTime_15Cycles ); // PC1 ADC_MultiModeDMARequestAfterLastTransferCmd( ENABLE ); ADC_Cmd( ADC1, ENABLE ); ADC_Cmd( ADC2, ENABLE ); }
/** * @brief ADC configuration * @note This function Configure the ADC peripheral 1) Enable peripheral clocks 2) Configure ADC Channel 12 pin as analog input 3) DMA2_Stream0 channel2 configuration 4) Configure ADC1 Channel 12 5) Configure ADC2 Channel 12 6) Configure ADC3 Channel 12 * @param None * @retval None */ static void ADC_Config(void) { GPIO_InitTypeDef GPIO_InitStructure; DMA_InitTypeDef DMA_InitStructure; ADC_InitTypeDef ADC_InitStructure; ADC_CommonInitTypeDef ADC_CommonInitStructure; /* Enable peripheral clocks *************************************************/ RCC_AHB1PeriphClockCmd( ADC1_2_CHANNEL_GPIO_CLK , ENABLE); RCC_AHB1PeriphClockCmd( RCC_AHB1Periph_DMA2 , ENABLE); RCC_APB2PeriphClockCmd( RCC_APB2Periph_ADC1 , ENABLE); RCC_APB2PeriphClockCmd( RCC_APB2Periph_ADC2 , ENABLE); RCC_APB2PeriphClockCmd( RCC_APB2Periph_ADC3 , ENABLE); /* Configure ADC Channel 12 pin as analog input *****************************/ GPIO_InitStructure.GPIO_Pin = GPIO_PIN; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AN; GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL ; GPIO_Init(GPIO_PORT, &GPIO_InitStructure); /* DMA2 Stream0 channel0 configuration **************************************/ DMA_InitStructure.DMA_Channel = DMA_CHANNELx; DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)ADC_CDR_ADDRESS; DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)&aADCTripleConvertedValue; DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralToMemory; DMA_InitStructure.DMA_BufferSize = 3; DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable; DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable; DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Word; DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Word; DMA_InitStructure.DMA_Mode = DMA_Mode_Circular; DMA_InitStructure.DMA_Priority = DMA_Priority_High; DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable; DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_HalfFull; DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single; DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single; DMA_Init(DMA_STREAMx, &DMA_InitStructure); /* DMA2_Stream0 enable */ DMA_Cmd(DMA_STREAMx, ENABLE); /* ADC Common configuration *************************************************/ ADC_CommonInitStructure.ADC_Mode = ADC_TripleMode_Interl; ADC_CommonInitStructure.ADC_TwoSamplingDelay = ADC_TwoSamplingDelay_5Cycles; ADC_CommonInitStructure.ADC_DMAAccessMode = ADC_DMAAccessMode_2; ADC_CommonInitStructure.ADC_Prescaler = ADC_Prescaler_Div2; ADC_CommonInit(&ADC_CommonInitStructure); /* ADC1 regular channel 12 configuration ************************************/ ADC_InitStructure.ADC_Resolution = ADC_Resolution_12b; ADC_InitStructure.ADC_ScanConvMode = DISABLE; ADC_InitStructure.ADC_ContinuousConvMode = ENABLE; ADC_InitStructure.ADC_ExternalTrigConvEdge = ADC_ExternalTrigConvEdge_None; ADC_InitStructure.ADC_ExternalTrigConv = ADC_ExternalTrigConv_T1_CC1; ADC_InitStructure.ADC_DataAlign = ADC_DataAlign_Right; ADC_InitStructure.ADC_NbrOfConversion = 1; ADC_Init(ADC1, &ADC_InitStructure); ADC_RegularChannelConfig(ADC1, ADC_CHANNEL, 1, ADC_SampleTime_3Cycles); /* Enable ADC1 DMA */ ADC_DMACmd(ADC1, ENABLE); /* ADC2 regular channel 12 configuration ************************************/ ADC_Init(ADC2, &ADC_InitStructure); /* ADC2 regular channel12 configuration */ ADC_RegularChannelConfig(ADC2, ADC_CHANNEL, 1, ADC_SampleTime_3Cycles); /* ADC3 regular channel 12 configuration ************************************/ ADC_Init(ADC3, &ADC_InitStructure); /* ADC3 regular channel12 configuration */ ADC_RegularChannelConfig(ADC3, ADC_CHANNEL, 1, ADC_SampleTime_3Cycles); /* Enable DMA request after last transfer (multi-ADC mode) ******************/ ADC_MultiModeDMARequestAfterLastTransferCmd(ENABLE); /* Enable ADC1 **************************************************************/ ADC_Cmd(ADC1, ENABLE); /* Enable ADC2 **************************************************************/ ADC_Cmd(ADC2, ENABLE); /* Enable ADC3 **************************************************************/ ADC_Cmd(ADC3, ENABLE); }