/*----------------------------------------------------------------------------*/
void Test_BasicMode_Tx()
{
int32_t delaycount;
STR_CANMSG_T msg1;
delaycount=1000;
CAN_EnterTestMode(CAN_TESTR_BASIC);
CAN_EnableInt(CAN_CON_IE|CAN_CON_SIE);
/* Send Message No.1 */
msg1.FrameType= DATA_FRAME;
msg1.IdType = CAN_STD_ID;
msg1.Id = 0x001;
msg1.DLC = 2;
msg1.Data[0] = 0x00;
msg1.Data[1] = 0x2;
CAN_BasicSendMsg(&msg1);
printf("Send STD_ID:0x1,Data[0,2]\n");
SYS_SysTickDelay(delaycount);
/* Send Message No.2 */
msg1.FrameType= DATA_FRAME;
msg1.IdType = CAN_STD_ID;
msg1.Id = 0x1AC;
msg1.DLC = 8;
msg1.Data[0] = 0x11;
msg1.Data[1] = 0x12;
msg1.Data[2] = 0x13;
msg1.Data[3] = 0x14;
msg1.Data[4] = 0x15;
msg1.Data[5] = 0x16;
msg1.Data[6] = 0x17;
msg1.Data[7] = 0x18;
CAN_BasicSendMsg(&msg1);
printf("Send STD_ID:0x1AC,Data[11,12,13,14,15,16,17,18]\n");
SYS_SysTickDelay(delaycount);
/* Send Message No.3 */
msg1.FrameType= DATA_FRAME;
msg1.IdType = CAN_STD_ID;
msg1.Id = 0x310;
msg1.DLC = 8;
msg1.Data[0] = 0x21;
msg1.Data[1] = 0x22;
msg1.Data[2] = 0x23;
msg1.Data[3] = 0x24;
msg1.Data[4] = 0x25;
msg1.Data[5] = 0x26;
msg1.Data[6] = 0x27;
msg1.Data[7] = 0x28;
CAN_BasicSendMsg(&msg1);
printf("Send STD_ID:0x310,Data[21,22,23,24,25,26,27,28]\n");
SYS_SysTickDelay(delaycount);
/* Send Message No.4 */
msg1.FrameType= DATA_FRAME;
msg1.IdType = CAN_EXT_ID;
msg1.Id = 0x3377;
msg1.DLC = 8;
msg1.Data[0] = 0x31;
msg1.Data[1] = 0x32;
msg1.Data[2] = 0x33;
msg1.Data[3] = 0x34;
msg1.Data[4] = 0x35;
msg1.Data[5] = 0x36;
msg1.Data[6] = 0x37;
msg1.Data[7] = 0x38;
CAN_BasicSendMsg(&msg1);
printf("Send EXT_ID:0x3377,Data[31,32,33,34,35,36,37,38]\n");
SYS_SysTickDelay(delaycount);
/* Send Message No.5 */
msg1.FrameType= DATA_FRAME;
msg1.IdType = CAN_EXT_ID;
msg1.Id = 0x7755;
msg1.DLC = 8;
msg1.Data[0] = 0x41;
msg1.Data[1] = 0x42;
msg1.Data[2] = 0x43;
msg1.Data[3] = 0x44;
msg1.Data[4] = 0x45;
msg1.Data[5] = 0x46;
msg1.Data[6] = 0x47;
msg1.Data[7] = 0x48;
CAN_BasicSendMsg(&msg1);
printf("Send EXT_ID:0x7755,Data[41,42,43,44,45,46,47,48]\n");
SYS_SysTickDelay(delaycount);
CAN_LeaveTestMode();
}
/*----------------------------------------------------------------------------*/
void Test_NormalMode_Tx()
{
STR_CANMSG_T tMsg;
/* Send a 11-bits message */
tMsg.FrameType= DATA_FRAME;
tMsg.IdType = CAN_STD_ID;
tMsg.Id = 0x7FF;
tMsg.DLC = 2;
tMsg.Data[0] = 7;
tMsg.Data[1] = 0xFF;
if(CAN_SetTxMsgObj(MSG(0),&tMsg) < 0) /* Call CAN_SetTxMsgObj() only Confiugre Msg RAM */
{
printf("Set Tx Msg Object failed\n");
return;
}
CAN_SetTxRqst(MSG(0)); /* Call CAN_SetTxRqst() requeset to send the Msg in the RAM */
printf("MSG(0).Send STD_ID:0x7FF, Data[07,FF]done\n");
if(CAN_SetTxMsgObj(MSG(1),&tMsg) < 0)
{
printf("Set Tx Msg Object failed\n");
return;
}
/* Send a 29-bits message */
tMsg.FrameType= DATA_FRAME;
tMsg.IdType = CAN_EXT_ID;
tMsg.Id = 0x12345;
tMsg.DLC = 3;
tMsg.Data[0] = 1;
tMsg.Data[1] = 0x23;
tMsg.Data[2] = 0x45;
if(CAN_SetTxMsgObj(MSG(1),&tMsg) < 0)
{
printf("Set Tx Msg Object failed\n");
return;
}
CAN_SetTxRqst(MSG(1));
printf("MSG(1).Send EXT:0x12345 ,Data[01,23,45]done\n");
/* Send a data message */
tMsg.FrameType= DATA_FRAME;
tMsg.IdType = CAN_EXT_ID;
tMsg.Id = 0x7FF01;
tMsg.DLC = 4;
tMsg.Data[0] = 0xA1;
tMsg.Data[1] = 0xB2;
tMsg.Data[2] = 0xC3;
tMsg.Data[3] = 0xD4;
if(CAN_SetTxMsgObj(MSG(3),&tMsg) < 0)
{
printf("Set Tx Msg Object failed\n");
return;
}
CAN_SetTxRqst(MSG(3));
printf("MSG(3).Send EXT:0x7FF01 ,Data[A1,B2,C3,D4]done\n");
SYS_SysTickDelay(1000000); //Delay one second to wait INT
printf("Trasmit Done!\nCheck the receive host received data\n");
}
/*---------------------------------------------------------------------------------------------------------*/
int main (void)
{
/* Init System, IP clock and multi-function I/O */
SYS_Init();
/* Init UART0 for printf */
UART0_Init();
/* Init I2C */
I2C_Init();
#if defined(DEMO_OPT_SLAVE) // I2S is slave
/*
I2S is initialized to be slave mode.
I2S must output 6MHz MCLK to WAU8822.
Init Codec WAU8822 to be in master mode
WAU8822 will use MCLK of I2S to generate required 256fs(ex: 12.288MHz) and output BCLK, LR.
Let WAU8822 be master could get more precise sampling rate.
Supported sample rate are (Deviation dependent on codec):
48kHz, 32kHz, 24kHz, 16kHz, 12kHz and 8kHz.
Clock configuration summary:
XTAL = 12MHz
PLL = According to HCLK (Independent to sampling rate)
HCLK = User define (Independent to sampling rate)
I2S_S = XTAL
MCLK = 6MHz (XTAL / 2)
BCLK = (From codec)
fs = 8000Hz, 12000Hz, ... 48000Hz
*/
I2S_Init(0, 0); // I2S Slave Init, MCLK = 6MHz
WAU8822_Init(WAU8822_INIT_MASTER | WAU8822_INIT_SR32000 |
WAU8822_INIT_OUT_HP_L | WAU8822_INIT_OUT_HP_R |
WAU8822_INIT_IN_MIC_L //|
//WAU8822_INIT_IN_AUX_L | WAU8822_INIT_IN_AUX_R
);
#elif defined(DEMO_OPT_MASTER_NOUSB) // I2S is master without USB applications
/*
I2S is initialized to be master mode.
I2S must output 256*fs MCLK to WAU8822.
Init Codec WAU8822 to be in slave mode.
Supported sample rate are (Deviation for 48kHz, 32kHz,... are all 0.0186%):
47991.071Hz, 31994.048Hz, 23995.536Hz, 15997.024Hz, 11997.768Hz, (7998.5119Hz)
Clock configuration summary for 47991.071Hz, 31994.048Hz, 23995.536Hz, 15997.024Hz:
XTAL = 12MHz
PLL = 147428571.4Hz (PLLCON = SYSCLK_PLLCON_FOR_I2S)
HCLK = PLL / 3 = 49142857.14Hz
I2S_S = HCLK
MCLK = 256*fs (MCLK DIV = 4, 6, 8, 12)
BCLK = 8*fs (BCLK DIV = 32, 48, 64, 96)
fs = 47991.071Hz, 31994.048Hz, 23995.536Hz, 15997.024Hz
Clock configuration summary for 11997.768Hz, 7998.5119Hz:
XTAL = 12MHz
PLL = 147428571.4Hz (PLLCON = 0xA54)
HCLK = PLL / 6 = 24571428.57Hz
I2S_S = HCLK
MCLK = 256*fs (MCLK DIV = 8, 12)
BCLK = 8*fs (BCLK DIV = 64, 96)
fs = 11997.768Hz, 7998.5119Hz
*/
I2S_Init(1, 32000); // I2S Init to Master, MCLK = 256 * fs
WAU8822_Init(WAU8822_INIT_SLAVE | WAU8822_INIT_SR32000 |
WAU8822_INIT_OUT_HP_L | WAU8822_INIT_OUT_HP_R |
WAU8822_INIT_IN_MIC_L //|
//WAU8822_INIT_IN_AUX_L | WAU8822_INIT_IN_AUX_R
);
#elif defined(DEMO_OPT_MASTER_USB) // I2S is master with USB applications
/*
I2S is initialized to be master mode and work with USB (48MHz clock is necessary)
I2S must output 256*fs MCLK to WAU8822.
Init Codec WAU8822 to be in slave mode.
Supported sample rate are (Deviation for 48kHz, 32kHz, ... are all 2.3438%):
46875Hz, 31250Hz, 23437.5Hz, 15625Hz, 11718.75Hz, (7812.5Hz)
Clock configuration summary for 46875Hz, 31250Hz, 23437.5Hz, 15625Hz:
XTAL = 12MHz
PLL = 48MHz (PLLCON = SYSCLK_PLLCON_48MHz_XTAL)
HCLK = PLL / 1 = 48MHz
I2S_S = HCLK
MCLK = 256*fs (MCLK DIV = 4, 6, 8, 12)
BCLK = 8*fs (BCLK DIV = 32, 48, 64, 96)
fs = 46875Hz, 31250Hz, 23437.5Hz, 15625Hz
Clock configuration summary for 11718.75Hz, 7812.5Hz:
XTAL = 12MHz
PLL = 48MHz (PLLCON = SYSCLK_PLLCON_48MHz_XTAL)
HCLK = PLL / 2 = 24MHz
I2S_S = HCLK
MCLK = 256*fs (MCLK DIV = 8, 12)
BCLK = 8*fs (BCLK DIV = 64, 96)
fs = 11718.75Hz, 7812.5Hz
*/
I2S_Init(1, 12000); // I2S Master Init, MCLK = 256*fs
WAU8822_Init(WAU8822_INIT_SLAVE | WAU8822_INIT_SR12000 |
WAU8822_INIT_OUT_HP_L | WAU8822_INIT_OUT_HP_R |
WAU8822_INIT_IN_MIC_L //|
//WAU8822_INIT_IN_AUX_L | WAU8822_INIT_IN_AUX_R
);
#endif
MUTE_OFF();
printf("+----------------------------------------------+\n");
printf("| NUC200 I2S Driver Sample Code |\n");
printf("+----------------------------------------------+\n");
printf("\n");
printf(" Working ...\n");
printf(" User can measure LRCLK to check sampling rate.\n");
/* Toggle PC15 to indicate we are working. */
while(1)
{
SYS_SysTickDelay(100000);
PC15 ^= 1;
}
}
/*---------------------------------------------------------------------------------------------------------*/
int32_t main(void)
{
int32_t i32Err = 0;
uint32_t u32Data, u32ImageSize, i, j, *pu32Loader;
/* Init system, IP clock and multi-function I/O */
SYS_Init();
/* Init UART0 for printf */
UART0_Init();
/* Init GPIO P2.0 (output) and P3.2 (EINT0) */
GPIO_Init();
/* Init SPI0 and LCD */
LCD_Init();
LCD_EnableBackLight();
LCD_ClearScreen();
/*
This sample shows how to switch between APROM and LDROM.
Target:
Smpl_FMC
Smpl_FMC is the code for APROM. It will program the firmware to LDROM and
user can press SW_INT to change to boot from LDROM.
In APROM, the LED blanking interval is 200ms.
Smpl_LDROM
Smpl_LDROM is the code for LDROM. User can press SW_INT to change to boot from APROM.
In LDROM, the LED blanking interval is 1000ms.
*/
LCD_Print(0, "Boot from APROM");
LCD_Print(1, "Press SW_INT ");
while (1)
{
if(g_u8IsPress)
{
g_u8IsPress = FALSE;
/* Unlock protected registers to write ISP Control Register (ISPCON) */
SYS_UnlockReg();
/* Program sample LD code to LDROM */
/* Enable ISP LDROM update function */
FMC->ISPCON = FMC_ISPCON_LDUEN_Msk | FMC_ISPCON_ISPEN_Msk;
/* Page Erase LDROM */
for (i = 0;i < 4096;i += PAGE_SIZE)
FMC_Erase(LDROM_BASE + i);
/* Erase Verify */
i32Err = 0;
for (i = LDROM_BASE; i < (LDROM_BASE + 4096); i += 4)
{
u32Data = FMC_Read(i);
if (u32Data != 0xFFFFFFFF)
{
i32Err = 1;
}
}
u32ImageSize = (uint32_t)&g_u32LoaderImageLimit - (uint32_t)&g_u32LoaderImageBase;
pu32Loader = (uint32_t *)&g_u32LoaderImageBase;
for (i = 0;i < u32ImageSize;i += PAGE_SIZE)
{
FMC_Erase(LDROM_BASE + i);
for (j = 0;j < PAGE_SIZE;j += 4)
{
FMC_Write(LDROM_BASE + i + j, pu32Loader[(i + j) / 4]);
}
}
/* Verify loader */
i32Err = 0;
for (i = 0;i < u32ImageSize;i += PAGE_SIZE)
{
for (j = 0;j < PAGE_SIZE;j += 4)
{
u32Data = FMC_Read(LDROM_BASE + i + j);
if (u32Data != pu32Loader[(i+j)/4])
i32Err = 1;
if (i + j >= u32ImageSize)
break;
}
}
if(i32Err)
{
LCD_ClearScreen();
LCD_Print(0,"LDROM write fail");
}
else
{
/* Switch to boot from LDROM */
FMC->ISPCON = FMC_ISPCON_BS_LDROM;
_SYS_RESET_CPU();
}
while (1);
}
else
{
/* LED blanking for 200ms */
P2->DOUT ^= 1;
SYS_SysTickDelay(100000);
}
}
}
void EEPROM_Write ( uint32_t u32Addr, uint8_t u8Data )
{
int32_t i32Err;
do
{
i32Err = 0;
/* Send start */
_I2C_START ( I2C0 );
_I2C_WAIT_READY ( I2C0 );
/* Send control byte */
_I2C_WRITE ( I2C0, EEPROM_WRITE_ADDR );
_I2C_WAIT_READY ( I2C0 );
if ( I2C0->I2CSTATUS == 0x18 )
{
/* ACK */
/* Send high address */
_I2C_WRITE ( I2C0, ( u32Addr >> 8 ) & 0xFFUL ); // high address
_I2C_WAIT_READY ( I2C0 );
if ( I2C0->I2CSTATUS == 0x28 )
{
/* ACK */
/* Send low address */
_I2C_WRITE ( I2C0, u32Addr & 0xFFUL ); // low address
_I2C_WAIT_READY ( I2C0 );
if ( I2C0->I2CSTATUS == 0x28 )
{
/* ACK */
/* Send data */
_I2C_WRITE ( I2C0, u8Data ); // data
_I2C_WAIT_READY ( I2C0 );
if ( I2C0->I2CSTATUS == 0x28 )
{
/* ACK */
/* Send stop */
_I2C_STOP ( I2C0 );
}
else
{
/* NACK */
/* Send data error */
i32Err = 4;
}
}
else
{
/* NACK */
/* Send low address error */
i32Err = 3;
}
}
else
{
/* NACK */
/* Send high address error */
i32Err = 2;
}
}
else
{
/* NACK */
/* Send control error */
i32Err = 1;
}
if ( i32Err )
{
/* Send stop */
_I2C_STOP ( I2C0 );
SYS_SysTickDelay ( 100 );
}
}