static void seeprom_attach(struct device *parent, struct device *self, void *aux) { struct seeprom_softc *sc = (struct seeprom_softc *)self; struct i2c_attach_args *ia = aux; sc->sc_tag = ia->ia_tag; sc->sc_address = ia->ia_addr; aprint_naive(": EEPROM\n"); aprint_normal(": AT24Cxx EEPROM\n"); /* * The AT24C01A/02/04/08/16 EEPROMs use a 1 byte command * word to select the offset into the EEPROM page. The * AT24C04/08/16 decode fewer of the i2c address bits, * using the bottom 1, 2, or 3 to select the 256-byte * super-page. * * The AT24C32/64 EEPROMs use a 2 byte command word and * decode all of the i2c address bits. */ sc->sc_size = ia->ia_size; switch (sc->sc_size) { case 128: /* 1Kbit */ case 256: /* 2Kbit */ case 512: /* 4Kbit */ case 1024: /* 8Kbit */ case 2048: /* 16Kbit */ sc->sc_cmdlen = 1; break; case 4096: /* 32Kbit */ case 8192: /* 64Kbit */ sc->sc_cmdlen = 2; break; default: /* * Default to 2KB. If we happen to have a 2KB * EEPROM this will allow us to access it. If we * have a smaller one, the worst that can happen * is that we end up trying to read a different * EEPROM on the bus when accessing it. * * Obviously this will not work for 4KB or 8KB * EEPROMs, but them's the breaks. */ aprint_error("%s: invalid size specified; " "assuming 2KB (16Kb)\n", sc->sc_dev.dv_xname); sc->sc_size = 2048; sc->sc_cmdlen = 1; } sc->sc_open = 0; }
static void do_enable(struct pms_softc *sc) { u_char cmd[2]; int res; sc->inputstate = 0; sc->buttons = 0; pckbport_slot_enable(sc->sc_kbctag, sc->sc_kbcslot, 1); #ifdef PMS_SYNAPTICS_TOUCHPAD if (sc->protocol == PMS_SYNAPTICS) pms_synaptics_enable(sc); #endif #ifdef PMS_ELANTECH_TOUCHPAD if (sc->protocol == PMS_ELANTECH) pms_elantech_enable(sc); #endif cmd[0] = PMS_DEV_ENABLE; res = pckbport_enqueue_cmd(sc->sc_kbctag, sc->sc_kbcslot, cmd, 1, 0, 1, 0); if (res) aprint_error("pms_enable: command error %d\n", res); if (sc->protocol == PMS_UNKNOWN) sc->protocol = pms_protocol(sc->sc_kbctag, sc->sc_kbcslot); DPRINTF(("pms_enable: using %s protocol\n", pms_protocols[sc->protocol].name)); #if 0 { u_char scmd[2]; scmd[0] = PMS_SET_RES; scmd[1] = 3; /* 8 counts/mm */ res = pckbport_enqueue_cmd(sc->sc_kbctag, sc->sc_kbcslot, scmd, 2, 0, 1, 0); if (res) printf("pms_enable: setup error1 (%d)\n", res); scmd[0] = PMS_SET_SCALE21; res = pckbport_enqueue_cmd(sc->sc_kbctag, sc->sc_kbcslot, scmd, 1, 0, 1, 0); if (res) printf("pms_enable: setup error2 (%d)\n", res); scmd[0] = PMS_SET_SAMPLE; scmd[1] = 100; /* 100 samples/sec */ res = pckbport_enqueue_cmd(sc->sc_kbctag, sc->sc_kbcslot, scmd, 2, 0, 1, 0); if (res) printf("pms_enable: setup error3 (%d)\n", res); } #endif }
static void gphyterattach(device_t parent, device_t self, void *aux) { struct mii_softc *sc = device_private(self); struct mii_attach_args *ma = aux; struct mii_data *mii = ma->mii_data; const struct mii_phydesc *mpd; int anar, strap; mpd = mii_phy_match(ma, gphyters); aprint_naive(": Media interface\n"); aprint_normal(": %s, rev. %d\n", mpd->mpd_name, MII_REV(ma->mii_id2)); sc->mii_dev = self; sc->mii_inst = mii->mii_instance; sc->mii_phy = ma->mii_phyno; sc->mii_funcs = &gphyter_funcs; sc->mii_pdata = mii; sc->mii_flags = ma->mii_flags; sc->mii_anegticks = MII_ANEGTICKS; PHY_RESET(sc); sc->mii_capabilities = PHY_READ(sc, MII_BMSR) & ma->mii_capmask; if (sc->mii_capabilities & BMSR_EXTSTAT) sc->mii_extcapabilities = PHY_READ(sc, MII_EXTSR); /* * The Gig PHYTER seems to have the 10baseT BMSR bits * hard-wired to 0, even though the device supports * 10baseT. What we do instead is read the post-reset * ANAR, who's 10baseT-related bits are set by strapping * pin 180, and fake the BMSR bits. */ anar = PHY_READ(sc, MII_ANAR); if (anar & ANAR_10) sc->mii_capabilities |= (BMSR_10THDX & ma->mii_capmask); if (anar & ANAR_10_FD) sc->mii_capabilities |= (BMSR_10TFDX & ma->mii_capmask); aprint_normal_dev(self, ""); if ((sc->mii_capabilities & BMSR_MEDIAMASK) == 0 && (sc->mii_extcapabilities & EXTSR_MEDIAMASK) == 0) aprint_error("no media present"); else mii_phy_add_media(sc); aprint_normal("\n"); strap = PHY_READ(sc, MII_GPHYTER_STRAP); aprint_normal_dev(self, "strapped to %s mode", (strap & STRAP_MS_VAL) ? "master" : "slave"); if (strap & STRAP_NC_MODE) aprint_normal(", pre-C5 BCM5400 compat enabled"); aprint_normal("\n"); }
void cgdattach(int num) { int error; error = config_cfattach_attach(cgd_cd.cd_name, &cgd_ca); if (error != 0) aprint_error("%s: unable to register cfattach\n", cgd_cd.cd_name); }
static void exynos_wdt_attach(device_t parent, device_t self, void *aux) { struct exynos_wdt_softc * const sc = device_private(self); // prop_dictionary_t dict = device_properties(self); struct fdt_attach_args * const faa = aux; bus_addr_t addr; bus_size_t size; int error; if (fdtbus_get_reg(faa->faa_phandle, 0, &addr, &size) != 0) { aprint_error(": couldn't get registers\n"); return; } sc->sc_dev = self; sc->sc_bst = faa->faa_bst; error = bus_space_map(sc->sc_bst, addr, size, 0, &sc->sc_wdog_bsh); if (error) { aprint_error(": couldn't map %#llx: %d", (uint64_t)addr, error); return; } /* * This runs at the Exynos Pclk. */ // prop_dictionary_get_uint32(dict, "frequency", &sc->sc_freq); sc->sc_freq = 12000000; /* MJF: HACK hardwire for now */ /* Need to figure out how to get freq from dtb */ sc->sc_wdog_wtcon = exynos_wdt_wdog_read(sc, EXYNOS_WDT_WTCON); sc->sc_wdog_armed = (sc->sc_wdog_wtcon & WTCON_ENABLE) && (sc->sc_wdog_wtcon & WTCON_RESET_ENABLE); if (sc->sc_wdog_armed) { sc->sc_wdog_prescaler = __SHIFTOUT(sc->sc_wdog_wtcon, WTCON_PRESCALER); sc->sc_wdog_clock_select = __SHIFTOUT(sc->sc_wdog_wtcon, WTCON_CLOCK_SELECT); sc->sc_freq /= sc->sc_wdog_prescaler; sc->sc_freq >>= 4 + sc->sc_wdog_clock_select; sc->sc_wdog_wtdat = exynos_wdt_wdog_read(sc, EXYNOS_WDT_WTDAT); sc->sc_wdog_period = (sc->sc_wdog_wtdat + 1) / sc->sc_freq; } else {
static void lpt_puc_attach(device_t parent, device_t self, void *aux) { struct lpt_softc *sc = device_private(self); struct puc_attach_args *aa = aux; const char *intrstr; char intrbuf[PCI_INTRSTR_LEN]; sc->sc_dev = self; sc->sc_iot = aa->t; sc->sc_ioh = aa->h; aprint_naive(": Parallel port"); aprint_normal(": "); intrstr = pci_intr_string(aa->pc, aa->intrhandle, intrbuf, sizeof(intrbuf)); sc->sc_ih = pci_intr_establish(aa->pc, aa->intrhandle, IPL_TTY, lptintr, sc); if (sc->sc_ih == NULL) { aprint_error("couldn't establish interrupt"); if (intrstr != NULL) aprint_error(" at %s", intrstr); aprint_error("\n"); return; } #if defined(amd64) || defined(i386) /* * Parallel ports are sometimes used for improvised GPIO by * userspace programs which need to know the port's I/O address. * Print the address here so the user doesn't have to dig through * PCI configuration space to find it. */ if (aa->h < 0x10000) aprint_normal("ioaddr 0x%04lx, ", aa->h); #endif aprint_normal("interrupting at %s\n", intrstr); if (!pmf_device_register(self, NULL, NULL)) aprint_error_dev(self, "couldn't establish power handler\n"); lpt_attach_subr(sc); }
void vndattach(int num) { int error; error = config_cfattach_attach(vnd_cd.cd_name, &vnd_ca); if (error) aprint_error("%s: unable to register cfattach\n", vnd_cd.cd_name); }
static int systm_aprint_error(lua_State *L) { const char *s; s = lua_tostring(L, -1); if (s) aprint_error("%s", s); return 0; }
void com_ssio_attach(device_t parent, device_t self, void *aux) { struct com_ssio_softc *sc_ssio = device_private(self); struct com_softc *sc = &sc_ssio->sc_com; struct ssio_attach_args *saa = aux; int pagezero_cookie; bus_addr_t iobase; bus_space_handle_t ioh; bus_space_tag_t iot; sc->sc_dev = self; iobase = saa->saa_iobase; iot = saa->saa_iot; if (bus_space_map(iot, iobase, COM_NPORTS, 0, &ioh)) { aprint_error(": can't map I/O space\n"); return; } /* Test if this is the console. */ pagezero_cookie = hp700_pagezero_map(); if (PAGE0->mem_cons.pz_class == PCL_DUPLEX && PAGE0->mem_cons.pz_hpa == (struct iomod *)ioh) { bus_space_unmap(iot, ioh, COM_NPORTS); if (comcnattach(iot, iobase, B9600, COM_SSIO_FREQ, COM_TYPE_NORMAL, (TTYDEF_CFLAG & ~(CSIZE | PARENB)) | CS8) != 0) { aprint_error(": can't comcnattach\n"); hp700_pagezero_unmap(pagezero_cookie); return; } } hp700_pagezero_unmap(pagezero_cookie); sc->sc_frequency = COM_SSIO_FREQ; COM_INIT_REGS(sc->sc_regs, iot, ioh, iobase); com_attach_subr(sc); sc_ssio->sc_ih = ssio_intr_establish(IPL_TTY, saa->saa_irq, comintr, sc, device_xname(self)); }
static void wdc_pnpbus_attach(device_t parent, device_t self, void *aux) { struct wdc_pnpbus_softc *sc = device_private(self); struct wdc_regs *wdr; struct pnpbus_dev_attach_args *pna = aux; int cmd_iobase, cmd_len, aux_iobase, aux_len, i; sc->sc_wdcdev.sc_atac.atac_dev = self; sc->sc_wdcdev.regs = wdr = &sc->sc_wdc_regs; wdr->cmd_iot = pna->pna_iot; wdr->ctl_iot = pna->pna_iot; pnpbus_getioport(&pna->pna_res, 0, &cmd_iobase, &cmd_len); pnpbus_getioport(&pna->pna_res, 1, &aux_iobase, &aux_len); if (pnpbus_io_map(&pna->pna_res, 0, &wdr->cmd_iot, &wdr->cmd_baseioh) || pnpbus_io_map(&pna->pna_res, 1, &wdr->ctl_iot, &wdr->ctl_ioh)) { aprint_error_dev(self, "couldn't map registers\n"); } for (i = 0; i < cmd_len; i++) { if (bus_space_subregion(wdr->cmd_iot, wdr->cmd_baseioh, i, i == 0 ? 4 : 1, &wdr->cmd_iohs[i]) != 0) { aprint_error(": couldn't subregion registers\n"); return; } } wdr->data32iot = wdr->cmd_iot; wdr->data32ioh = wdr->cmd_iohs[0]; sc->sc_wdcdev.cap |= WDC_CAPABILITY_PREATA; sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DATA16; if (device_cfdata(sc->sc_wdcdev.sc_atac.atac_dev)->cf_flags & WDC_OPTIONS_32) sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DATA32; sc->sc_wdcdev.sc_atac.atac_pio_cap = 0; sc->sc_chanlist[0] = &sc->sc_channel; sc->sc_wdcdev.sc_atac.atac_channels = sc->sc_chanlist; sc->sc_wdcdev.sc_atac.atac_nchannels = 1; sc->sc_channel.ch_channel = 0; sc->sc_channel.ch_atac = &sc->sc_wdcdev.sc_atac; sc->sc_channel.ch_queue = &sc->sc_chqueue; sc->sc_channel.ch_ndrive = 2; wdc_init_shadow_regs(&sc->sc_channel); sc->sc_ih = pnpbus_intr_establish(0, IPL_BIO, IST_PNP, wdcintr, &sc->sc_channel, &pna->pna_res); aprint_normal("\n"); wdcattach(&sc->sc_channel); }
static int btn_intr(void *arg) { struct btn_obio_softc *sc = (void *)arg; int status; int rv; status = (int8_t)bus_space_read_1(sc->sc_iot, sc->sc_ioh, 0); if (status == -1) { return 0; } rv = 0; status = ~status; if (status & BTNSTAT_POWER) { if (sc->sc_mask & BTNSTAT_POWER) { hdlg_disable_pldintr(INTEN_PWRSW|INTEN_BUTTON); i80321_intr_disestablish(sc->sc_ih); sc->sc_ih = NULL; sysmon_task_queue_sched(0, btn_sysmon_pressed_event, &sc->sc_smpsw[0]); } else { aprint_error("%s: power button pressed\n", device_xname(sc->sc_dev)); } rv = 1; } else if (status & BTNSTAT_RESET) { if (sc->sc_mask & BTNSTAT_RESET) { hdlg_disable_pldintr(INTEN_PWRSW|INTEN_BUTTON); i80321_intr_disestablish(sc->sc_ih); sc->sc_ih = NULL; sysmon_task_queue_sched(0, btn_sysmon_pressed_event, &sc->sc_smpsw[1]); } else { aprint_error("%s: reset button pressed\n", device_xname(sc->sc_dev)); } rv = 1; } return rv; }
static void igphyattach(device_t parent, device_t self, void *aux) { struct mii_softc *sc = device_private(self); struct mii_attach_args *ma = aux; struct mii_data *mii = ma->mii_data; const struct mii_phydesc *mpd; struct igphy_softc *igsc = (struct igphy_softc *) sc; prop_dictionary_t dict; mpd = mii_phy_match(ma, igphys); aprint_naive(": Media interface\n"); aprint_normal(": %s, rev. %d\n", mpd->mpd_name, MII_REV(ma->mii_id2)); dict = device_properties(parent); if (!prop_dictionary_get_uint32(dict, "mactype", &igsc->sc_mactype)) aprint_error("WARNING! Failed to get mactype\n"); if (!prop_dictionary_get_uint32(dict, "macflags", &igsc->sc_macflags)) aprint_error("WARNING! Failed to get macflags\n"); sc->mii_dev = self; sc->mii_inst = mii->mii_instance; sc->mii_phy = ma->mii_phyno; sc->mii_funcs = &igphy_funcs; sc->mii_pdata = mii; sc->mii_flags = ma->mii_flags; sc->mii_anegticks = MII_ANEGTICKS_GIGE; PHY_RESET(sc); sc->mii_capabilities = PHY_READ(sc, MII_BMSR) & ma->mii_capmask; if (sc->mii_capabilities & BMSR_EXTSTAT) sc->mii_extcapabilities = PHY_READ(sc, MII_EXTSR); aprint_normal_dev(self, ""); if ((sc->mii_capabilities & BMSR_MEDIAMASK) == 0 && (sc->mii_extcapabilities & EXTSR_MEDIAMASK) == 0) aprint_error("no media present"); else mii_phy_add_media(sc); aprint_normal("\n"); }
/* * The 'create' command of ifconfig can be used to create * any numbered instance of a given device. Thus we have to * make sure we have enough room in cd_devs to create the * user-specified instance. config_attach_pseudo will do this * for us. */ static int tap_clone_create(struct if_clone *ifc, int unit) { if (tap_clone_creator(unit) == NULL) { aprint_error("%s%d: unable to attach an instance\n", tap_cd.cd_name, unit); return (ENXIO); } atomic_inc_uint(&tap_count); return (0); }
void pcfrtc_attach(struct device *parent, struct device *self, void *aux) { struct pcfrtc_softc *sc = (struct pcfrtc_softc *)self; struct i2c_attach_args *ia = aux; uint8_t cmdbuf[1], csr; sc->sc_tag = ia->ia_tag; sc->sc_address = ia->ia_addr; aprint_naive(": Real-time Clock/NVRAM\n"); aprint_normal(": PCF8583 Real-time Clock/NVRAM\n"); cmdbuf[0] = PCF8583_REG_CSR; if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP, sc->sc_address, cmdbuf, 1, &csr, 1, 0) != 0) { aprint_error("%s: unable to read CSR\n", sc->sc_dev.dv_xname); return; } aprint_normal("%s: ", sc->sc_dev.dv_xname); switch (csr & PCF8583_CSR_FN_MASK) { case PCF8583_CSR_FN_32768HZ: aprint_normal(" 32.768 kHz clock"); break; case PCF8583_CSR_FN_50HZ: aprint_normal(" 50 Hz clock"); break; case PCF8583_CSR_FN_EVENT: aprint_normal(" event counter"); break; case PCF8583_CSR_FN_TEST: aprint_normal(" test mode"); break; } if (csr & PCF8583_CSR_STOP) aprint_normal(", stopped"); if (csr & PCF8583_CSR_ALARMENABLE) aprint_normal(", alarm enabled"); aprint_normal("\n"); sc->sc_open = 0; sc->sc_todr.cookie = sc; sc->sc_todr.todr_gettime = pcfrtc_gettime; sc->sc_todr.todr_settime = pcfrtc_settime; sc->sc_todr.todr_getcal = pcfrtc_getcal; sc->sc_todr.todr_setcal = pcfrtc_setcal; sc->sc_todr.todr_setwen = NULL; todr_attach(&sc->sc_todr); }
/* ARGSUSED */ void bcspattach(int num __unused) { int error; error = ttyldisc_attach(&bcsp_disc); if (error) { aprint_error("%s: unable to register line discipline, " "error = %d\n", bcsp_cd.cd_name, error); return; } error = config_cfattach_attach(bcsp_cd.cd_name, &bcsp_ca); if (error) { aprint_error("%s: unable to register cfattach, error = %d\n", bcsp_cd.cd_name, error); config_cfdriver_detach(&bcsp_cd); (void) ttyldisc_detach(&bcsp_disc); } }
void drm_sysctl_init(struct drm_sysctl_def *def) { const void * const *b = def->bp, * const *e = def->ep; const struct sysctlnode *rnode = NULL, *cnode; const char *name = "drm2"; int error; if ((error = sysctl_createv(&def->log, 0, NULL, &rnode, CTLFLAG_PERMANENT, CTLTYPE_NODE, name, SYSCTL_DESCR("DRM driver parameters"), NULL, 0, NULL, 0, CTL_HW, CTL_CREATE, CTL_EOL)) != 0) { aprint_error("sysctl_createv returned %d, " "for %s ignoring\n", error, name); return; } for (; b < e; b++) { const struct linux_module_param_info *p = *b; char copy[256], *n, *nn; strlcpy(copy, p->name, sizeof(copy)); cnode = rnode; for (n = copy; (nn = strchr(n, '.')) != NULL; n = nn) { *nn++ = '\0'; if ((error = drm_sysctl_node(n, &cnode, &def->log)) != 0) { aprint_error("sysctl_createv returned %d, " "for %s ignoring\n", error, n); continue; } } if ((error = sysctl_createv(&def->log, 0, &cnode, &cnode, p->mode == 0600 ? CTLFLAG_READWRITE : 0, drm_sysctl_get_type(p), n, SYSCTL_DESCR(drm_sysctl_get_description(p, def)), NULL, 0, p->ptr, 0, CTL_CREATE, CTL_EOL)) != 0) aprint_error("sysctl_createv returned %d, " "for %s ignoring\n", error, n); } }
/* * Detach a keyboard. To keep track of users of the softc we keep * a reference count that's incremented while inside, e.g., read. * If the keyboard is active and the reference count is > 0 (0 is the * normal state) we post an event and then wait for the process * that had the reference to wake us up again. Then we blow away the * vnode and return (which will deallocate the softc). */ int wskbd_detach(device_t self, int flags) { struct wskbd_softc *sc = device_private(self); struct wseventvar *evar; int maj, mn; int s; #if NWSMUX > 0 /* Tell parent mux we're leaving. */ if (sc->sc_base.me_parent != NULL) wsmux_detach_sc(&sc->sc_base); #endif callout_halt(&sc->sc_repeat_ch, NULL); callout_destroy(&sc->sc_repeat_ch); if (sc->sc_isconsole) { KASSERT(wskbd_console_device == sc); wskbd_console_device = NULL; } pmf_device_deregister(self); evar = sc->sc_base.me_evp; if (evar != NULL && evar->io != NULL) { s = spltty(); if (--sc->sc_refcnt >= 0) { struct wscons_event event; /* Wake everyone by generating a dummy event. */ event.type = 0; event.value = 0; if (wsevent_inject(evar, &event, 1) != 0) wsevent_wakeup(evar); /* Wait for processes to go away. */ if (tsleep(sc, PZERO, "wskdet", hz * 60)) aprint_error("wskbd_detach: %s didn't detach\n", device_xname(self)); } splx(s); } /* locate the major number */ maj = cdevsw_lookup_major(&wskbd_cdevsw); /* Nuke the vnodes for any open instances. */ mn = device_unit(self); vdevgone(maj, mn, mn, VCHR); return (0); }
void ld_cac_attach(device_t parent, device_t self, void *aux) { struct cac_drive_info dinfo; struct cac_attach_args *caca; struct ld_cac_softc *sc = device_private(self); struct cac_softc *cac = device_private(parent); struct ld_softc *ld = &sc->sc_ld; const char *type; caca = aux; ld->sc_dv = self; sc->sc_mutex = &cac->sc_mutex; sc->sc_hwunit = caca->caca_unit; if (cac_cmd(cac, CAC_CMD_GET_LOG_DRV_INFO, &dinfo, sizeof(dinfo), sc->sc_hwunit, 0, CAC_CCB_DATA_IN, NULL)) { aprint_error(": CMD_GET_LOG_DRV_INFO failed\n"); return; } ld->sc_secsize = CAC_GET2(dinfo.secsize); ld->sc_maxxfer = CAC_MAX_XFER; ld->sc_maxqueuecnt = (CAC_MAX_CCBS - 1) / cac->sc_nunits; ld->sc_secperunit = CAC_GET2(dinfo.ncylinders) * CAC_GET1(dinfo.nheads) * CAC_GET1(dinfo.nsectors); ld->sc_start = ld_cac_start; ld->sc_dump = ld_cac_dump; switch (CAC_GET1(dinfo.mirror)) { case 0: type = "standalone disk or RAID0"; break; case 1: type = "RAID4"; break; case 2: type = "RAID1"; break; case 3: type = "RAID5"; break; default: type = "unknown type of"; break; } aprint_normal(": %s array\n", type); /* XXX We should verify this... */ ld->sc_flags = LDF_ENABLED; ldattach(ld); }
static int cgd_modcmd(modcmd_t cmd, void *arg) { int error = 0; #ifdef _MODULE devmajor_t bmajor = -1, cmajor = -1; #endif switch (cmd) { case MODULE_CMD_INIT: #ifdef _MODULE error = config_cfdriver_attach(&cgd_cd); if (error) break; error = config_cfattach_attach(cgd_cd.cd_name, &cgd_ca); if (error) { config_cfdriver_detach(&cgd_cd); aprint_error("%s: unable to register cfattach\n", cgd_cd.cd_name); break; } error = devsw_attach("cgd", &cgd_bdevsw, &bmajor, &cgd_cdevsw, &cmajor); if (error) { config_cfattach_detach(cgd_cd.cd_name, &cgd_ca); config_cfdriver_detach(&cgd_cd); break; } #endif break; case MODULE_CMD_FINI: #ifdef _MODULE error = config_cfattach_detach(cgd_cd.cd_name, &cgd_ca); if (error) break; config_cfdriver_detach(&cgd_cd); devsw_detach(&cgd_bdevsw, &cgd_cdevsw); #endif break; case MODULE_CMD_STAT: return ENOTTY; default: return ENOTTY; } return error; }
void tcbus_attach(device_t parent, device_t self, void *aux) { struct vsbus_attach_args * const va = aux; struct tcbus_softc * const sc = device_private(self); struct tcbus_attach_args tba; struct pte *pte; const size_t nentries = 32768; int error; int i; error = bus_space_map(va->va_memt, KA4x_TURBO, 0x10000, BUS_SPACE_MAP_LINEAR, &sc->sc_memh); if (error) { aprint_error(": failed to map TC slot 0: %d\n", error); return; } sc->sc_slots[0].tcs_addr = sc->sc_memh; sc->sc_slots[0].tcs_cookie = sc; tba.tba_speed = TC_SPEED_12_5_MHZ; tba.tba_slots = sc->sc_slots; tba.tba_nslots = 1; tba.tba_intr_evcnt = tcbus_intr_evcnt; tba.tba_intr_establish = tcbus_intr_establish; tba.tba_intr_disestablish = tcbus_intr_disestablish; tba.tba_get_dma_tag = tcbus_get_dma_tag; vax_sgmap_dmatag_init(&sc->sc_dmatag, sc, nentries); pte = (struct pte *) vax_map_physmem(KA4x_TURBOMAPS, nentries * sizeof(pte[0])); for (i = nentries; i > 0; ) ((uint32_t *) pte)[--i] = 0; sc->sc_dmatag._sgmap = &sc->sc_sgmap; /* * Initialize the SGMAP. */ vax_sgmap_init(&sc->sc_dmatag, &sc->sc_sgmap, "tc_sgmap", sc->sc_dmatag._wbase, sc->sc_dmatag._wsize, pte, 0); aprint_normal("\n"); aprint_verbose_dev(self, "32K entry DMA SGMAP at PA 0x%x (VA %p)\n", KA4x_TURBOMAPS, pte); tcbus_dmat = &sc->sc_dmatag; /* XXX: why not config_found(9)?? */ tcattach(parent, self, &tba); }
void xafb_attach(device_t parent, device_t self, void *aux) { struct xafb_softc *sc = device_private(self); struct apbus_attach_args *apa = aux; struct wsemuldisplaydev_attach_args wsa; struct xafb_devconfig *dc; struct rasops_info *ri; int console, i; sc->sc_dev = self; console = xafb_is_console(); if (console) { dc = &xafb_console_dc; ri = &dc->dc_ri; ri->ri_flg &= ~RI_NO_AUTO; sc->sc_nscreens = 1; } else { dc = malloc(sizeof(struct xafb_devconfig), M_DEVBUF, M_WAITOK|M_ZERO); dc->dc_fbpaddr = (paddr_t)0x10000000; dc->dc_fbbase = (void *)MIPS_PHYS_TO_KSEG1(dc->dc_fbpaddr); dc->dc_reg = (void *)(apa->apa_hwbase + 0x3000); if (xafb_common_init(dc) != 0) { aprint_error(": couldn't initialize device\n"); return; } ri = &dc->dc_ri; /* clear screen */ (*ri->ri_ops.eraserows)(ri, 0, ri->ri_rows, 0); } sc->sc_dc = dc; for (i = 0; i < 256; i++) { sc->sc_cmap_red[i] = i; sc->sc_cmap_green[i] = i; sc->sc_cmap_blue[i] = i; } aprint_normal(": %d x %d, %dbpp\n", ri->ri_width, ri->ri_height, ri->ri_depth); wsa.console = console; wsa.scrdata = &xafb_screenlist; wsa.accessops = &xafb_accessops; wsa.accesscookie = sc; config_found(self, &wsa, wsemuldisplaydevprint); }
static void pxamci_attach(device_t parent, device_t self, void *aux) { struct wzero3mci_softc *sc = device_private(self); struct pxaip_attach_args *pxa = aux; const struct wzero3mci_model *model; sc->sc.sc_dev = self; model = wzero3mci_lookup(); if (model == NULL) { aprint_error(": Unknown model."); return; } sc->sc_detect_pin = model->detect_pin; sc->sc_power_pin = model->power_pin; /* Establish SD detect interrupt */ if (sc->sc_detect_pin >= 0) { pxa2x0_gpio_set_function(sc->sc_detect_pin, GPIO_IN); sc->sc_detect_ih = pxa2x0_gpio_intr_establish(sc->sc_detect_pin, IST_EDGE_BOTH, IPL_BIO, wzero3mci_intr, sc); if (sc->sc_detect_ih == NULL) { aprint_error_dev(self, "unable to establish card detect interrupt\n"); return; } } sc->sc.sc_tag.cookie = sc; sc->sc.sc_tag.get_ocr = wzero3mci_get_ocr; sc->sc.sc_tag.set_power = wzero3mci_set_power; sc->sc.sc_tag.card_detect = wzero3mci_card_detect; sc->sc.sc_tag.write_protect = wzero3mci_write_protect; sc->sc.sc_caps = PMC_CAPS_4BIT; if (pxamci_attach_sub(self, pxa)) { aprint_error_dev(self, "unable to attach MMC controller\n"); goto free_intr; } if (!pmf_device_register(self, NULL, NULL)) { aprint_error_dev(self, "couldn't establish power handler\n"); } return; free_intr: pxa2x0_gpio_intr_disestablish(sc->sc_detect_ih); sc->sc_detect_ih = NULL; }
static void uart_attach(device_t parent, device_t self, void *aux) { struct obio_attach_args * const oba = aux; struct uart_softc * const sc = device_private(self); struct tty *tp; int maj, minor; sc->sc_dev = self; sc->sc_st = oba->oba_st; if (bus_space_map(oba->oba_st, oba->oba_addr, 256, 0, &sc->sc_ioh)) { aprint_error("unable to map device\n"); return; } /* Establish the interrupt. */ sc->sc_ih = adm5120_intr_establish(oba->oba_irq, INTR_FIQ, uart_intr, sc); if (sc->sc_ih == NULL) { aprint_error("unable to establish interrupt\n"); return; } REG_WRITE(UART_CR_REG,UART_CR_PORT_EN|UART_CR_RX_INT_EN|UART_CR_RX_TIMEOUT_INT_EN); maj = cdevsw_lookup_major(&uart_cdevsw); minor = device_unit(sc->sc_dev); tp = tty_alloc(); tp->t_oproc = uart_start; tp->t_param = uart_param; sc->sc_tty = tp; tp->t_dev = makedev(maj, minor); tty_attach(tp); if (minor == 0 && uart_consattached) { /* attach as console*/ cn_tab->cn_dev = tp->t_dev; aprint_normal(" console"); } aprint_normal("\n"); }
/* attach routine */ void dmattach(int n) { int error; error = config_cfattach_attach(dm_cd.cd_name, &dm_ca); if (error) { aprint_error("%s: unable to register cfattach\n", dm_cd.cd_name); } else { dm_doinit(); } }
int lan9118_attach(struct lan9118_softc *sc) { struct ifnet *ifp = &sc->sc_ec.ec_if; uint32_t val; int timo, i; if (sc->sc_flags & LAN9118_FLAGS_SWAP) /* byte swap mode */ bus_space_write_4(sc->sc_iot, sc->sc_ioh, LAN9118_WORD_SWAP, 0xffffffff); val = bus_space_read_4(sc->sc_iot, sc->sc_ioh, LAN9118_BYTE_TEST); if (val != LAN9118_BYTE_TEST_VALUE) { aprint_error(": failed to detect chip\n"); return EINVAL; } val = bus_space_read_4(sc->sc_iot, sc->sc_ioh, LAN9118_ID_REV); sc->sc_id = LAN9118_ID_REV_ID(val); sc->sc_rev = LAN9118_ID_REV_REV(val); #define LAN9xxx_ID(id) \ (IS_LAN9118(id) ? (id) : (IS_LAN9218(id) ? ((id) >> 4) + 0x100 : (id) & 0xfff)) aprint_normal(": SMSC LAN9%03x Rev %d\n", LAN9xxx_ID(sc->sc_id), sc->sc_rev); if (sc->sc_flags & LAN9118_FLAGS_SWAP) aprint_normal_dev(sc->sc_dev, "byte swap mode\n"); timo = 3 * 1000 * 1000; /* XXXX 3sec */ do { val = bus_space_read_4(sc->sc_iot, sc->sc_ioh, LAN9118_MAC_CSR_CMD); if (!(val & LAN9118_MAC_CSR_CMD_BUSY)) break; delay(100); } while (timo -= 100); if (timo <= 0) aprint_error_dev(sc->sc_dev, "%s: command busy\n", __func__); if (!(sc->sc_flags & LAN9118_FLAGS_NO_EEPROM)) { /* Read auto-loaded MAC address */ val = lan9118_mac_readreg(sc, LAN9118_ADDRL); sc->sc_enaddr[3] = (val >> 24) & 0xff; sc->sc_enaddr[2] = (val >> 16) & 0xff; sc->sc_enaddr[1] = (val >> 8) & 0xff; sc->sc_enaddr[0] = val & 0xff; val = lan9118_mac_readreg(sc, LAN9118_ADDRH); sc->sc_enaddr[5] = (val >> 8) & 0xff; sc->sc_enaddr[4] = val & 0xff; }
void gpiopwm_attach(device_t parent, device_t self, void *aux) { struct gpiopwm_softc *sc = device_private(self); struct gpio_attach_args *ga = aux; const struct sysctlnode *node; sc->sc_dev = self; /* Map pin */ sc->sc_gpio = ga->ga_gpio; sc->sc_map.pm_map = sc->_map; if (gpio_pin_map(sc->sc_gpio, ga->ga_offset, ga->ga_mask, &sc->sc_map)) { aprint_error(": can't map pin\n"); return; } aprint_normal(" [%d]", sc->sc_map.pm_map[0]); pmf_device_register(self, NULL, NULL); callout_init(&sc->sc_pulse, CALLOUT_MPSAFE); callout_setfunc(&sc->sc_pulse, gpiopwm_pulse, sc); sysctl_createv(&sc->sc_log, 0, NULL, &node, 0, CTLTYPE_NODE, device_xname(sc->sc_dev), SYSCTL_DESCR("GPIO software PWM"), NULL, 0, NULL, 0, CTL_HW, CTL_CREATE, CTL_EOL); if (node == NULL) { printf(": can't create sysctl node\n"); return; } sysctl_createv(&sc->sc_log, 0, &node, NULL, CTLFLAG_READWRITE, CTLTYPE_INT, "on", SYSCTL_DESCR("PWM 'on' period in ticks"), gpiopwm_set_on, 0, (void *)sc, 0, CTL_CREATE, CTL_EOL); sysctl_createv(&sc->sc_log, 0, &node, NULL, CTLFLAG_READWRITE, CTLTYPE_INT, "off", SYSCTL_DESCR("PWM 'off' period in ticks"), gpiopwm_set_off, 0, (void *)sc, 0, CTL_CREATE, CTL_EOL); aprint_normal("\n"); return; }
static int vnd_lkm(struct lkm_table *lkmtp, int cmd) { int error = 0, i; device_t dev; if (cmd == LKM_E_LOAD) { error = config_cfdriver_attach(&vnd_cd); if (error) { aprint_error("%s: unable to register cfdriver\n", vnd_cd.cd_name); return error; } vndattach(0); } else if (cmd == LKM_E_UNLOAD) { for (i = 0; i < vnd_cd.cd_ndevs; i++) { dev = device_lookup(&vnd_cd, i); if (dev != NULL && (error = vnd_destroy(dev)) != 0) return 0; } if ((error = config_cfattach_detach(vnd_cd.cd_name, &vnd_ca)) != 0) { aprint_error("%s: unable to deregister cfattach\n", vnd_cd.cd_name); return error; } if ((error = config_cfdriver_detach(&vnd_cd)) != 0) { aprint_error("%s: unable to deregister cfdriver\n", vnd_cd.cd_name); return error; } } return (error); }
void hdcintr(void *arg) { struct hdcsoftc * const sc = arg; struct buf *bp; sc->sc_status = HDC_RSTAT; if (sc->sc_active == 0) return; /* Complain? */ if ((sc->sc_status & (DKC_ST_INTPEND|DKC_ST_DONE)) != (DKC_ST_INTPEND|DKC_ST_DONE)) return; /* Why spurious ints sometimes??? */ bp = sc->sc_active; sc->sc_active = 0; if ((sc->sc_status & DKC_ST_TERMCOD) != DKC_TC_SUCCESS) { int i; u_char *g = (u_char *)&sc->sc_sreg; if (sc->sc_retries++ < 3) { /* Allow 3 retries */ hdcstart(sc, bp); return; } aprint_error_dev(sc->sc_dev, "failed, status 0x%x\n", sc->sc_status); hdc_readregs(sc); for (i = 0; i < 10; i++) aprint_error("%i: %x\n", i, g[i]); bp->b_error = ENXIO; bp->b_resid = bp->b_bcount; biodone(bp); vsbus_dma_intr(); return; } if (bp->b_flags & B_READ) { vsbus_copytoproc(bp->b_proc, sc->sc_dmabase, sc->sc_bufaddr, sc->sc_xfer); } sc->sc_diskblk += (sc->sc_xfer/DEV_BSIZE); sc->sc_bytecnt -= sc->sc_xfer; sc->sc_bufaddr = (char *)sc->sc_bufaddr + sc->sc_xfer; if (sc->sc_bytecnt == 0) { /* Finished transfer */ biodone(bp); vsbus_dma_intr(); } else hdcstart(sc, bp); }
static size_t drm_sysctl_get_size(const struct linux_module_param_info *p) { switch (p->type) { case MTYPE_bool: return sizeof(bool); case MTYPE_int: return sizeof(int); default: aprint_error("unhandled module param type %d for %s\n", p->type, p->name); return sizeof(void *); } }
static int drm_sysctl_get_type(const struct linux_module_param_info *p) { switch (p->type) { case MTYPE_bool: return CTLTYPE_BOOL; case MTYPE_int: return CTLTYPE_INT; default: aprint_error("unhandled module param type %d for %s\n", p->type, p->name); return CTLTYPE_NODE; } }