static int mfc_resume(struct platform_device *pdev) { int ret = 0; unsigned int mc_status; #if ENABLE_MONITORING_MFC_DD mfc_info("mfc_resume......#1\n"); #endif mutex_lock(&mfc_mutex); if (!mfc_is_running()) { #if ENABLE_MONITORING_MFC_DD mfc_info("mfc_resume......#2-0\n"); #endif mutex_unlock(&mfc_mutex); return 0; } #if ENABLE_MONITORING_MFC_DD mfc_info("mfc_resume......#2-1\n"); #endif #if Frame_Base_Power_CTR_ON clk_enable(mfc_clk); #endif /* * 1. MFC reset */ do { mc_status = READL(MFC_MC_STATUS); } while(mc_status != 0); mfc_cmd_reset(); WRITEL(mfc_port0_base_paddr, MFC_MC_DRAMBASE_ADDR_A); WRITEL(mfc_port1_base_paddr, MFC_MC_DRAMBASE_ADDR_B); WRITEL(1, MFC_NUM_MASTER); ret = mfc_set_wakeup(); if(ret != MFCINST_RET_OK){ mutex_unlock(&mfc_mutex); return ret; } #if Frame_Base_Power_CTR_ON clk_disable(mfc_clk); #endif mutex_unlock(&mfc_mutex); return 0; }
static int mfc_resume(struct platform_device *pdev) { int ret = 0; unsigned int mc_status; mutex_lock(&mfc_mutex); if (!mfc_is_running()) { mutex_unlock(&mfc_mutex); return 0; } clk_enable(mfc_sclk); /* * 1. MFC reset */ do { mc_status = READL(MFC_MC_STATUS); } while (mc_status != 0); if (mfc_cmd_reset() == false) { clk_disable(mfc_sclk); mutex_unlock(&mfc_mutex); mfc_err("MFCINST_ERR_INIT_FAIL\n"); return MFCINST_ERR_INIT_FAIL; } WRITEL(mfc_port0_base_paddr, MFC_MC_DRAMBASE_ADDR_A); WRITEL(mfc_port1_base_paddr, MFC_MC_DRAMBASE_ADDR_B); WRITEL(1, MFC_NUM_MASTER); ret = mfc_set_wakeup(); if (ret != MFCINST_RET_OK) { clk_disable(mfc_sclk); mutex_unlock(&mfc_mutex); return ret; } clk_disable(mfc_sclk); mutex_unlock(&mfc_mutex); return 0; }