static int uniphier_efuse_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; struct resource *res; struct nvmem_device *nvmem; struct nvmem_config econfig = {}; struct uniphier_efuse_priv *priv; priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); if (!priv) return -ENOMEM; res = platform_get_resource(pdev, IORESOURCE_MEM, 0); priv->base = devm_ioremap_resource(dev, res); if (IS_ERR(priv->base)) return PTR_ERR(priv->base); econfig.stride = 1; econfig.word_size = 1; econfig.read_only = true; econfig.reg_read = uniphier_reg_read; econfig.size = resource_size(res); econfig.priv = priv; econfig.dev = dev; nvmem = nvmem_register(&econfig); if (IS_ERR(nvmem)) return PTR_ERR(nvmem); platform_set_drvdata(pdev, nvmem); return 0; }
static int rockchip_efuse_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; struct resource *res; struct nvmem_device *nvmem; struct regmap *regmap; void __iomem *base; struct clk *clk; struct rockchip_efuse_context *context; res = platform_get_resource(pdev, IORESOURCE_MEM, 0); base = devm_ioremap_resource(dev, res); if (IS_ERR(base)) return PTR_ERR(base); context = devm_kzalloc(dev, sizeof(struct rockchip_efuse_context), GFP_KERNEL); if (IS_ERR(context)) return PTR_ERR(context); clk = devm_clk_get(dev, "pclk_efuse"); if (IS_ERR(clk)) return PTR_ERR(clk); context->dev = dev; context->base = base; context->efuse_clk = clk; rockchip_efuse_regmap_config.max_register = resource_size(res) - 1; regmap = devm_regmap_init(dev, &rockchip_efuse_bus, context, &rockchip_efuse_regmap_config); if (IS_ERR(regmap)) { dev_err(dev, "regmap init failed\n"); return PTR_ERR(regmap); } econfig.dev = dev; nvmem = nvmem_register(&econfig); if (IS_ERR(nvmem)) return PTR_ERR(nvmem); platform_set_drvdata(pdev, nvmem); return 0; }
int nvmem_mmio_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; struct resource *res; const struct nvmem_mmio_data *data; struct nvmem_device *nvmem; struct regmap *regmap; const struct of_device_id *match; void __iomem *base; if (!dev || !dev->driver) return -ENODEV; match = of_match_device(dev->driver->of_match_table, dev); if (!match || !match->data) return -EINVAL; data = match->data; res = platform_get_resource(pdev, IORESOURCE_MEM, 0); base = devm_ioremap_resource(dev, res); if (IS_ERR(base)) return PTR_ERR(base); data->regmap_config->max_register = resource_size(res) - 1; regmap = devm_regmap_init_mmio(dev, base, data->regmap_config); if (IS_ERR(regmap)) { dev_err(dev, "regmap init failed\n"); return PTR_ERR(regmap); } data->nvmem_config->dev = dev; nvmem = nvmem_register(data->nvmem_config); if (IS_ERR(nvmem)) return PTR_ERR(nvmem); platform_set_drvdata(pdev, nvmem); return 0; }
static int imx_ocotp_probe(struct platform_device *pdev) { const struct of_device_id *of_id; struct device *dev = &pdev->dev; struct resource *res; struct ocotp_priv *priv; struct nvmem_device *nvmem; priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); if (!priv) return -ENOMEM; priv->dev = dev; res = platform_get_resource(pdev, IORESOURCE_MEM, 0); priv->base = devm_ioremap_resource(dev, res); if (IS_ERR(priv->base)) return PTR_ERR(priv->base); priv->clk = devm_clk_get(dev, NULL); if (IS_ERR(priv->clk)) return PTR_ERR(priv->clk); of_id = of_match_device(imx_ocotp_dt_ids, dev); priv->params = of_device_get_match_data(&pdev->dev); imx_ocotp_nvmem_config.size = 4 * priv->params->nregs; imx_ocotp_nvmem_config.dev = dev; imx_ocotp_nvmem_config.priv = priv; priv->config = &imx_ocotp_nvmem_config; nvmem = nvmem_register(&imx_ocotp_nvmem_config); if (IS_ERR(nvmem)) return PTR_ERR(nvmem); platform_set_drvdata(pdev, nvmem); return 0; }
static int imx_ocotp_probe(struct device_d *dev) { struct resource *iores; struct ocotp_priv *priv; int ret = 0; const struct imx_ocotp_data *data; struct nvmem_device *nvmem; ret = dev_get_drvdata(dev, (const void **)&data); if (ret) return ret; iores = dev_request_mem_resource(dev, 0); if (IS_ERR(iores)) return PTR_ERR(iores); priv = xzalloc(sizeof(*priv)); priv->data = data; priv->base = IOMEM(iores->start); priv->clk = clk_get(dev, NULL); if (IS_ERR(priv->clk)) return PTR_ERR(priv->clk); strcpy(priv->dev.name, "ocotp"); priv->dev.parent = dev; register_device(&priv->dev); priv->map_config.reg_bits = 32; priv->map_config.val_bits = 32; priv->map_config.reg_stride = 4; priv->map_config.max_register = data->num_regs - 1; priv->map = regmap_init(dev, &imx_ocotp_regmap_bus, priv, &priv->map_config); if (IS_ERR(priv->map)) return PTR_ERR(priv->map); priv->config.name = "imx-ocotp"; priv->config.dev = dev; priv->config.stride = 4; priv->config.word_size = 4; priv->config.size = data->num_regs; priv->config.bus = &imx_ocotp_nvmem_bus; dev->priv = priv; nvmem = nvmem_register(&priv->config); if (IS_ERR(nvmem)) return PTR_ERR(nvmem); imx_ocotp = priv; if (IS_ENABLED(CONFIG_IMX_OCOTP_WRITE)) { dev_add_param_bool(&(priv->dev), "permanent_write_enable", NULL, NULL, &priv->permanent_write_enable, NULL); } if (IS_ENABLED(CONFIG_NET)) { int i; struct ocotp_priv_ethaddr *ethaddr; for (i = 0; i < priv->data->mac_offsets_num; i++) { ethaddr = &priv->ethaddr[i]; ethaddr->map = priv->map; ethaddr->offset = priv->data->mac_offsets[i]; ethaddr->data = data; dev_add_param_mac(&priv->dev, xasprintf("mac_addr%d", i), imx_ocotp_set_mac, imx_ocotp_get_mac, ethaddr->value, ethaddr); } /* * Alias to mac_addr0 for backwards compatibility */ ethaddr = &priv->ethaddr[0]; dev_add_param_mac(&priv->dev, "mac_addr", imx_ocotp_set_mac, imx_ocotp_get_mac, ethaddr->value, ethaddr); } imx_ocotp_init_dt(priv); dev_add_param_bool(&(priv->dev), "sense_enable", NULL, NULL, &priv->sense_enable, priv); return 0; }