struct pipe_screen *
virgl_create_screen(struct virgl_winsys *vws)
{
struct virgl_screen *screen = CALLOC_STRUCT(virgl_screen);
if (!screen)
return NULL;
screen->vws = vws;
screen->base.get_name = virgl_get_name;
screen->base.get_vendor = virgl_get_vendor;
screen->base.get_param = virgl_get_param;
screen->base.get_shader_param = virgl_get_shader_param;
screen->base.get_paramf = virgl_get_paramf;
screen->base.is_format_supported = virgl_is_format_supported;
screen->base.destroy = virgl_destroy_screen;
screen->base.context_create = virgl_context_create;
screen->base.flush_frontbuffer = virgl_flush_frontbuffer;
screen->base.get_timestamp = virgl_get_timestamp;
screen->base.fence_reference = virgl_fence_reference;
//screen->base.fence_signalled = virgl_fence_signalled;
screen->base.fence_finish = virgl_fence_finish;
virgl_init_screen_resource_functions(&screen->base);
vws->get_caps(vws, &screen->caps);
util_format_s3tc_init();
return &screen->base;
}
/**
* Create a new i915_screen object
*/
struct pipe_screen *
i915_screen_create(struct i915_winsys *iws)
{
struct i915_screen *is = CALLOC_STRUCT(i915_screen);
if (!is)
return NULL;
switch (iws->pci_id) {
case PCI_CHIP_I915_G:
case PCI_CHIP_I915_GM:
is->is_i945 = FALSE;
break;
case PCI_CHIP_I945_G:
case PCI_CHIP_I945_GM:
case PCI_CHIP_I945_GME:
case PCI_CHIP_G33_G:
case PCI_CHIP_Q33_G:
case PCI_CHIP_Q35_G:
case PCI_CHIP_PINEVIEW_G:
case PCI_CHIP_PINEVIEW_M:
is->is_i945 = TRUE;
break;
default:
debug_printf("%s: unknown pci id 0x%x, cannot create screen\n",
__FUNCTION__, iws->pci_id);
FREE(is);
return NULL;
}
is->iws = iws;
is->base.winsys = NULL;
is->base.destroy = i915_destroy_screen;
is->base.flush_frontbuffer = i915_flush_frontbuffer;
is->base.get_name = i915_get_name;
is->base.get_vendor = i915_get_vendor;
is->base.get_param = i915_get_param;
is->base.get_shader_param = i915_get_shader_param;
is->base.get_paramf = i915_get_paramf;
is->base.is_format_supported = i915_is_format_supported;
is->base.context_create = i915_create_context;
is->base.fence_reference = i915_fence_reference;
is->base.fence_signalled = i915_fence_signalled;
is->base.fence_finish = i915_fence_finish;
i915_init_screen_resource_functions(is);
i915_debug_init(is);
util_format_s3tc_init();
return &is->base;
}
/**
* Create a new pipe_screen object
* Note: we're not presently subclassing pipe_screen (no softpipe_screen).
*/
struct pipe_screen *
softpipe_create_screen(struct sw_winsys *winsys)
{
struct softpipe_screen *screen = CALLOC_STRUCT(softpipe_screen);
if (!screen)
return NULL;
screen->winsys = winsys;
screen->base.destroy = softpipe_destroy_screen;
screen->base.get_name = softpipe_get_name;
screen->base.get_vendor = softpipe_get_vendor;
screen->base.get_param = softpipe_get_param;
screen->base.get_shader_param = softpipe_get_shader_param;
screen->base.get_paramf = softpipe_get_paramf;
screen->base.get_video_param = softpipe_get_video_param;
screen->base.get_timestamp = softpipe_get_timestamp;
screen->base.is_format_supported = softpipe_is_format_supported;
screen->base.is_video_format_supported = vl_video_buffer_is_format_supported;
screen->base.context_create = softpipe_create_context;
screen->base.flush_frontbuffer = softpipe_flush_frontbuffer;
screen->use_llvm = debug_get_option_use_llvm();
util_format_s3tc_init();
softpipe_init_screen_texture_funcs(&screen->base);
softpipe_init_screen_fence_funcs(&screen->base);
return &screen->base;
}
int main(int argc, char **argv)
{
boolean success;
util_format_s3tc_init();
success = test_all();
return success ? 0 : 1;
}
struct pipe_screen* r300_screen_create(struct radeon_winsys *rws)
{
struct r300_screen *r300screen = CALLOC_STRUCT(r300_screen);
if (!r300screen) {
FREE(r300screen);
return NULL;
}
rws->query_info(rws, &r300screen->info);
r300_init_debug(r300screen);
r300_parse_chipset(r300screen->info.pci_id, &r300screen->caps);
if (SCREEN_DBG_ON(r300screen, DBG_NO_ZMASK))
r300screen->caps.zmask_ram = 0;
if (SCREEN_DBG_ON(r300screen, DBG_NO_HIZ))
r300screen->caps.hiz_ram = 0;
if (r300screen->info.drm_minor < 8)
r300screen->caps.has_us_format = FALSE;
pipe_mutex_init(r300screen->num_contexts_mutex);
util_slab_create(&r300screen->pool_buffers,
sizeof(struct r300_resource), 64,
UTIL_SLAB_SINGLETHREADED);
r300screen->rws = rws;
r300screen->screen.winsys = (struct pipe_winsys*)rws;
r300screen->screen.destroy = r300_destroy_screen;
r300screen->screen.get_name = r300_get_name;
r300screen->screen.get_vendor = r300_get_vendor;
r300screen->screen.get_param = r300_get_param;
r300screen->screen.get_shader_param = r300_get_shader_param;
r300screen->screen.get_paramf = r300_get_paramf;
r300screen->screen.get_video_param = r300_get_video_param;
r300screen->screen.is_format_supported = r300_is_format_supported;
r300screen->screen.is_video_format_supported = vl_video_buffer_is_format_supported;
r300screen->screen.context_create = r300_create_context;
r300screen->screen.fence_reference = r300_fence_reference;
r300screen->screen.fence_signalled = r300_fence_signalled;
r300screen->screen.fence_finish = r300_fence_finish;
r300_init_screen_resource_functions(r300screen);
util_format_s3tc_init();
return &r300screen->screen;
}
bool r600_common_screen_init(struct r600_common_screen *rscreen,
struct radeon_winsys *ws)
{
ws->query_info(ws, &rscreen->info);
rscreen->b.get_name = r600_get_name;
rscreen->b.get_vendor = r600_get_vendor;
rscreen->b.get_compute_param = r600_get_compute_param;
rscreen->b.get_paramf = r600_get_paramf;
rscreen->b.get_driver_query_info = r600_get_driver_query_info;
rscreen->b.get_timestamp = r600_get_timestamp;
rscreen->b.fence_finish = r600_fence_finish;
rscreen->b.fence_reference = r600_fence_reference;
rscreen->b.fence_signalled = r600_fence_signalled;
rscreen->b.resource_destroy = u_resource_destroy_vtbl;
if (rscreen->info.has_uvd) {
rscreen->b.get_video_param = rvid_get_video_param;
rscreen->b.is_video_format_supported = rvid_is_format_supported;
} else {
rscreen->b.get_video_param = r600_get_video_param;
rscreen->b.is_video_format_supported = vl_video_buffer_is_format_supported;
}
r600_init_screen_texture_functions(rscreen);
rscreen->ws = ws;
rscreen->family = rscreen->info.family;
rscreen->chip_class = rscreen->info.chip_class;
rscreen->debug_flags = debug_get_flags_option("R600_DEBUG", common_debug_options, 0);
if (!r600_init_tiling(rscreen)) {
return false;
}
util_format_s3tc_init();
pipe_mutex_init(rscreen->aux_context_lock);
if (rscreen->info.drm_minor >= 28 && (rscreen->debug_flags & DBG_TRACE_CS)) {
rscreen->trace_bo = (struct r600_resource*)pipe_buffer_create(&rscreen->b,
PIPE_BIND_CUSTOM,
PIPE_USAGE_STAGING,
4096);
if (rscreen->trace_bo) {
rscreen->trace_ptr = rscreen->ws->buffer_map(rscreen->trace_bo->cs_buf, NULL,
PIPE_TRANSFER_UNSYNCHRONIZED);
}
}
return true;
}
struct pipe_screen *
ilo_screen_create(struct intel_winsys *ws)
{
struct ilo_screen *is;
const struct intel_winsys_info *info;
ilo_debug = debug_get_flags_option("ILO_DEBUG", ilo_debug_flags, 0);
is = CALLOC_STRUCT(ilo_screen);
if (!is)
return NULL;
is->winsys = ws;
intel_winsys_enable_reuse(is->winsys);
info = intel_winsys_get_info(is->winsys);
if (!init_dev(&is->dev, info)) {
FREE(is);
return NULL;
}
util_format_s3tc_init();
is->base.destroy = ilo_screen_destroy;
is->base.get_name = ilo_get_name;
is->base.get_vendor = ilo_get_vendor;
is->base.get_param = ilo_get_param;
is->base.get_paramf = ilo_get_paramf;
is->base.get_shader_param = ilo_get_shader_param;
is->base.get_video_param = ilo_get_video_param;
is->base.get_compute_param = ilo_get_compute_param;
is->base.get_timestamp = ilo_get_timestamp;
is->base.flush_frontbuffer = NULL;
is->base.fence_reference = ilo_fence_reference;
is->base.fence_signalled = ilo_fence_signalled;
is->base.fence_finish = ilo_fence_finish;
is->base.get_driver_query_info = NULL;
ilo_init_format_functions(is);
ilo_init_context_functions(is);
ilo_init_resource_functions(is);
return &is->base;
}
struct pipe_screen* r300_screen_create(struct radeon_winsys *rws)
{
struct r300_screen *r300screen = CALLOC_STRUCT(r300_screen);
if (!r300screen) {
FREE(r300screen);
return NULL;
}
rws->query_info(rws, &r300screen->info);
r300_init_debug(r300screen);
r300_parse_chipset(r300screen->info.pci_id, &r300screen->caps);
if (SCREEN_DBG_ON(r300screen, DBG_NO_ZMASK))
r300screen->caps.zmask_ram = 0;
if (SCREEN_DBG_ON(r300screen, DBG_NO_HIZ))
r300screen->caps.hiz_ram = 0;
r300screen->rws = rws;
r300screen->screen.destroy = r300_destroy_screen;
r300screen->screen.get_name = r300_get_name;
r300screen->screen.get_vendor = r300_get_vendor;
r300screen->screen.get_device_vendor = r300_get_device_vendor;
r300screen->screen.get_param = r300_get_param;
r300screen->screen.get_shader_param = r300_get_shader_param;
r300screen->screen.get_paramf = r300_get_paramf;
r300screen->screen.get_video_param = r300_get_video_param;
r300screen->screen.is_format_supported = r300_is_format_supported;
r300screen->screen.is_video_format_supported = vl_video_buffer_is_format_supported;
r300screen->screen.context_create = r300_create_context;
r300screen->screen.fence_reference = r300_fence_reference;
r300screen->screen.fence_finish = r300_fence_finish;
r300_init_screen_resource_functions(r300screen);
slab_create_parent(&r300screen->pool_transfers, sizeof(struct pipe_transfer), 64);
util_format_s3tc_init();
pipe_mutex_init(r300screen->cmask_mutex);
return &r300screen->screen;
}
PUBLIC
struct pipe_screen *
swr_create_screen_internal(struct sw_winsys *winsys)
{
struct swr_screen *screen = CALLOC_STRUCT(swr_screen);
if (!screen)
return NULL;
if (!getenv("KNOB_MAX_PRIMS_PER_DRAW")) {
g_GlobalKnobs.MAX_PRIMS_PER_DRAW.Value(49152);
}
if (!lp_build_init()) {
FREE(screen);
return NULL;
}
screen->winsys = winsys;
screen->base.get_name = swr_get_name;
screen->base.get_vendor = swr_get_vendor;
screen->base.is_format_supported = swr_is_format_supported;
screen->base.context_create = swr_create_context;
screen->base.can_create_resource = swr_can_create_resource;
screen->base.destroy = swr_destroy_screen;
screen->base.get_param = swr_get_param;
screen->base.get_shader_param = swr_get_shader_param;
screen->base.get_paramf = swr_get_paramf;
screen->base.resource_create = swr_resource_create;
screen->base.resource_destroy = swr_resource_destroy;
screen->base.flush_frontbuffer = swr_flush_frontbuffer;
screen->hJitMgr = JitCreateContext(KNOB_SIMD_WIDTH, KNOB_ARCH_STR, "swr");
swr_fence_init(&screen->base);
util_format_s3tc_init();
return &screen->base;
}
bool r600_common_screen_init(struct r600_common_screen *rscreen,
struct radeon_winsys *ws)
{
ws->query_info(ws, &rscreen->info);
rscreen->b.fence_finish = r600_fence_finish;
rscreen->b.fence_reference = r600_fence_reference;
rscreen->b.fence_signalled = r600_fence_signalled;
rscreen->ws = ws;
rscreen->family = rscreen->info.family;
rscreen->chip_class = rscreen->info.chip_class;
rscreen->debug_flags = debug_get_flags_option("R600_DEBUG", common_debug_options, 0);
if (!r600_init_tiling(rscreen)) {
return false;
}
util_format_s3tc_init();
pipe_mutex_init(rscreen->aux_context_lock);
return true;
}
int
nouveau_screen_init(struct nouveau_screen *screen, struct nouveau_device *dev)
{
struct pipe_screen *pscreen = &screen->base;
int ret;
ret = nouveau_channel_alloc(dev, 0xbeef0201, 0xbeef0202,
&screen->channel);
if (ret)
return ret;
screen->device = dev;
pscreen->get_name = nouveau_screen_get_name;
pscreen->get_vendor = nouveau_screen_get_vendor;
pscreen->fence_reference = nouveau_screen_fence_ref;
pscreen->fence_signalled = nouveau_screen_fence_signalled;
pscreen->fence_finish = nouveau_screen_fence_finish;
util_format_s3tc_init();
return 0;
}
bool r600_common_screen_init(struct r600_common_screen *rscreen,
struct radeon_winsys *ws)
{
char llvm_string[32] = {};
ws->query_info(ws, &rscreen->info);
#if HAVE_LLVM
snprintf(llvm_string, sizeof(llvm_string),
", LLVM %i.%i.%i", (HAVE_LLVM >> 8) & 0xff,
HAVE_LLVM & 0xff, MESA_LLVM_VERSION_PATCH);
#endif
snprintf(rscreen->renderer_string, sizeof(rscreen->renderer_string),
"%s (DRM %i.%i.%i%s)",
r600_get_chip_name(rscreen), rscreen->info.drm_major,
rscreen->info.drm_minor, rscreen->info.drm_patchlevel,
llvm_string);
rscreen->b.get_name = r600_get_name;
rscreen->b.get_vendor = r600_get_vendor;
rscreen->b.get_device_vendor = r600_get_device_vendor;
rscreen->b.get_compute_param = r600_get_compute_param;
rscreen->b.get_paramf = r600_get_paramf;
rscreen->b.get_driver_query_info = r600_get_driver_query_info;
rscreen->b.get_timestamp = r600_get_timestamp;
rscreen->b.fence_finish = r600_fence_finish;
rscreen->b.fence_reference = r600_fence_reference;
rscreen->b.resource_destroy = u_resource_destroy_vtbl;
rscreen->b.resource_from_user_memory = r600_buffer_from_user_memory;
if (rscreen->info.has_uvd) {
rscreen->b.get_video_param = rvid_get_video_param;
rscreen->b.is_video_format_supported = rvid_is_format_supported;
} else {
rscreen->b.get_video_param = r600_get_video_param;
rscreen->b.is_video_format_supported = vl_video_buffer_is_format_supported;
}
r600_init_screen_texture_functions(rscreen);
rscreen->ws = ws;
rscreen->family = rscreen->info.family;
rscreen->chip_class = rscreen->info.chip_class;
rscreen->debug_flags = debug_get_flags_option("R600_DEBUG", common_debug_options, 0);
if (!r600_init_tiling(rscreen)) {
return false;
}
util_format_s3tc_init();
pipe_mutex_init(rscreen->aux_context_lock);
pipe_mutex_init(rscreen->gpu_load_mutex);
if (((rscreen->info.drm_major == 2 && rscreen->info.drm_minor >= 28) ||
rscreen->info.drm_major == 3) &&
(rscreen->debug_flags & DBG_TRACE_CS)) {
rscreen->trace_bo = (struct r600_resource*)pipe_buffer_create(&rscreen->b,
PIPE_BIND_CUSTOM,
PIPE_USAGE_STAGING,
4096);
if (rscreen->trace_bo) {
rscreen->trace_ptr = rscreen->ws->buffer_map(rscreen->trace_bo->cs_buf, NULL,
PIPE_TRANSFER_UNSYNCHRONIZED);
}
}
if (rscreen->debug_flags & DBG_INFO) {
printf("pci_id = 0x%x\n", rscreen->info.pci_id);
printf("family = %i\n", rscreen->info.family);
printf("chip_class = %i\n", rscreen->info.chip_class);
printf("gart_size = %i MB\n", (int)(rscreen->info.gart_size >> 20));
printf("vram_size = %i MB\n", (int)(rscreen->info.vram_size >> 20));
printf("max_sclk = %i\n", rscreen->info.max_sclk);
printf("max_compute_units = %i\n", rscreen->info.max_compute_units);
printf("max_se = %i\n", rscreen->info.max_se);
printf("max_sh_per_se = %i\n", rscreen->info.max_sh_per_se);
printf("drm = %i.%i.%i\n", rscreen->info.drm_major,
rscreen->info.drm_minor, rscreen->info.drm_patchlevel);
printf("has_uvd = %i\n", rscreen->info.has_uvd);
printf("vce_fw_version = %i\n", rscreen->info.vce_fw_version);
printf("r600_num_backends = %i\n", rscreen->info.r600_num_backends);
printf("r600_clock_crystal_freq = %i\n", rscreen->info.r600_clock_crystal_freq);
printf("r600_tiling_config = 0x%x\n", rscreen->info.r600_tiling_config);
printf("r600_num_tile_pipes = %i\n", rscreen->info.r600_num_tile_pipes);
printf("r600_max_pipes = %i\n", rscreen->info.r600_max_pipes);
printf("r600_virtual_address = %i\n", rscreen->info.r600_virtual_address);
printf("r600_has_dma = %i\n", rscreen->info.r600_has_dma);
printf("r600_backend_map = %i\n", rscreen->info.r600_backend_map);
printf("r600_backend_map_valid = %i\n", rscreen->info.r600_backend_map_valid);
printf("si_tile_mode_array_valid = %i\n", rscreen->info.si_tile_mode_array_valid);
printf("cik_macrotile_mode_array_valid = %i\n", rscreen->info.cik_macrotile_mode_array_valid);
}
/**
* Create a new pipe_screen object
* Note: we're not presently subclassing pipe_screen (no llvmpipe_screen).
*/
struct pipe_screen *
llvmpipe_create_screen(struct sw_winsys *winsys)
{
struct llvmpipe_screen *screen;
util_cpu_detect();
#ifdef DEBUG
LP_DEBUG = debug_get_flags_option("LP_DEBUG", lp_debug_flags, 0 );
#endif
LP_PERF = debug_get_flags_option("LP_PERF", lp_perf_flags, 0 );
screen = CALLOC_STRUCT(llvmpipe_screen);
if (!screen)
return NULL;
if (!lp_jit_screen_init(screen)) {
FREE(screen);
return NULL;
}
screen->winsys = winsys;
screen->base.destroy = llvmpipe_destroy_screen;
screen->base.get_name = llvmpipe_get_name;
screen->base.get_vendor = llvmpipe_get_vendor;
screen->base.get_device_vendor = llvmpipe_get_vendor; // TODO should be the CPU vendor
screen->base.get_param = llvmpipe_get_param;
screen->base.get_shader_param = llvmpipe_get_shader_param;
screen->base.get_paramf = llvmpipe_get_paramf;
screen->base.is_format_supported = llvmpipe_is_format_supported;
screen->base.context_create = llvmpipe_create_context;
screen->base.flush_frontbuffer = llvmpipe_flush_frontbuffer;
screen->base.fence_reference = llvmpipe_fence_reference;
screen->base.fence_finish = llvmpipe_fence_finish;
screen->base.get_timestamp = llvmpipe_get_timestamp;
llvmpipe_init_screen_resource_funcs(&screen->base);
screen->num_threads = util_cpu_caps.nr_cpus > 1 ? util_cpu_caps.nr_cpus : 0;
#ifdef PIPE_SUBSYSTEM_EMBEDDED
screen->num_threads = 0;
#endif
screen->num_threads = debug_get_num_option("LP_NUM_THREADS", screen->num_threads);
screen->num_threads = MIN2(screen->num_threads, LP_MAX_THREADS);
screen->rast = lp_rast_create(screen->num_threads);
if (!screen->rast) {
lp_jit_screen_cleanup(screen);
FREE(screen);
return NULL;
}
pipe_mutex_init(screen->rast_mutex);
util_format_s3tc_init();
return &screen->base;
}
bool r600_common_screen_init(struct r600_common_screen *rscreen,
struct radeon_winsys *ws)
{
char llvm_string[32] = {}, kernel_version[128] = {};
struct utsname uname_data;
ws->query_info(ws, &rscreen->info);
if (uname(&uname_data) == 0)
snprintf(kernel_version, sizeof(kernel_version),
" / %s", uname_data.release);
#if HAVE_LLVM
snprintf(llvm_string, sizeof(llvm_string),
", LLVM %i.%i.%i", (HAVE_LLVM >> 8) & 0xff,
HAVE_LLVM & 0xff, MESA_LLVM_VERSION_PATCH);
#endif
snprintf(rscreen->renderer_string, sizeof(rscreen->renderer_string),
"%s (DRM %i.%i.%i%s%s)",
r600_get_chip_name(rscreen), rscreen->info.drm_major,
rscreen->info.drm_minor, rscreen->info.drm_patchlevel,
kernel_version, llvm_string);
rscreen->b.get_name = r600_get_name;
rscreen->b.get_vendor = r600_get_vendor;
rscreen->b.get_device_vendor = r600_get_device_vendor;
rscreen->b.get_compute_param = r600_get_compute_param;
rscreen->b.get_paramf = r600_get_paramf;
rscreen->b.get_timestamp = r600_get_timestamp;
rscreen->b.fence_finish = r600_fence_finish;
rscreen->b.fence_reference = r600_fence_reference;
rscreen->b.resource_destroy = u_resource_destroy_vtbl;
rscreen->b.resource_from_user_memory = r600_buffer_from_user_memory;
rscreen->b.query_memory_info = r600_query_memory_info;
if (rscreen->info.has_uvd) {
rscreen->b.get_video_param = rvid_get_video_param;
rscreen->b.is_video_format_supported = rvid_is_format_supported;
} else {
rscreen->b.get_video_param = r600_get_video_param;
rscreen->b.is_video_format_supported = vl_video_buffer_is_format_supported;
}
r600_init_screen_texture_functions(rscreen);
r600_init_screen_query_functions(rscreen);
rscreen->ws = ws;
rscreen->family = rscreen->info.family;
rscreen->chip_class = rscreen->info.chip_class;
rscreen->debug_flags = debug_get_flags_option("R600_DEBUG", common_debug_options, 0);
rscreen->force_aniso = MIN2(16, debug_get_num_option("R600_TEX_ANISO", -1));
if (rscreen->force_aniso >= 0) {
printf("radeon: Forcing anisotropy filter to %ix\n",
/* round down to a power of two */
1 << util_logbase2(rscreen->force_aniso));
}
util_format_s3tc_init();
pipe_mutex_init(rscreen->aux_context_lock);
pipe_mutex_init(rscreen->gpu_load_mutex);
if (rscreen->debug_flags & DBG_INFO) {
printf("pci_id = 0x%x\n", rscreen->info.pci_id);
printf("family = %i (%s)\n", rscreen->info.family,
r600_get_chip_name(rscreen));
printf("chip_class = %i\n", rscreen->info.chip_class);
printf("gart_size = %i MB\n", (int)DIV_ROUND_UP(rscreen->info.gart_size, 1024*1024));
printf("vram_size = %i MB\n", (int)DIV_ROUND_UP(rscreen->info.vram_size, 1024*1024));
printf("max_alloc_size = %i MB\n",
(int)DIV_ROUND_UP(rscreen->info.max_alloc_size, 1024*1024));
printf("has_virtual_memory = %i\n", rscreen->info.has_virtual_memory);
printf("gfx_ib_pad_with_type2 = %i\n", rscreen->info.gfx_ib_pad_with_type2);
printf("has_sdma = %i\n", rscreen->info.has_sdma);
printf("has_uvd = %i\n", rscreen->info.has_uvd);
printf("vce_fw_version = %i\n", rscreen->info.vce_fw_version);
printf("vce_harvest_config = %i\n", rscreen->info.vce_harvest_config);
printf("clock_crystal_freq = %i\n", rscreen->info.clock_crystal_freq);
printf("drm = %i.%i.%i\n", rscreen->info.drm_major,
rscreen->info.drm_minor, rscreen->info.drm_patchlevel);
printf("has_userptr = %i\n", rscreen->info.has_userptr);
printf("r600_max_quad_pipes = %i\n", rscreen->info.r600_max_quad_pipes);
printf("max_shader_clock = %i\n", rscreen->info.max_shader_clock);
printf("num_good_compute_units = %i\n", rscreen->info.num_good_compute_units);
printf("max_se = %i\n", rscreen->info.max_se);
printf("max_sh_per_se = %i\n", rscreen->info.max_sh_per_se);
printf("r600_gb_backend_map = %i\n", rscreen->info.r600_gb_backend_map);
printf("r600_gb_backend_map_valid = %i\n", rscreen->info.r600_gb_backend_map_valid);
printf("r600_num_banks = %i\n", rscreen->info.r600_num_banks);
printf("num_render_backends = %i\n", rscreen->info.num_render_backends);
printf("num_tile_pipes = %i\n", rscreen->info.num_tile_pipes);
printf("pipe_interleave_bytes = %i\n", rscreen->info.pipe_interleave_bytes);
}
return true;
}
/**
* Create a new pipe_screen object
* Note: we're not presently subclassing pipe_screen (no llvmpipe_screen).
*/
struct pipe_screen *
llvmpipe_create_screen(struct sw_winsys *winsys)
{
struct llvmpipe_screen *screen;
#ifdef PIPE_ARCH_X86
/* require SSE2 due to LLVM PR6960. */
util_cpu_detect();
if (!util_cpu_caps.has_sse2)
return NULL;
#endif
screen = CALLOC_STRUCT(llvmpipe_screen);
#ifdef DEBUG
LP_DEBUG = debug_get_flags_option("LP_DEBUG", lp_debug_flags, 0 );
#endif
if (!screen)
return NULL;
screen->winsys = winsys;
screen->base.destroy = llvmpipe_destroy_screen;
screen->base.get_name = llvmpipe_get_name;
screen->base.get_vendor = llvmpipe_get_vendor;
screen->base.get_param = llvmpipe_get_param;
screen->base.get_shader_param = llvmpipe_get_shader_param;
screen->base.get_paramf = llvmpipe_get_paramf;
screen->base.is_format_supported = llvmpipe_is_format_supported;
screen->base.context_create = llvmpipe_create_context;
screen->base.flush_frontbuffer = llvmpipe_flush_frontbuffer;
screen->base.fence_reference = llvmpipe_fence_reference;
screen->base.fence_signalled = llvmpipe_fence_signalled;
screen->base.fence_finish = llvmpipe_fence_finish;
llvmpipe_init_screen_resource_funcs(&screen->base);
lp_jit_screen_init(screen);
#ifdef PIPE_OS_EMBEDDED
screen->num_threads = 0;
#else
screen->num_threads = util_cpu_caps.nr_cpus;
#endif
screen->num_threads = debug_get_num_option("LP_NUM_THREADS", screen->num_threads);
screen->num_threads = MIN2(screen->num_threads, LP_MAX_THREADS);
screen->rast = lp_rast_create(screen->num_threads);
if (!screen->rast) {
lp_jit_screen_cleanup(screen);
FREE(screen);
return NULL;
}
pipe_mutex_init(screen->rast_mutex);
util_format_s3tc_init();
return &screen->base;
}
int
nouveau_screen_init(struct nouveau_screen *screen, struct nouveau_device *dev)
{
struct pipe_screen *pscreen = &screen->base;
struct nv04_fifo nv04_data = { .vram = 0xbeef0201, .gart = 0xbeef0202 };
struct nvc0_fifo nvc0_data = { };
uint64_t time;
int size, ret;
void *data;
union nouveau_bo_config mm_config;
char *nv_dbg = getenv("NOUVEAU_MESA_DEBUG");
if (nv_dbg)
nouveau_mesa_debug = atoi(nv_dbg);
/*
* this is initialized to 1 in nouveau_drm_screen_create after screen
* is fully constructed and added to the global screen list.
*/
screen->refcount = -1;
if (dev->chipset < 0xc0) {
data = &nv04_data;
size = sizeof(nv04_data);
} else {
data = &nvc0_data;
size = sizeof(nvc0_data);
}
ret = nouveau_object_new(&dev->object, 0, NOUVEAU_FIFO_CHANNEL_CLASS,
data, size, &screen->channel);
if (ret)
return ret;
screen->device = dev;
ret = nouveau_client_new(screen->device, &screen->client);
if (ret)
return ret;
ret = nouveau_pushbuf_new(screen->client, screen->channel,
4, 512 * 1024, 1,
&screen->pushbuf);
if (ret)
return ret;
/* getting CPU time first appears to be more accurate */
screen->cpu_gpu_time_delta = os_time_get();
ret = nouveau_getparam(dev, NOUVEAU_GETPARAM_PTIMER_TIME, &time);
if (!ret)
screen->cpu_gpu_time_delta = time - screen->cpu_gpu_time_delta * 1000;
pscreen->get_name = nouveau_screen_get_name;
pscreen->get_vendor = nouveau_screen_get_vendor;
pscreen->get_device_vendor = nouveau_screen_get_device_vendor;
pscreen->get_timestamp = nouveau_screen_get_timestamp;
pscreen->fence_reference = nouveau_screen_fence_ref;
pscreen->fence_signalled = nouveau_screen_fence_signalled;
pscreen->fence_finish = nouveau_screen_fence_finish;
util_format_s3tc_init();
screen->lowmem_bindings = PIPE_BIND_GLOBAL; /* gallium limit */
screen->vidmem_bindings =
PIPE_BIND_RENDER_TARGET | PIPE_BIND_DEPTH_STENCIL |
PIPE_BIND_DISPLAY_TARGET | PIPE_BIND_SCANOUT |
PIPE_BIND_CURSOR |
PIPE_BIND_SAMPLER_VIEW |
PIPE_BIND_SHADER_RESOURCE | PIPE_BIND_COMPUTE_RESOURCE |
PIPE_BIND_GLOBAL;
screen->sysmem_bindings =
PIPE_BIND_SAMPLER_VIEW | PIPE_BIND_STREAM_OUTPUT |
PIPE_BIND_COMMAND_ARGS_BUFFER;
memset(&mm_config, 0, sizeof(mm_config));
screen->mm_GART = nouveau_mm_create(dev,
NOUVEAU_BO_GART | NOUVEAU_BO_MAP,
&mm_config);
screen->mm_VRAM = nouveau_mm_create(dev, NOUVEAU_BO_VRAM, &mm_config);
return 0;
}
void
nouveau_screen_fini(struct nouveau_screen *screen)
{
nouveau_mm_destroy(screen->mm_GART);
nouveau_mm_destroy(screen->mm_VRAM);
nouveau_pushbuf_del(&screen->pushbuf);
nouveau_client_del(&screen->client);
nouveau_object_del(&screen->channel);
nouveau_device_del(&screen->device);
}
struct pipe_screen *
fd_screen_create(struct fd_device *dev)
{
struct fd_screen *screen = CALLOC_STRUCT(fd_screen);
struct pipe_screen *pscreen;
uint64_t val;
fd_mesa_debug = debug_get_option_fd_mesa_debug();
if (fd_mesa_debug & FD_DBG_NOBIN)
fd_binning_enabled = false;
glsl120 = !!(fd_mesa_debug & FD_DBG_GLSL120);
if (!screen)
return NULL;
pscreen = &screen->base;
screen->dev = dev;
screen->refcnt = 1;
// maybe this should be in context?
screen->pipe = fd_pipe_new(screen->dev, FD_PIPE_3D);
if (!screen->pipe) {
DBG("could not create 3d pipe");
goto fail;
}
if (fd_pipe_get_param(screen->pipe, FD_GMEM_SIZE, &val)) {
DBG("could not get GMEM size");
goto fail;
}
screen->gmemsize_bytes = val;
if (fd_pipe_get_param(screen->pipe, FD_DEVICE_ID, &val)) {
DBG("could not get device-id");
goto fail;
}
screen->device_id = val;
if (fd_pipe_get_param(screen->pipe, FD_GPU_ID, &val)) {
DBG("could not get gpu-id");
goto fail;
}
screen->gpu_id = val;
if (fd_pipe_get_param(screen->pipe, FD_CHIP_ID, &val)) {
DBG("could not get chip-id");
/* older kernels may not have this property: */
unsigned core = screen->gpu_id / 100;
unsigned major = (screen->gpu_id % 100) / 10;
unsigned minor = screen->gpu_id % 10;
unsigned patch = 0; /* assume the worst */
val = (patch & 0xff) | ((minor & 0xff) << 8) |
((major & 0xff) << 16) | ((core & 0xff) << 24);
}
screen->chip_id = val;
DBG("Pipe Info:");
DBG(" GPU-id: %d", screen->gpu_id);
DBG(" Chip-id: 0x%08x", screen->chip_id);
DBG(" GMEM size: 0x%08x", screen->gmemsize_bytes);
/* explicitly checking for GPU revisions that are known to work. This
* may be overly conservative for a3xx, where spoofing the gpu_id with
* the blob driver seems to generate identical cmdstream dumps. But
* on a2xx, there seem to be small differences between the GPU revs
* so it is probably better to actually test first on real hardware
* before enabling:
*
* If you have a different adreno version, feel free to add it to one
* of the cases below and see what happens. And if it works, please
* send a patch ;-)
*/
switch (screen->gpu_id) {
case 220:
fd2_screen_init(pscreen);
break;
case 305:
case 307:
case 320:
case 330:
fd3_screen_init(pscreen);
break;
case 420:
fd4_screen_init(pscreen);
break;
default:
debug_printf("unsupported GPU: a%03d\n", screen->gpu_id);
goto fail;
}
pscreen->destroy = fd_screen_destroy;
pscreen->get_param = fd_screen_get_param;
pscreen->get_paramf = fd_screen_get_paramf;
pscreen->get_shader_param = fd_screen_get_shader_param;
fd_resource_screen_init(pscreen);
fd_query_screen_init(pscreen);
pscreen->get_name = fd_screen_get_name;
pscreen->get_vendor = fd_screen_get_vendor;
pscreen->get_device_vendor = fd_screen_get_device_vendor;
pscreen->get_timestamp = fd_screen_get_timestamp;
pscreen->fence_reference = fd_screen_fence_ref;
pscreen->fence_finish = fd_screen_fence_finish;
util_format_s3tc_init();
return pscreen;
fail:
fd_screen_destroy(pscreen);
return NULL;
}
struct pipe_screen *
fd_screen_create(struct fd_device *dev)
{
struct fd_screen *screen = CALLOC_STRUCT(fd_screen);
struct pipe_screen *pscreen;
uint64_t val;
fd_mesa_debug = debug_get_option_fd_mesa_debug();
if (!screen)
return NULL;
pscreen = &screen->base;
screen->dev = dev;
// maybe this should be in context?
screen->pipe = fd_pipe_new(screen->dev, FD_PIPE_3D);
if (!screen->pipe) {
DBG("could not create 3d pipe");
goto fail;
}
if (fd_pipe_get_param(screen->pipe, FD_GMEM_SIZE, &val)) {
DBG("could not get GMEM size");
goto fail;
}
screen->gmemsize_bytes = val;
if (fd_pipe_get_param(screen->pipe, FD_DEVICE_ID, &val)) {
DBG("could not get device-id");
goto fail;
}
screen->device_id = val;
if (fd_pipe_get_param(screen->pipe, FD_GPU_ID, &val)) {
DBG("could not get gpu-id");
goto fail;
}
screen->gpu_id = val;
/* explicitly checking for GPU revisions that are known to work. This
* may be overly conservative for a3xx, where spoofing the gpu_id with
* the blob driver seems to generate identical cmdstream dumps. But
* on a2xx, there seem to be small differences between the GPU revs
* so it is probably better to actually test first on real hardware
* before enabling:
*
* If you have a different adreno version, feel free to add it to one
* of the two cases below and see what happens. And if it works, please
* send a patch ;-)
*/
switch (screen->gpu_id) {
case 220:
fd2_screen_init(pscreen);
break;
case 320:
fd3_screen_init(pscreen);
break;
default:
debug_printf("unsupported GPU: a%03d\n", screen->gpu_id);
goto fail;
}
pscreen->destroy = fd_screen_destroy;
pscreen->get_param = fd_screen_get_param;
pscreen->get_paramf = fd_screen_get_paramf;
pscreen->get_shader_param = fd_screen_get_shader_param;
fd_resource_screen_init(pscreen);
pscreen->get_name = fd_screen_get_name;
pscreen->get_vendor = fd_screen_get_vendor;
pscreen->get_timestamp = fd_screen_get_timestamp;
pscreen->fence_reference = fd_screen_fence_ref;
pscreen->fence_signalled = fd_screen_fence_signalled;
pscreen->fence_finish = fd_screen_fence_finish;
util_format_s3tc_init();
return pscreen;
fail:
fd_screen_destroy(pscreen);
return NULL;
}