void intel_set_gem_max_sizes(ScrnInfoPtr scrn)
{
intel_screen_private *intel = intel_get_screen_private(scrn);
size_t agp_size = agp_aperture_size(xf86GetPciInfoForEntity(intel->pEnt->index),
INTEL_INFO(intel)->gen);
/* The chances of being able to mmap an object larger than
* agp_size/2 are slim. Moreover, we may be forced to fallback
* using a gtt mapping as both the source and a mask, as well
* as a destination and all need to fit into the aperture.
*/
intel->max_gtt_map_size = agp_size / 4;
/* Let objects be tiled up to the size where only 4 would fit in
* the aperture, presuming best case alignment. Also if we
* cannot mmap it using the GTT we will be stuck. */
intel->max_tiling_size = intel->max_gtt_map_size;
/* Large BOs will tend to hit SW fallbacks frequently, and also will
* tend to fail to successfully map when doing SW fallbacks because we
* overcommit address space for BO access, or worse cause aperture
* thrashing.
*/
intel->max_bo_size = intel->max_gtt_map_size;
}
static Bool
VMwarePreinitStub(ScrnInfoPtr pScrn, int flags)
{
#if XSERVER_LIBPCIACCESS
struct pci_device *pciInfo;
#else
pciVideoPtr pciInfo;
#endif /* XSERVER_LIBPCIACCESS */
EntityInfoPtr pEnt;
pScrn->PreInit = pScrn->driverPrivate;
#ifdef BUILD_VMWGFX
pScrn->driverPrivate = NULL;
/*
* Try vmwgfx path.
*/
if ((*pScrn->PreInit)(pScrn, flags))
return TRUE;
/*
* Can't run legacy hosted
*/
if (vmwgfx_hosted_detect())
return FALSE;
#else
xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"Driver was compiled without KMS- and 3D support.\n");
#endif /* defined(BUILD_VMWGFX) */
xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
"Disabling 3D support.\n");
xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
"Disabling Render Acceleration.\n");
xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
"Disabling RandR12+ support.\n");
pScrn->driverPrivate = NULL;
vmwlegacy_hookup(pScrn);
pEnt = xf86GetEntityInfo(pScrn->entityList[0]);
pciInfo = xf86GetPciInfoForEntity(pEnt->index);
if (pciInfo == NULL)
return FALSE;
pScrn->chipset = (char*)xf86TokenToString(VMWAREChipsets,
DEVICE_ID(pciInfo));
return (*pScrn->PreInit)(pScrn, flags);
};
int intE6_handler()
{
#if 0
pciVideoPtr pvp;
if ((pvp = xf86GetPciInfoForEntity(pInt->entityIndex)))
X86_AX = (pvp->bus << 8) | (pvp->device << 3) | (pvp->func & 0x7);
pushw(X86_CS);
pushw(X86_IP);
X86_CS = pInt->BIOSseg;
X86_EIP = 0x0003;
X86_ES = 0; /* standard pc es */
#endif
printf("intE6 not supported right now.\n");
return 1;
}
int
mapPciRom(int pciEntity, unsigned char * address)
{
PCITAG tag;
unsigned char *mem, *ptr;
int length;
pciVideoPtr pvp = xf86GetPciInfoForEntity(pciEntity);
if (pvp == NULL) {
#ifdef DEBUG
ErrorF("mapPciRom: no PCI info\n");
#endif
return 0;
}
tag = pciTag(pvp->bus,pvp->device,pvp->func);
length = 1 << pvp->biosSize;
/* Read in entire PCI ROM */
mem = ptr = xnfcalloc(length, 1);
length = xf86ReadPciBIOS(0, tag, -1, ptr, length);
if (length > 0)
memcpy(address, ptr, length);
/* unmap/close/disable PCI bios mem */
xfree(mem);
#ifdef DEBUG
if (!length)
ErrorF("mapPciRom: no BIOS found\n");
#ifdef PRINT_PCI
else
dprint(address,0x20);
#endif
#endif
return length;
}
static Bool
PreInit(ScrnInfoPtr pScrn, int flags)
{
modesettingPtr ms;
rgb defaultWeight = { 0, 0, 0 };
EntityInfoPtr pEnt;
EntPtr msEnt = NULL;
char *BusID = NULL;
const char *devicename;
Bool prefer_shadow = TRUE;
uint64_t value = 0;
int ret;
int bppflags;
int defaultdepth, defaultbpp;
if (pScrn->numEntities != 1)
return FALSE;
pEnt = xf86GetEntityInfo(pScrn->entityList[0]);
if (flags & PROBE_DETECT) {
return FALSE;
}
/* Allocate driverPrivate */
if (!GetRec(pScrn))
return FALSE;
ms = modesettingPTR(pScrn);
ms->SaveGeneration = -1;
ms->pEnt = pEnt;
pScrn->displayWidth = 640; /* default it */
/* Allocate an entity private if necessary */
if (xf86IsEntityShared(pScrn->entityList[0])) {
msEnt = xf86GetEntityPrivate(pScrn->entityList[0],
modesettingEntityIndex)->ptr;
ms->entityPrivate = msEnt;
} else
ms->entityPrivate = NULL;
if (xf86IsEntityShared(pScrn->entityList[0])) {
if (xf86IsPrimInitDone(pScrn->entityList[0])) {
/* do something */
} else {
xf86SetPrimInitDone(pScrn->entityList[0]);
}
}
pScrn->monitor = pScrn->confScreen->monitor;
pScrn->progClock = TRUE;
pScrn->rgbBits = 8;
#if XSERVER_PLATFORM_BUS
if (pEnt->location.type == BUS_PLATFORM) {
#ifdef XF86_PDEV_SERVER_FD
if (pEnt->location.id.plat->flags & XF86_PDEV_SERVER_FD)
ms->fd = xf86_get_platform_device_int_attrib(pEnt->location.id.plat, ODEV_ATTRIB_FD, -1);
else
#endif
{
char *path = xf86_get_platform_device_attrib(pEnt->location.id.plat, ODEV_ATTRIB_PATH);
ms->fd = open_hw(path);
}
}
else
#endif
if (pEnt->location.type == BUS_PCI) {
ms->PciInfo = xf86GetPciInfoForEntity(ms->pEnt->index);
if (ms->PciInfo) {
BusID = malloc(64);
sprintf(BusID, "PCI:%d:%d:%d",
#if XSERVER_LIBPCIACCESS
((ms->PciInfo->domain << 8) | ms->PciInfo->bus),
ms->PciInfo->dev, ms->PciInfo->func
#else
((pciConfigPtr) ms->PciInfo->thisCard)->busnum,
((pciConfigPtr) ms->PciInfo->thisCard)->devnum,
((pciConfigPtr) ms->PciInfo->thisCard)->funcnum
#endif
);
}
ms->fd = drmOpen(NULL, BusID);
} else {
devicename = xf86FindOptionValue(ms->pEnt->device->options, "kmsdev");
ms->fd = open_hw(devicename);
}
if (ms->fd < 0)
return FALSE;
ms->drmmode.fd = ms->fd;
#ifdef MODESETTING_OUTPUT_SLAVE_SUPPORT
pScrn->capabilities = 0;
#ifdef DRM_CAP_PRIME
ret = drmGetCap(ms->fd, DRM_CAP_PRIME, &value);
if (ret == 0) {
if (value & DRM_PRIME_CAP_IMPORT)
pScrn->capabilities |= RR_Capability_SinkOutput;
}
#endif
#endif
drmmode_get_default_bpp(pScrn, &ms->drmmode, &defaultdepth, &defaultbpp);
if (defaultdepth == 24 && defaultbpp == 24)
bppflags = SupportConvert32to24 | Support24bppFb;
else
bppflags = PreferConvert24to32 | SupportConvert24to32 | Support32bppFb;
if (!xf86SetDepthBpp
(pScrn, defaultdepth, defaultdepth, defaultbpp, bppflags))
return FALSE;
switch (pScrn->depth) {
case 15:
case 16:
case 24:
break;
default:
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
"Given depth (%d) is not supported by the driver\n",
pScrn->depth);
return FALSE;
}
xf86PrintDepthBpp(pScrn);
/* Process the options */
xf86CollectOptions(pScrn, NULL);
if (!(ms->Options = malloc(sizeof(Options))))
return FALSE;
memcpy(ms->Options, Options, sizeof(Options));
xf86ProcessOptions(pScrn->scrnIndex, pScrn->options, ms->Options);
if (!xf86SetWeight(pScrn, defaultWeight, defaultWeight))
return FALSE;
if (!xf86SetDefaultVisual(pScrn, -1))
return FALSE;
if (xf86ReturnOptValBool(ms->Options, OPTION_SW_CURSOR, FALSE)) {
ms->drmmode.sw_cursor = TRUE;
}
ret = drmGetCap(ms->fd, DRM_CAP_DUMB_PREFER_SHADOW, &value);
if (!ret) {
prefer_shadow = !!value;
}
ms->cursor_width = 64;
ms->cursor_height = 64;
ret = drmGetCap(ms->fd, DRM_CAP_CURSOR_WIDTH, &value);
if (!ret) {
ms->cursor_width = value;
}
ret = drmGetCap(ms->fd, DRM_CAP_CURSOR_HEIGHT, &value);
if (!ret) {
ms->cursor_height = value;
}
ms->drmmode.shadow_enable = xf86ReturnOptValBool(ms->Options, OPTION_SHADOW_FB, prefer_shadow);
xf86DrvMsg(pScrn->scrnIndex, X_INFO, "ShadowFB: preferred %s, enabled %s\n", prefer_shadow ? "YES" : "NO", ms->drmmode.shadow_enable ? "YES" : "NO");
if (drmmode_pre_init(pScrn, &ms->drmmode, pScrn->bitsPerPixel / 8) == FALSE) {
xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "KMS setup failed\n");
goto fail;
}
/*
* If the driver can do gamma correction, it should call xf86SetGamma() here.
*/
{
Gamma zeros = { 0.0, 0.0, 0.0 };
if (!xf86SetGamma(pScrn, zeros)) {
return FALSE;
}
}
if (pScrn->modes == NULL) {
xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "No modes.\n");
return FALSE;
}
pScrn->currentMode = pScrn->modes;
/* Set display resolution */
xf86SetDpi(pScrn, 0, 0);
/* Load the required sub modules */
if (!xf86LoadSubModule(pScrn, "fb")) {
return FALSE;
}
if (ms->drmmode.shadow_enable) {
if (!xf86LoadSubModule(pScrn, "shadow")) {
return FALSE;
}
}
return TRUE;
fail:
return FALSE;
}
/* Mandatory */
Bool
LgPreInit(ScrnInfoPtr pScrn, int flags)
{
CirPtr pCir;
vgaHWPtr hwp;
MessageType from;
int i;
ClockRangePtr clockRanges;
int fbPCIReg, ioPCIReg;
char *s;
if (flags & PROBE_DETECT) {
cirProbeDDC( pScrn, xf86GetEntityInfo(pScrn->entityList[0])->index );
return TRUE;
}
#ifdef LG_DEBUG
ErrorF("LgPreInit\n");
#endif
/* Check the number of entities, and fail if it isn't one. */
if (pScrn->numEntities != 1)
return FALSE;
/* The vgahw module should be loaded here when needed */
if (!xf86LoadSubModule(pScrn, "vgahw"))
return FALSE;
xf86LoaderReqSymLists(vgahwSymbols, NULL);
/*
* Allocate a vgaHWRec
*/
if (!vgaHWGetHWRec(pScrn))
return FALSE;
hwp = VGAHWPTR(pScrn);
vgaHWGetIOBase(hwp);
/* Allocate the LgRec driverPrivate */
if (!LgGetRec(pScrn))
return FALSE;
pCir = CIRPTR(pScrn);
pCir->pScrn = pScrn;
pCir->PIOReg = hwp->PIOOffset + 0x3CE;
/* Get the entity, and make sure it is PCI. */
pCir->pEnt = xf86GetEntityInfo(pScrn->entityList[0]);
if (pCir->pEnt->location.type != BUS_PCI)
return FALSE;
pCir->Chipset = pCir->pEnt->chipset;
/* Find the PCI info for this screen */
pCir->PciInfo = xf86GetPciInfoForEntity(pCir->pEnt->index);
pCir->PciTag = pciTag(pCir->PciInfo->bus,
pCir->PciInfo->device,
pCir->PciInfo->func);
if (xf86LoadSubModule(pScrn, "int10")) {
xf86Int10InfoPtr int10InfoPtr;
xf86LoaderReqSymLists(int10Symbols, NULL);
int10InfoPtr = xf86InitInt10(pCir->pEnt->index);
if (int10InfoPtr)
xf86FreeInt10(int10InfoPtr);
}
/* Set pScrn->monitor */
pScrn->monitor = pScrn->confScreen->monitor;
/*
* The first thing we should figure out is the depth, bpp, etc.
* We support both 24bpp and 32bpp layouts, so indicate that.
*/
if (!xf86SetDepthBpp(pScrn, 0, 0, 0, Support24bppFb | Support32bppFb |
SupportConvert32to24 | PreferConvert32to24)) {
return FALSE;
}
/* Check that the returned depth is one we support */
switch (pScrn->depth) {
case 8:
case 15:
case 16:
case 24:
case 32:
/* OK */
break;
default:
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
"Given depth (%d) is not supported by this driver\n", pScrn->depth);
return FALSE;
}
xf86PrintDepthBpp(pScrn);
/* Get the depth24 pixmap format */
if (pScrn->depth == 24 && pix24bpp == 0)
pix24bpp = xf86GetBppFromDepth(pScrn, 24);
/*
* This must happen after pScrn->display has been set because
* xf86SetWeight references it.
*/
if (pScrn->depth > 8) {
/* The defaults are OK for us */
rgb zeros = {0, 0, 0};
/* !!! I think we can force 5-6-5 weight for 16bpp here for
the 5462. */
if (!xf86SetWeight(pScrn, zeros, zeros)) {
return FALSE;
} else {
/* XXX check that weight returned is supported */
;
}
}
if (!xf86SetDefaultVisual(pScrn, -1))
return FALSE;
/* Collect all of the relevant option flags (fill in pScrn->options) */
xf86CollectOptions(pScrn, NULL);
/* Process the options */
if (!(pCir->Options = xalloc(sizeof(LgOptions))))
return FALSE;
memcpy(pCir->Options, LgOptions, sizeof(LgOptions));
xf86ProcessOptions(pScrn->scrnIndex, pScrn->options, pCir->Options);
pScrn->rgbBits = 6;
from = X_DEFAULT;
pCir->HWCursor = FALSE;
if (xf86GetOptValBool(pCir->Options, OPTION_HW_CURSOR, &pCir->HWCursor))
from = X_CONFIG;
xf86DrvMsg(pScrn->scrnIndex, from, "Using %s cursor\n",
pCir->HWCursor ? "HW" : "SW");
if (xf86ReturnOptValBool(pCir->Options, OPTION_NOACCEL, FALSE)) {
pCir->NoAccel = TRUE;
xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "Acceleration disabled\n");
}
if (pScrn->bitsPerPixel < 8) {
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
"Cannot use in less than 8 bpp\n");
return FALSE;
}
/*
* Set the ChipRev, allowing config file entries to
* override.
*/
if (pCir->pEnt->device->chipRev >= 0) {
pCir->ChipRev = pCir->pEnt->device->chipRev;
xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "ChipRev override: %d\n",
pCir->ChipRev);
} else {
pCir->ChipRev = pCir->PciInfo->chipRev;
}
/* Cirrus swapped the FB and IO registers in the 5465 (by design). */
if (PCI_CHIP_GD5465 == pCir->Chipset) {
fbPCIReg = 0;
ioPCIReg = 1;
} else {
fbPCIReg = 1;
ioPCIReg = 0;
}
/* Find the frame buffer base address */
if (pCir->pEnt->device->MemBase != 0) {
/* Require that the config file value matches one of the PCI values. */
if (!xf86CheckPciMemBase(pCir->PciInfo, pCir->pEnt->device->MemBase)) {
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
"MemBase 0x%08lX doesn't match any PCI base register.\n",
pCir->pEnt->device->MemBase);
return FALSE;
}
pCir->FbAddress = pCir->pEnt->device->MemBase;
from = X_CONFIG;
} else {
if (pCir->PciInfo->memBase[fbPCIReg] != 0) {
pCir->FbAddress = pCir->PciInfo->memBase[fbPCIReg] & 0xff000000;
from = X_PROBED;
} else {
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
"No valid FB address in PCI config space\n");
LgFreeRec(pScrn);
return FALSE;
}
}
xf86DrvMsg(pScrn->scrnIndex, from, "Linear framebuffer at 0x%lX\n",
(unsigned long)pCir->FbAddress);
/* Find the MMIO base address */
if (pCir->pEnt->device->IOBase != 0) {
/* Require that the config file value matches one of the PCI values. */
if (!xf86CheckPciMemBase(pCir->PciInfo, pCir->pEnt->device->IOBase)) {
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
"IOBase 0x%08lX doesn't match any PCI base register.\n",
pCir->pEnt->device->IOBase);
return FALSE;
}
pCir->IOAddress = pCir->pEnt->device->IOBase;
from = X_CONFIG;
} else {
if (pCir->PciInfo->memBase[ioPCIReg] != 0) {
pCir->IOAddress = pCir->PciInfo->memBase[ioPCIReg] & 0xfffff000;
from = X_PROBED;
} else {
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
"No valid MMIO address in PCI config space\n");
}
}
xf86DrvMsg(pScrn->scrnIndex, from, "MMIO registers at 0x%lX\n",
(unsigned long)pCir->IOAddress);
/*
* If the user has specified the amount of memory in the XF86Config
* file, we respect that setting.
*/
if (pCir->pEnt->device->videoRam != 0) {
pScrn->videoRam = pCir->pEnt->device->videoRam;
from = X_CONFIG;
} else {
pScrn->videoRam = LgCountRam(pScrn);
from = X_PROBED;
}
if (2048 == pScrn->videoRam) {
/* Two-way interleaving */
pCir->chip.lg->memInterleave = 0x40;
} else if (4096 == pScrn->videoRam || 8192 == pScrn->videoRam) {
/* Four-way interleaving */
pCir->chip.lg->memInterleave = 0x80;
} else {
/* One-way interleaving */
pCir->chip.lg->memInterleave = 0x00;
}
xf86DrvMsg(pScrn->scrnIndex, from, "VideoRAM: %d kByte\n",
pScrn->videoRam);
pCir->FbMapSize = pScrn->videoRam * 1024;
pCir->IoMapSize = 0x4000; /* 16K for moment, will increase */
pScrn->racIoFlags = RAC_COLORMAP
#ifndef EXPERIMENTAL
| RAC_VIEWPORT
#endif
;
xf86SetOperatingState(resVgaMem, pCir->pEnt->index, ResUnusedOpr);
/* Register the PCI-assigned resources. */
if (xf86RegisterResources(pCir->pEnt->index, NULL, ResExclusive)) {
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
"xf86RegisterResources() found resource conflicts\n");
return FALSE;
}
if (!xf86LoadSubModule(pScrn, "ddc")) {
LgFreeRec(pScrn);
return FALSE;
}
xf86LoaderReqSymLists(ddcSymbols, NULL);
#if LGuseI2C
if (!xf86LoadSubModule(pScrn, "i2c")) {
LgFreeRec(pScrn);
return FALSE;
}
xf86LoaderReqSymLists(i2cSymbols, NULL);
#endif
/* Read and print the monitor DDC information */
pScrn->monitor->DDC = LgDoDDC(pScrn);
/* The gamma fields must be initialised when using the new cmap code */
if (pScrn->depth > 1) {
Gamma zeros = {0.0, 0.0, 0.0};
if (!xf86SetGamma(pScrn, zeros))
return FALSE;
}
if (xf86GetOptValBool(pCir->Options,
OPTION_SHADOW_FB,&pCir->shadowFB))
xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "ShadowFB %s.\n",
pCir->shadowFB ? "enabled" : "disabled");
if ((s = xf86GetOptValString(pCir->Options, OPTION_ROTATE))) {
if(!xf86NameCmp(s, "CW")) {
/* accel is disabled below for shadowFB */
pCir->shadowFB = TRUE;
pCir->rotate = 1;
xf86DrvMsg(pScrn->scrnIndex, X_CONFIG,
"Rotating screen clockwise - acceleration disabled\n");
} else if(!xf86NameCmp(s, "CCW")) {
pCir->shadowFB = TRUE;
pCir->rotate = -1;
xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "Rotating screen"
"counter clockwise - acceleration disabled\n");
} else {
xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "\"%s\" is not a valid"
"value for Option \"Rotate\"\n", s);
xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"Valid options are \"CW\" or \"CCW\"\n");
}
}
if (pCir->shadowFB && !pCir->NoAccel) {
xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
"HW acceleration not supported with \"shadowFB\".\n");
pCir->NoAccel = TRUE;
}
if (pCir->rotate && pCir->HWCursor) {
xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
"HW cursor not supported with \"rotate\".\n");
pCir->HWCursor = FALSE;
}
/* We use a programmable clock */
pScrn->progClock = TRUE;
/* XXX Set HW cursor use */
/* Set the min pixel clock */
pCir->MinClock = 12000; /* XXX Guess, need to check this */
xf86DrvMsg(pScrn->scrnIndex, X_DEFAULT, "Min pixel clock is %d MHz\n",
pCir->MinClock / 1000);
/*
* If the user has specified ramdac speed in the XF86Config
* file, we respect that setting.
*/
if (pCir->pEnt->device->dacSpeeds[0]) {
ErrorF("Do not specify a Clocks line for Cirrus chips\n");
return FALSE;
} else {
int speed;
int *p;
switch (pCir->Chipset) {
case PCI_CHIP_GD5462:
p = gd5462_MaxClocks;
break;
case PCI_CHIP_GD5464:
case PCI_CHIP_GD5464BD:
p = gd5464_MaxClocks;
break;
case PCI_CHIP_GD5465:
p = gd5465_MaxClocks;
break;
default:
ErrorF("???\n");
return FALSE;
}
switch (pScrn->bitsPerPixel) {
case 8:
speed = p[1];
break;
case 15:
case 16:
speed = p[2];
break;
case 24:
speed = p[3];
break;
case 32:
speed = p[4];
break;
default:
/* Should not get here */
speed = 0;
break;
}
pCir->MaxClock = speed;
from = X_PROBED;
}
xf86DrvMsg(pScrn->scrnIndex, from, "Max pixel clock is %d MHz\n",
pCir->MaxClock / 1000);
/*
* Setup the ClockRanges, which describe what clock ranges are available,
* and what sort of modes they can be used for.
*/
clockRanges = xnfcalloc(sizeof(ClockRange), 1);
clockRanges->next = NULL;
clockRanges->minClock = pCir->MinClock;
clockRanges->maxClock = pCir->MaxClock;
clockRanges->clockIndex = -1; /* programmable */
clockRanges->interlaceAllowed = FALSE; /* XXX check this */
clockRanges->doubleScanAllowed = FALSE; /* XXX check this */
clockRanges->doubleScanAllowed = FALSE; /* XXX check this */
clockRanges->doubleScanAllowed = FALSE; /* XXX check this */
clockRanges->ClockMulFactor = 1;
clockRanges->ClockDivFactor = 1;
clockRanges->PrivFlags = 0;
/* Depending upon what sized tiles used, either 128 or 256. */
/* Aw, heck. Just say 128. */
pCir->Rounding = 128 >> pCir->BppShift;
/*
* xf86ValidateModes will check that the mode HTotal and VTotal values
* don't exceed the chipset's limit if pScrn->maxHValue and
* pScrn->maxVValue are set. Since our CIRValidMode() already takes
* care of this, we don't worry about setting them here.
*/
i = xf86ValidateModes(pScrn, pScrn->monitor->Modes, pScrn->display->modes,
clockRanges,
LgLinePitches[pScrn->bitsPerPixel / 8 - 1],
0, 0, 128 * 8,
0, 0, /* Any virtual height is allowed. */
pScrn->display->virtualX,
pScrn->display->virtualY,
pCir->FbMapSize,
LOOKUP_BEST_REFRESH);
pCir->chip.lg->lineDataIndex = LgFindLineData(pScrn->displayWidth,
pScrn->bitsPerPixel);
if (i == -1) {
LgFreeRec(pScrn);
return FALSE;
}
/* Prune the modes marked as invalid */
xf86PruneDriverModes(pScrn);
if (i == 0 || pScrn->modes == NULL) {
xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "No valid modes found\n");
LgFreeRec(pScrn);
return FALSE;
}
/*
* Set the CRTC parameters for all of the modes based on the type
* of mode, and the chipset's interlace requirements.
*
* Calling this is required if the mode->Crtc* values are used by the
* driver and if the driver doesn't provide code to set them. They
* are not pre-initialised at all.
*/
xf86SetCrtcForModes(pScrn, INTERLACE_HALVE_V);
/* Set the current mode to the first in the list */
pScrn->currentMode = pScrn->modes;
/* Print the list of modes being used */
xf86PrintModes(pScrn);
/* Set display resolution */
xf86SetDpi(pScrn, 0, 0);
/* Load bpp-specific modules */
switch (pScrn->bitsPerPixel) {
case 8:
case 16:
case 24:
case 32:
if (xf86LoadSubModule(pScrn, "fb") == NULL) {
LgFreeRec(pScrn);
return FALSE;
}
xf86LoaderReqSymLists(fbSymbols, NULL);
break;
}
/* Load XAA if needed */
if (!pCir->NoAccel) {
if (!xf86LoadSubModule(pScrn, "xaa")) {
LgFreeRec(pScrn);
return FALSE;
}
xf86LoaderReqSymLists(xaaSymbols, NULL);
}
/* Load ramdac if needed */
if (pCir->HWCursor) {
if (!xf86LoadSubModule(pScrn, "ramdac")) {
LgFreeRec(pScrn);
return FALSE;
}
xf86LoaderReqSymLists(ramdacSymbols, NULL);
}
if (pCir->shadowFB) {
if (!xf86LoadSubModule(pScrn, "shadowfb")) {
LgFreeRec(pScrn);
return FALSE;
}
xf86LoaderReqSymLists(shadowSymbols, NULL);
}
return TRUE;
}
/* Mandatory */
static Bool
VoodooPreInit(ScrnInfoPtr pScrn, int flags)
{
VoodooPtr pVoo;
int i;
ClockRangePtr clockRanges;
MessageType from;
int maxwidth;
if (flags & PROBE_DETECT)
return FALSE;
/* Check the number of entities, and fail if it isn't one. */
if (pScrn->numEntities != 1)
return FALSE;
/* Set pScrn->monitor */
pScrn->monitor = pScrn->confScreen->monitor;
if (!xf86SetDepthBpp(pScrn, 16, 0, 0, Support32bppFb)) {
return FALSE;
}
/* Check that the returned depth is one we support */
switch (pScrn->depth) {
case 16:
case 24:
case 32:
break;
default:
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
"Given depth (%d) is not supported by this driver\n",
pScrn->depth);
return FALSE;
}
xf86PrintDepthBpp(pScrn);
if(pScrn->depth == 32)
pScrn->depth = 24;
/*
* This must happen after pScrn->display has been set because
* xf86SetWeight references it.
*/
if (pScrn->depth > 8) {
/* The defaults are OK for us */
rgb zeros = {0, 0, 0};
if (!xf86SetWeight(pScrn, zeros, zeros)) {
return FALSE;
} else {
/* XXX check that weight returned is supported */
;
}
}
/* Set the default visual. */
if (!xf86SetDefaultVisual(pScrn, -1)) {
return FALSE;
}
/* We don't support DirectColor at > 8bpp */
if (pScrn->depth > 8 && pScrn->defaultVisual != TrueColor) {
xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "Given default visual"
" (%s) is not supported at depth %d\n",
xf86GetVisualName(pScrn->defaultVisual), pScrn->depth);
return FALSE;
}
/* Set default gamma */
{
Gamma zeros = {0.0, 0.0, 0.0};
if (!xf86SetGamma(pScrn, zeros)) {
return FALSE;
}
}
/* We use a programmable clock */
pScrn->progClock = TRUE;
/* Allocate the VoodooRec driverPrivate */
if (!VoodooGetRec(pScrn)) {
return FALSE;
}
pVoo = VoodooPTR(pScrn);
/* Get the entity */
pVoo->pEnt = xf86GetEntityInfo(pScrn->entityList[0]);
pVoo->PciInfo = xf86GetPciInfoForEntity(pVoo->pEnt->index);
#ifndef XSERVER_LIBPCIACCESS
pVoo->PciTag = pciTag(pVoo->PciInfo->bus, pVoo->PciInfo->device, pVoo->PciInfo->func);
#endif
/* Collect all of the relevant option flags (fill in pScrn->options) */
xf86CollectOptions(pScrn, NULL);
/* Process the options */
if (!(pVoo->Options = malloc(sizeof(VoodooOptions))))
return FALSE;
memcpy(pVoo->Options, VoodooOptions, sizeof(VoodooOptions));
xf86ProcessOptions(pScrn->scrnIndex, pScrn->options, pVoo->Options);
/* Need to do rotation some day */
if(pVoo->pEnt->chipset == PCI_CHIP_VOODOO2)
{
pVoo->Voodoo2 = 1; /* We have 2D accel, interlace, double */
pVoo->Accel = 1;
}
else
{
pVoo->Voodoo2 = 0;
pVoo->ShadowFB = 1;
xf86DrvMsg(pScrn->scrnIndex, X_DEFAULT, "Using shadowFB with Voodoo1 hardware.\n");
}
from = X_DEFAULT;
if (xf86ReturnOptValBool(pVoo->Options, OPTION_SHADOW_FB, FALSE)) {
pVoo->ShadowFB = 1;
pVoo->Accel = 0;
}
if (xf86ReturnOptValBool(pVoo->Options, OPTION_PASS_THROUGH, FALSE))
pVoo->PassThrough = 1;
if (xf86ReturnOptValBool(pVoo->Options, OPTION_NOACCEL, FALSE)) {
pVoo->ShadowFB = 1;
pVoo->Accel = 0;
}
if(pScrn->depth == 24 && !pVoo->ShadowFB)
{
xf86DrvMsg(pScrn->scrnIndex, X_DEFAULT, "ShadowFB is required for 24/32bit modes.\n");
pVoo->ShadowFB = 1;
pVoo->Accel = 0;
}
/* MMIO at 0 , FB at 4Mb, Texture at 8Mb */
pVoo->PhysBase = PCI_REGION_BASE(pVoo->PciInfo, 0, REGION_MEM) + 0x400000;
#ifndef XSERVER_LIBPCIACCESS
pVoo->MMIO = xf86MapPciMem(pScrn->scrnIndex, VIDMEM_MMIO, pVoo->PciTag,
pVoo->PciInfo->memBase[0], 0x400000);
pVoo->FBBase = xf86MapPciMem(pScrn->scrnIndex, VIDMEM_MMIO, pVoo->PciTag,
pVoo->PciInfo->memBase[0] + 0x400000, 0x400000);
#else
{
void** result = (void**)&pVoo->MMIO;
int err = pci_device_map_range(pVoo->PciInfo,
PCI_REGION_BASE(pVoo->PciInfo, 0, REGION_MEM),
0x400000,
PCI_DEV_MAP_FLAG_WRITABLE,
result);
if (err)
return FALSE;
}
{
void** result = (void**)&pVoo->FBBase;
int err = pci_device_map_range(pVoo->PciInfo,
PCI_REGION_BASE(pVoo->PciInfo, 0, REGION_MEM) + 0x400000,
0x400000,
PCI_DEV_MAP_FLAG_WRITABLE|
PCI_DEV_MAP_FLAG_WRITE_COMBINE,
result);
if (err)
return FALSE;
}
#endif
VoodooHardwareInit(pVoo);
/*
* If the user has specified the amount of memory in the XF86Config
* file, we respect that setting.
*/
if (pVoo->pEnt->device->videoRam != 0) {
pScrn->videoRam = pVoo->pEnt->device->videoRam;
from = X_CONFIG;
} else {
pScrn->videoRam = VoodooMemorySize(pVoo) * 1024 ; /* Sizer reports Mbytes */
from = X_PROBED;
}
xf86DrvMsg(pScrn->scrnIndex, from, "Video RAM: %d kB\n",
pScrn->videoRam);
/* Set up clock ranges so that the xf86ValidateModes() function will not fail a mode because of the clock
requirement (because we don't use the clock value anyway) */
clockRanges = xnfcalloc(sizeof(ClockRange), 1);
clockRanges->next = NULL;
clockRanges->minClock = 10000;
clockRanges->maxClock = 250000; /* 250MHz DAC */
clockRanges->clockIndex = -1; /* programmable */
if(pVoo->Voodoo2)
{
clockRanges->interlaceAllowed = TRUE;
clockRanges->doubleScanAllowed = TRUE;
maxwidth = min(1024, pScrn->display->virtualX);
}
else
{
clockRanges->interlaceAllowed = FALSE;
clockRanges->doubleScanAllowed = FALSE;
maxwidth = min(800, pScrn->display->virtualX);
}
/* Select valid modes from those available */
i = xf86ValidateModes(pScrn, pScrn->monitor->Modes,
pScrn->display->modes, clockRanges,
NULL, 256, 2048,
pScrn->bitsPerPixel, 128, 768,
pScrn->display->virtualX,
pScrn->display->virtualY,
pScrn->videoRam * 1024,
LOOKUP_BEST_REFRESH);
if (i == -1) {
VoodooFreeRec(pScrn);
return FALSE;
}
/* Prune the modes marked as invalid */
xf86PruneDriverModes(pScrn);
/* If no valid modes, return */
if (i == 0 || pScrn->modes == NULL) {
xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "No valid modes found\n");
VoodooFreeRec(pScrn);
return FALSE;
}
/* Set the current mode to the first in the list */
xf86SetCrtcForModes(pScrn, 0);
pScrn->currentMode = pScrn->modes;
/* Do some checking, we will not support a virtual framebuffer larger than
the visible screen. */
if (pScrn->currentMode->HDisplay != pScrn->virtualX ||
pScrn->currentMode->VDisplay != pScrn->virtualY ||
pScrn->displayWidth != pScrn->virtualX)
{
/* FIXME: In this case we could use shadowfb and clip the drawing into
the physical buffer */
xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
"Virtual size doesn't equal display size. Forcing virtual size to equal display size.\n");
xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
"(Virtual size: %dx%d, Display size: %dx%d)\n", pScrn->virtualX, pScrn->virtualY,
pScrn->currentMode->HDisplay, pScrn->currentMode->VDisplay);
/* I'm not entirely sure this is "legal" but I hope so. */
pScrn->virtualX = pScrn->currentMode->HDisplay;
pScrn->virtualY = pScrn->currentMode->VDisplay;
pScrn->displayWidth = pScrn->virtualX;
}
/* Print the list of modes being used */
xf86PrintModes(pScrn);
/* Set display resolution */
xf86SetDpi(pScrn, 0, 0);
/* Load fb */
if (xf86LoadSubModule(pScrn, "fb") == NULL) {
VoodooFreeRec(pScrn);
return FALSE;
}
if (!xf86LoadSubModule(pScrn, "xaa")) {
xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Falling back to shadowfb\n");
pVoo->Accel = 0;
pVoo->ShadowFB = 1;
}
if(pVoo->ShadowFB)
{
/* Load the shadow framebuffer */
if (!xf86LoadSubModule(pScrn, "shadowfb")) {
VoodooFreeRec(pScrn);
return FALSE;
}
}
return TRUE;
}
/* check chip type and load xvmc driver */
void sna_video_xvmc_setup(struct sna *sna, ScreenPtr screen)
{
XvMCAdaptorRec *adaptors;
struct pci_device *pci;
const char *name;
char bus[64];
int i;
pci = xf86GetPciInfoForEntity(sna->pEnt->index);
if (pci == NULL)
return;
if (!sna->xv.num_adaptors)
return;
if (!xf86LoaderCheckSymbol("XvMCScreenInit"))
return;
/* Needs KMS support. */
if (sna->kgem.gen < 031)
return;
/* Not implemented */
if (sna->kgem.gen >= 060)
return;
adaptors = calloc(sna->xv.num_adaptors, sizeof(XvMCAdaptorRec));
if (adaptors == NULL)
return;
for (i = 0; i< sna->xv.num_adaptors; i++) {
adaptors[i].xv_adaptor = &sna->xv.adaptors[i];
adaptors[i].num_subpictures = 0;
adaptors[i].subpictures = NULL;
adaptors[i].CreateContext = create_context;
adaptors[i].DestroyContext = destroy_context;
adaptors[i].CreateSurface = create_surface;
adaptors[i].DestroySurface = destroy_surface;
adaptors[i].CreateSubpicture = create_subpicture;
adaptors[i].DestroySubpicture = destroy_subpicture;
if (sna->kgem.gen >= 045) {
adaptors[i].num_surfaces = ARRAY_SIZE(surface_info_vld);
adaptors[i].surfaces = surface_info_vld;
} else if (sna->kgem.gen >= 040) {
adaptors[i].num_surfaces = ARRAY_SIZE(surface_info_i965);
adaptors[i].surfaces = surface_info_i965;
} else {
adaptors[i].num_surfaces = ARRAY_SIZE(surface_info_i915);
adaptors[i].surfaces = surface_info_i915;
}
}
if (XvMCScreenInit(screen, i, adaptors) != Success) {
xf86DrvMsg(sna->scrn->scrnIndex, X_INFO,
"[XvMC] Failed to initialize XvMC.\n");
free(adaptors);
return;
}
sprintf(bus, "pci:%04x:%02x:%02x.%d",
pci->domain, pci->bus, pci->dev, pci->func);
xf86XvMCRegisterDRInfo(screen, (char *)SNA_XVMC_LIBNAME, bus,
SNA_XVMC_MAJOR, SNA_XVMC_MINOR,
SNA_XVMC_PATCHLEVEL);
if (sna->kgem.gen >= 045)
name = "xvmc_vld";
else if (sna->kgem.gen >= 040)
name = "i965_xvmc";
else
name = "i915_xvmc";
xf86DrvMsg(sna->scrn->scrnIndex, X_INFO,
"[XvMC] %s driver initialized.\n",
name);
}
static Bool
CIRProbe(DriverPtr drv, int flags)
{
int i;
GDevPtr *devSections;
pciVideoPtr pPci;
int *usedChips;
int numDevSections;
int numUsed;
Bool foundScreen = FALSE;
ScrnInfoPtr (*subProbe)(int entity);
ScrnInfoPtr pScrn;
ModuleDescPtr pMod;
#ifdef CIR_DEBUG
ErrorF("CirProbe\n");
#endif
/*
* For PROBE_DETECT, make sure both sub-modules are loaded before
* calling xf86MatchPciInstances(), because the AvailableOptions()
* functions may be called before xf86MatchPciInstances() returns.
*/
if (flags & PROBE_DETECT) {
if (!lg_loaded) {
if ((pMod = xf86LoadDrvSubModule(drv, "cirrus_laguna"))) {
xf86LoaderModReqSymLists(pMod, lgSymbols, NULL);
lg_loaded = TRUE;
}
}
if (!alp_loaded) {
if ((pMod = xf86LoadDrvSubModule(drv, "cirrus_alpine"))) {
xf86LoaderModReqSymLists(pMod, alpSymbols, NULL);
alp_loaded = TRUE;
}
}
}
if ((numDevSections = xf86MatchDevice(CIR_DRIVER_NAME,
&devSections)) <= 0) {
return FALSE;
}
if (xf86GetPciVideoInfo() == NULL) {
/*
* We won't let anything in the config file override finding no
* PCI video cards at all. This seems reasonable now, but we'll see.
*/
return FALSE;
}
numUsed = xf86MatchPciInstances(CIR_NAME, PCI_VENDOR_CIRRUS,
CIRChipsets, CIRPciChipsets, devSections,
numDevSections, drv, &usedChips);
/* Free it since we don't need that list after this */
xfree(devSections);
if (numUsed <= 0)
return FALSE;
if (flags & PROBE_DETECT)
foundScreen = TRUE;
else for (i = 0; i < numUsed; i++) {
/* The Laguna family of chips is so different from the Alpine
family that we won't share even the highest-level of
functions. But, the Laguna chips /are/ Cirrus chips, so
they should be handled in this driver (as opposed to their
own driver). */
pPci = xf86GetPciInfoForEntity(usedChips[i]);
if (pPci && (pPci->chipType == PCI_CHIP_GD5462 ||
pPci->chipType == PCI_CHIP_GD5464 ||
pPci->chipType == PCI_CHIP_GD5464BD ||
pPci->chipType == PCI_CHIP_GD5465)) {
if (!lg_loaded) {
if (!(pMod = xf86LoadDrvSubModule(drv, "cirrus_laguna")))
continue;
xf86LoaderModReqSymLists(pMod, lgSymbols, NULL);
lg_loaded = TRUE;
}
subProbe = LgProbe;
} else {
if (!alp_loaded) {
if (!(pMod = xf86LoadDrvSubModule(drv, "cirrus_alpine")))
continue;
xf86LoaderModReqSymLists(pMod, alpSymbols, NULL);
alp_loaded = TRUE;
}
subProbe = AlpProbe;
}
pScrn = NULL;
if ((pScrn = subProbe(usedChips[i]))) {
foundScreen = TRUE;
/* Fill in what we can of the ScrnInfoRec */
pScrn->driverVersion = VERSION;
pScrn->driverName = CIR_DRIVER_NAME;
pScrn->name = CIR_NAME;
pScrn->Probe = NULL;
}
}
xfree(usedChips);
return foundScreen;
}
