The hardware for this project is Xilinx ML 605 FPGA.

The code is working on the Compsoc platform

The reason choose this paltform is:

Has all the ingredients of modern systems on chip

• Multiple processors
• Direct memory access (DMA) coprocessors
• Heterogeneous distributed shared memory hierarchy
• Network on chip with heterogeneous communication characteristics – Memory-mapped I/O

The design details can be found on the project report

We also implemented the benchmarking code and document, which is script written by bash and the aim of this benchmarking part is to test the performance of the JPEG decoder.