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Embedded System SImulator Generator

About

The Embedded System SImulator Generator is an design project at Twente University. The goal is to generate a simulator based on a specification.

Project management

See our redmine instance.

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Languages

  • Python 62.9%
  • C 35.5%
  • Java 1.0%
  • JavaScript 0.5%
  • Emacs Lisp 0.1%
  • C++ 0.0%