minimips

A barebones implementation of a 32 bit MIPS Microprocessor in VHDL for simulation on the Digilent Nexsys-3 FPGA board.

Name		Name	Last commit message	Last commit date
Latest commit History 4 Commits
_ngo		_ngo
_xmsgs		_xmsgs
ipcore_dir		ipcore_dir
iseconfig		iseconfig
isim		isim
planAhead_run_1		planAhead_run_1
xlnx_auto_0_xdb		xlnx_auto_0_xdb
xst/work		xst/work
.DS_Store		.DS_Store
ALU.lso		ALU.lso
ALU.prj		ALU.prj
ALU.stx		ALU.stx
ALU.vhd		ALU.vhd
ALU.xst		ALU.xst
ALUControl.lso		ALUControl.lso
ALUControl.prj		ALUControl.prj
ALUControl.stx		ALUControl.stx
ALUControl.vhd		ALUControl.vhd
ALUControl.xst		ALUControl.xst
ClockDivider.vhd		ClockDivider.vhd
ClockDivisorN.vhd		ClockDivisorN.vhd
Control.cmd_log		Control.cmd_log
Control.lso		Control.lso
Control.prj		Control.prj
Control.stx		Control.stx
Control.vhd		Control.vhd
Control.vhi		Control.vhi
Control.xst		Control.xst
Control_BRAM.vhd		Control_BRAM.vhd
Control_stx_beh.prj		Control_stx_beh.prj
Control_summary.html		Control_summary.html
Display7Segments.vhd		Display7Segments.vhd
DisplaysManager.vhd		DisplaysManager.vhd
Instr_Register.lso		Instr_Register.lso
Instr_Register.prj		Instr_Register.prj
Instr_Register.stx		Instr_Register.stx
Instr_Register.vhd		Instr_Register.vhd
Instr_Register.xst		Instr_Register.xst
Lab5.gise		Lab5.gise
Lab5.xise		Lab5.xise
MemDataReg.lso		MemDataReg.lso
MemDataReg.prj		MemDataReg.prj
MemDataReg.stx		MemDataReg.stx
MemDataReg.vhd		MemDataReg.vhd
MemDataReg.xst		MemDataReg.xst
Memory.lso		Memory.lso
Memory.mif		Memory.mif
Memory.prj		Memory.prj
Memory.stx		Memory.stx
Memory.vhd		Memory.vhd
Memory.xst		Memory.xst
MiniMips.bld		MiniMips.bld
MiniMips.cmd_log		MiniMips.cmd_log
MiniMips.lso		MiniMips.lso
MiniMips.ncd		MiniMips.ncd
MiniMips.ngc		MiniMips.ngc
MiniMips.ngd		MiniMips.ngd
MiniMips.ngr		MiniMips.ngr
MiniMips.pad		MiniMips.pad
MiniMips.par		MiniMips.par
MiniMips.pcf		MiniMips.pcf
MiniMips.prj		MiniMips.prj
MiniMips.ptwx		MiniMips.ptwx
MiniMips.stx		MiniMips.stx
MiniMips.syr		MiniMips.syr
MiniMips.twr		MiniMips.twr
MiniMips.twx		MiniMips.twx
MiniMips.ucf		MiniMips.ucf
MiniMips.unroutes		MiniMips.unroutes
MiniMips.ut		MiniMips.ut
MiniMips.vhd		MiniMips.vhd
MiniMips.xpi		MiniMips.xpi
MiniMips.xst		MiniMips.xst
MiniMips_BRAM.bld		MiniMips_BRAM.bld
MiniMips_BRAM.cmd_log		MiniMips_BRAM.cmd_log
MiniMips_BRAM.lso		MiniMips_BRAM.lso
MiniMips_BRAM.ncd		MiniMips_BRAM.ncd
MiniMips_BRAM.ngc		MiniMips_BRAM.ngc
MiniMips_BRAM.ngd		MiniMips_BRAM.ngd
MiniMips_BRAM.ngr		MiniMips_BRAM.ngr
MiniMips_BRAM.pad		MiniMips_BRAM.pad
MiniMips_BRAM.par		MiniMips_BRAM.par
MiniMips_BRAM.pcf		MiniMips_BRAM.pcf
MiniMips_BRAM.prj		MiniMips_BRAM.prj
MiniMips_BRAM.ptwx		MiniMips_BRAM.ptwx
MiniMips_BRAM.stx		MiniMips_BRAM.stx
MiniMips_BRAM.syr		MiniMips_BRAM.syr
MiniMips_BRAM.twr		MiniMips_BRAM.twr
MiniMips_BRAM.twx		MiniMips_BRAM.twx
MiniMips_BRAM.unroutes		MiniMips_BRAM.unroutes
MiniMips_BRAM.vhd		MiniMips_BRAM.vhd
MiniMips_BRAM.xpi		MiniMips_BRAM.xpi
MiniMips_BRAM.xst		MiniMips_BRAM.xst
MiniMips_BRAM_guide.ncd		MiniMips_BRAM_guide.ncd
MiniMips_BRAM_map.map		MiniMips_BRAM_map.map
MiniMips_BRAM_map.mrp		MiniMips_BRAM_map.mrp
MiniMips_BRAM_map.ncd		MiniMips_BRAM_map.ncd
MiniMips_BRAM_map.ngm		MiniMips_BRAM_map.ngm
MiniMips_BRAM_map.xrpt		MiniMips_BRAM_map.xrpt
MiniMips_BRAM_ngdbuild.xrpt		MiniMips_BRAM_ngdbuild.xrpt

markholland/minimips

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