//--------------------------------------------------------------------------------------------------------- // PDMA interrupt handler //--------------------------------------------------------------------------------------------------------- void PDMA_IRQHandler() { #if ((APU_ENABLE) && (APU_PDMA_ENABLE)) if (PDMA_GET_CH_INT_STS(APU_PDMA_CH)&PDMA_CHIF_TXOKIF_Msk) { PDMA_CLR_CH_INT_FLAG(APU_PDMA_CH,PDMA_CHIF_TXOKIF_Msk ); Playback_Process(g_ai16DACSamples); } #endif #if ((ADC_ENABLE) && (ADC_PDMA_ENABLE)) if (PDMA_GET_CH_INT_STS(ADC_PDMA_CH)&PDMA_CHIF_TXOKIF_Msk) { PDMA_CLR_CH_INT_FLAG(ADC_PDMA_CH,PDMA_CHIF_TXOKIF_Msk ); Record_Process(g_ai16ADCSamples); } #endif }
/*---------------------------------------------------------------------------------------------------------*/ void PDMA_IRQHandler(void) { uint32_t status = PDMA_GET_INT_STATUS(); if (status & 0x2) /* CH1 */ { if (PDMA_GET_CH_INT_STS(1) & 0x2) u32IsTestOver = 1; PDMA_CLR_CH_INT_FLAG(1, PDMA_ISR_TD_IS_Msk); } else if (status & 0x4) /* CH2 */ { if (PDMA_GET_CH_INT_STS(2) & 0x2) u32IsTestOver = 2; PDMA_CLR_CH_INT_FLAG(2, PDMA_ISR_TD_IS_Msk); } else printf("unknown interrupt !!\n"); }
void PDMA_IRQHandler(void) { /* Get PDMA Block transfer down interrupt status */ if(PDMA_GET_CH_INT_STS(UART_RX_DMA_CH) & PDMA_ISR_BLKD_IF_Msk) { /* Clear PDMA Block transfer down interrupt flag */ PDMA_CLR_CH_INT_FLAG(UART_RX_DMA_CH, PDMA_ISR_BLKD_IF_Msk); /* Handle PDMA block transfer done interrupt event */ if(g_u32TwoChannelPdmaTest == 1) { PDMA_Callback_0(); } else if(g_u32TwoChannelPdmaTest == 0) { PDMA_Callback_1(); } } }
void PDMA_IRQHandler(void) { uint32_t status = PDMA_GET_INT_STATUS(); if (status & 0x2) /* CH1 */ { if (PDMA_GET_CH_INT_STS(1) & 0x2) g_u32PdmaTDoneInt = 1; PDMA_CLR_CH_INT_FLAG(1, PDMA_ISR_TD_IS_Msk); } else if (status & 0x4) /* CH2 */ { if (PDMA_GET_CH_INT_STS(2) & 0x2) g_u32PdmaTDoneInt = 2; PDMA_CLR_CH_INT_FLAG(2, PDMA_ISR_TD_IS_Msk); } else if (status & 0x8) /* CH3 */ { if (PDMA_GET_CH_INT_STS(3) & 0x2) g_u32PdmaTDoneInt = 3; PDMA_CLR_CH_INT_FLAG(3, PDMA_ISR_TD_IS_Msk); } else if (status & 0x10) /* CH4 */ { if (PDMA_GET_CH_INT_STS(4) & 0x2) g_u32PdmaTDoneInt = 4; PDMA_CLR_CH_INT_FLAG(4, PDMA_ISR_TD_IS_Msk); } else if (status & 0x20) /* CH5 */ { if (PDMA_GET_CH_INT_STS(5) & 0x2) g_u32PdmaTDoneInt = 5; PDMA_CLR_CH_INT_FLAG(5, PDMA_ISR_TD_IS_Msk); } else if (status & 0x40) /* CH6 */ { if (PDMA_GET_CH_INT_STS(6) & 0x2) g_u32PdmaTDoneInt = 6; PDMA_CLR_CH_INT_FLAG(6, PDMA_ISR_TD_IS_Msk); } else printf("unknown interrupt !!\n"); }