static void gen2_emit_invariant(struct intel_batchbuffer *batch) { int i; for (i = 0; i < 4; i++) { OUT_BATCH(_3DSTATE_MAP_CUBE | MAP_UNIT(i)); OUT_BATCH(_3DSTATE_MAP_TEX_STREAM_CMD | MAP_UNIT(i) | DISABLE_TEX_STREAM_BUMP | ENABLE_TEX_STREAM_COORD_SET | TEX_STREAM_COORD_SET(i) | ENABLE_TEX_STREAM_MAP_IDX | TEX_STREAM_MAP_IDX(i)); OUT_BATCH(_3DSTATE_MAP_COORD_TRANSFORM); OUT_BATCH(DISABLE_TEX_TRANSFORM | TEXTURE_SET(i)); } OUT_BATCH(_3DSTATE_MAP_COORD_SETBIND_CMD); OUT_BATCH(TEXBIND_SET3(TEXCOORDSRC_VTXSET_3) | TEXBIND_SET2(TEXCOORDSRC_VTXSET_2) | TEXBIND_SET1(TEXCOORDSRC_VTXSET_1) | TEXBIND_SET0(TEXCOORDSRC_VTXSET_0)); OUT_BATCH(_3DSTATE_SCISSOR_ENABLE_CMD | DISABLE_SCISSOR_RECT); OUT_BATCH(_3DSTATE_VERTEX_TRANSFORM); OUT_BATCH(DISABLE_VIEWPORT_TRANSFORM | DISABLE_PERSPECTIVE_DIVIDE); OUT_BATCH(_3DSTATE_W_STATE_CMD); OUT_BATCH(MAGIC_W_STATE_DWORD1); OUT_BATCH(0x3f800000 /* 1.0 in IEEE float */ ); OUT_BATCH(_3DSTATE_INDPT_ALPHA_BLEND_CMD | DISABLE_INDPT_ALPHA_BLEND | ENABLE_ALPHA_BLENDFUNC | ABLENDFUNC_ADD); OUT_BATCH(_3DSTATE_CONST_BLEND_COLOR_CMD); OUT_BATCH(0); OUT_BATCH(_3DSTATE_MODES_1_CMD | ENABLE_COLR_BLND_FUNC | BLENDFUNC_ADD | ENABLE_SRC_BLND_FACTOR | SRC_BLND_FACT(BLENDFACTOR_ONE) | ENABLE_DST_BLND_FACTOR | DST_BLND_FACT(BLENDFACTOR_ZERO)); OUT_BATCH(_3DSTATE_ENABLES_1_CMD | DISABLE_LOGIC_OP | DISABLE_STENCIL_TEST | DISABLE_DEPTH_BIAS | DISABLE_SPEC_ADD | DISABLE_FOG | DISABLE_ALPHA_TEST | DISABLE_DEPTH_TEST | ENABLE_COLOR_BLEND); OUT_BATCH(_3DSTATE_ENABLES_2_CMD | DISABLE_STENCIL_WRITE | DISABLE_DITHER | DISABLE_DEPTH_WRITE | ENABLE_COLOR_MASK | ENABLE_COLOR_WRITE | ENABLE_TEX_CACHE); }
static void i915UpdateBlendState(struct gl_context * ctx) { struct i915_context *i915 = I915_CONTEXT(ctx); GLuint iab = (i915->state.Blend[I915_BLENDREG_IAB] & ~(IAB_SRC_FACTOR_MASK | IAB_DST_FACTOR_MASK | (BLENDFUNC_MASK << IAB_FUNC_SHIFT) | IAB_ENABLE)); GLuint lis6 = (i915->state.Ctx[I915_CTXREG_LIS6] & ~(S6_CBUF_SRC_BLEND_FACT_MASK | S6_CBUF_DST_BLEND_FACT_MASK | S6_CBUF_BLEND_FUNC_MASK)); GLuint eqRGB = ctx->Color.Blend[0].EquationRGB; GLuint eqA = ctx->Color.Blend[0].EquationA; GLuint srcRGB = ctx->Color.Blend[0].SrcRGB; GLuint dstRGB = ctx->Color.Blend[0].DstRGB; GLuint srcA = ctx->Color.Blend[0].SrcA; GLuint dstA = ctx->Color.Blend[0].DstA; if (eqRGB == GL_MIN || eqRGB == GL_MAX) { srcRGB = dstRGB = GL_ONE; } if (eqA == GL_MIN || eqA == GL_MAX) { srcA = dstA = GL_ONE; } lis6 |= SRC_BLND_FACT(intel_translate_blend_factor(srcRGB)); lis6 |= DST_BLND_FACT(intel_translate_blend_factor(dstRGB)); lis6 |= translate_blend_equation(eqRGB) << S6_CBUF_BLEND_FUNC_SHIFT; iab |= SRC_ABLND_FACT(intel_translate_blend_factor(srcA)); iab |= DST_ABLND_FACT(intel_translate_blend_factor(dstA)); iab |= translate_blend_equation(eqA) << IAB_FUNC_SHIFT; if (srcA != srcRGB || dstA != dstRGB || eqA != eqRGB) iab |= IAB_ENABLE; if (iab != i915->state.Blend[I915_BLENDREG_IAB]) { i915->state.Blend[I915_BLENDREG_IAB] = iab; I915_STATECHANGE(i915, I915_UPLOAD_BLEND); } if (lis6 != i915->state.Ctx[I915_CTXREG_LIS6]) { i915->state.Ctx[I915_CTXREG_LIS6] = lis6; I915_STATECHANGE(i915, I915_UPLOAD_CTX); } /* This will catch a logicop blend equation */ i915EvalLogicOpBlendState(ctx); }
static void emit_immediate_s6(struct i915_context *i915, uint imm) { /* Fixup blend function for A8 dst buffers. * When we blend to an A8 buffer, the GPU thinks it's a G8 buffer, * and therefore we need to use the color factor for alphas. */ uint srcRGB; if (i915->current.target_fixup_format == PIPE_FORMAT_A8_UNORM) { srcRGB = (imm >> S6_CBUF_SRC_BLEND_FACT_SHIFT) & BLENDFACT_MASK; if (srcRGB == BLENDFACT_DST_ALPHA) srcRGB = BLENDFACT_DST_COLR; else if (srcRGB == BLENDFACT_INV_DST_ALPHA) srcRGB = BLENDFACT_INV_DST_COLR; imm &= ~SRC_BLND_FACT(BLENDFACT_MASK); imm |= SRC_BLND_FACT(srcRGB); }
/* None of this state is actually used for anything yet. */ static void * i915_create_blend_state(struct pipe_context *pipe, const struct pipe_blend_state *blend) { struct i915_blend_state *cso_data = CALLOC_STRUCT( i915_blend_state ); { unsigned eqRGB = blend->rt[0].rgb_func; unsigned srcRGB = blend->rt[0].rgb_src_factor; unsigned dstRGB = blend->rt[0].rgb_dst_factor; unsigned eqA = blend->rt[0].alpha_func; unsigned srcA = blend->rt[0].alpha_src_factor; unsigned dstA = blend->rt[0].alpha_dst_factor; /* Special handling for MIN/MAX filter modes handled at * state_tracker level. */ if (srcA != srcRGB || dstA != dstRGB || eqA != eqRGB) { cso_data->iab = (_3DSTATE_INDEPENDENT_ALPHA_BLEND_CMD | IAB_MODIFY_ENABLE | IAB_ENABLE | IAB_MODIFY_FUNC | IAB_MODIFY_SRC_FACTOR | IAB_MODIFY_DST_FACTOR | SRC_ABLND_FACT(i915_translate_blend_factor(srcA)) | DST_ABLND_FACT(i915_translate_blend_factor(dstA)) | (i915_translate_blend_func(eqA) << IAB_FUNC_SHIFT)); } else { cso_data->iab = (_3DSTATE_INDEPENDENT_ALPHA_BLEND_CMD | IAB_MODIFY_ENABLE | 0); } } cso_data->modes4 |= (_3DSTATE_MODES_4_CMD | ENABLE_LOGIC_OP_FUNC | LOGIC_OP_FUNC(i915_translate_logic_op(blend->logicop_func))); if (blend->logicop_enable) cso_data->LIS5 |= S5_LOGICOP_ENABLE; if (blend->dither) cso_data->LIS5 |= S5_COLOR_DITHER_ENABLE; /* XXX here take the target fixup into account */ if ((blend->rt[0].colormask & PIPE_MASK_R) == 0) cso_data->LIS5 |= S5_WRITEDISABLE_RED; if ((blend->rt[0].colormask & PIPE_MASK_G) == 0) cso_data->LIS5 |= S5_WRITEDISABLE_GREEN; if ((blend->rt[0].colormask & PIPE_MASK_B) == 0) cso_data->LIS5 |= S5_WRITEDISABLE_BLUE; if ((blend->rt[0].colormask & PIPE_MASK_A) == 0) cso_data->LIS5 |= S5_WRITEDISABLE_ALPHA; if (blend->rt[0].blend_enable) { unsigned funcRGB = blend->rt[0].rgb_func; unsigned srcRGB = blend->rt[0].rgb_src_factor; unsigned dstRGB = blend->rt[0].rgb_dst_factor; cso_data->LIS6 |= (S6_CBUF_BLEND_ENABLE | SRC_BLND_FACT(i915_translate_blend_factor(srcRGB)) | DST_BLND_FACT(i915_translate_blend_factor(dstRGB)) | (i915_translate_blend_func(funcRGB) << S6_CBUF_BLEND_FUNC_SHIFT)); } return cso_data; }
static void i830_init_packets(struct i830_context *i830) { /* Zero all state */ memset(&i830->state, 0, sizeof(i830->state)); /* Set default blend state */ i830->state.TexBlend[0][0] = (_3DSTATE_MAP_BLEND_OP_CMD(0) | TEXPIPE_COLOR | ENABLE_TEXOUTPUT_WRT_SEL | TEXOP_OUTPUT_CURRENT | DISABLE_TEX_CNTRL_STAGE | TEXOP_SCALE_1X | TEXOP_MODIFY_PARMS | TEXOP_LAST_STAGE | TEXBLENDOP_ARG1); i830->state.TexBlend[0][1] = (_3DSTATE_MAP_BLEND_OP_CMD(0) | TEXPIPE_ALPHA | ENABLE_TEXOUTPUT_WRT_SEL | TEXOP_OUTPUT_CURRENT | TEXOP_SCALE_1X | TEXOP_MODIFY_PARMS | TEXBLENDOP_ARG1); i830->state.TexBlend[0][2] = (_3DSTATE_MAP_BLEND_ARG_CMD(0) | TEXPIPE_COLOR | TEXBLEND_ARG1 | TEXBLENDARG_MODIFY_PARMS | TEXBLENDARG_DIFFUSE); i830->state.TexBlend[0][3] = (_3DSTATE_MAP_BLEND_ARG_CMD(0) | TEXPIPE_ALPHA | TEXBLEND_ARG1 | TEXBLENDARG_MODIFY_PARMS | TEXBLENDARG_DIFFUSE); i830->state.TexBlendWordsUsed[0] = 4; i830->state.Ctx[I830_CTXREG_VF] = 0; i830->state.Ctx[I830_CTXREG_VF2] = 0; i830->state.Ctx[I830_CTXREG_AA] = (_3DSTATE_AA_CMD | AA_LINE_ECAAR_WIDTH_ENABLE | AA_LINE_ECAAR_WIDTH_1_0 | AA_LINE_REGION_WIDTH_ENABLE | AA_LINE_REGION_WIDTH_1_0 | AA_LINE_DISABLE); i830->state.Ctx[I830_CTXREG_ENABLES_1] = (_3DSTATE_ENABLES_1_CMD | DISABLE_LOGIC_OP | DISABLE_STENCIL_TEST | DISABLE_DEPTH_BIAS | DISABLE_SPEC_ADD | DISABLE_FOG | DISABLE_ALPHA_TEST | DISABLE_COLOR_BLEND | DISABLE_DEPTH_TEST); #if 000 /* XXX all the stencil enable state is set in i830Enable(), right? */ if (i830->intel.hw_stencil) { i830->state.Ctx[I830_CTXREG_ENABLES_2] = (_3DSTATE_ENABLES_2_CMD | ENABLE_STENCIL_WRITE | ENABLE_TEX_CACHE | ENABLE_DITHER | ENABLE_COLOR_MASK | /* set no color comps disabled */ ENABLE_COLOR_WRITE | ENABLE_DEPTH_WRITE); } else #endif { i830->state.Ctx[I830_CTXREG_ENABLES_2] = (_3DSTATE_ENABLES_2_CMD | DISABLE_STENCIL_WRITE | ENABLE_TEX_CACHE | ENABLE_DITHER | ENABLE_COLOR_MASK | /* set no color comps disabled */ ENABLE_COLOR_WRITE | ENABLE_DEPTH_WRITE); } i830->state.Ctx[I830_CTXREG_STATE1] = (_3DSTATE_MODES_1_CMD | ENABLE_COLR_BLND_FUNC | BLENDFUNC_ADD | ENABLE_SRC_BLND_FACTOR | SRC_BLND_FACT(BLENDFACT_ONE) | ENABLE_DST_BLND_FACTOR | DST_BLND_FACT(BLENDFACT_ZERO)); i830->state.Ctx[I830_CTXREG_STATE2] = (_3DSTATE_MODES_2_CMD | ENABLE_GLOBAL_DEPTH_BIAS | GLOBAL_DEPTH_BIAS(0) | ENABLE_ALPHA_TEST_FUNC | ALPHA_TEST_FUNC(COMPAREFUNC_ALWAYS) | ALPHA_REF_VALUE(0)); i830->state.Ctx[I830_CTXREG_STATE3] = (_3DSTATE_MODES_3_CMD | ENABLE_DEPTH_TEST_FUNC | DEPTH_TEST_FUNC(COMPAREFUNC_LESS) | ENABLE_ALPHA_SHADE_MODE | ALPHA_SHADE_MODE(SHADE_MODE_LINEAR) | ENABLE_FOG_SHADE_MODE | FOG_SHADE_MODE(SHADE_MODE_LINEAR) | ENABLE_SPEC_SHADE_MODE | SPEC_SHADE_MODE(SHADE_MODE_LINEAR) | ENABLE_COLOR_SHADE_MODE | COLOR_SHADE_MODE(SHADE_MODE_LINEAR) | ENABLE_CULL_MODE | CULLMODE_NONE); i830->state.Ctx[I830_CTXREG_STATE4] = (_3DSTATE_MODES_4_CMD | ENABLE_LOGIC_OP_FUNC | LOGIC_OP_FUNC(LOGICOP_COPY) | ENABLE_STENCIL_TEST_MASK | STENCIL_TEST_MASK(0xff) | ENABLE_STENCIL_WRITE_MASK | STENCIL_WRITE_MASK(0xff)); i830->state.Ctx[I830_CTXREG_STENCILTST] = (_3DSTATE_STENCIL_TEST_CMD | ENABLE_STENCIL_PARMS | STENCIL_FAIL_OP(STENCILOP_KEEP) | STENCIL_PASS_DEPTH_FAIL_OP (STENCILOP_KEEP) | STENCIL_PASS_DEPTH_PASS_OP (STENCILOP_KEEP) | ENABLE_STENCIL_TEST_FUNC | STENCIL_TEST_FUNC (COMPAREFUNC_ALWAYS) | ENABLE_STENCIL_REF_VALUE | STENCIL_REF_VALUE(0)); i830->state.Ctx[I830_CTXREG_STATE5] = (_3DSTATE_MODES_5_CMD | FLUSH_TEXTURE_CACHE | ENABLE_SPRITE_POINT_TEX | SPRITE_POINT_TEX_OFF | ENABLE_FIXED_LINE_WIDTH | FIXED_LINE_WIDTH(0x2) | /* 1.0 */ ENABLE_FIXED_POINT_WIDTH | FIXED_POINT_WIDTH(1)); i830->state.Ctx[I830_CTXREG_IALPHAB] = (_3DSTATE_INDPT_ALPHA_BLEND_CMD | DISABLE_INDPT_ALPHA_BLEND | ENABLE_ALPHA_BLENDFUNC | ABLENDFUNC_ADD); i830->state.Ctx[I830_CTXREG_FOGCOLOR] = (_3DSTATE_FOG_COLOR_CMD | FOG_COLOR_RED(0) | FOG_COLOR_GREEN(0) | FOG_COLOR_BLUE(0)); i830->state.Ctx[I830_CTXREG_BLENDCOLOR0] = _3DSTATE_CONST_BLEND_COLOR_CMD; i830->state.Ctx[I830_CTXREG_BLENDCOLOR1] = 0; i830->state.Ctx[I830_CTXREG_MCSB0] = _3DSTATE_MAP_COORD_SETBIND_CMD; i830->state.Ctx[I830_CTXREG_MCSB1] = (TEXBIND_SET3(TEXCOORDSRC_VTXSET_3) | TEXBIND_SET2(TEXCOORDSRC_VTXSET_2) | TEXBIND_SET1(TEXCOORDSRC_VTXSET_1) | TEXBIND_SET0(TEXCOORDSRC_VTXSET_0)); i830->state.RasterRules[I830_RASTER_RULES] = (_3DSTATE_RASTER_RULES_CMD | ENABLE_POINT_RASTER_RULE | OGL_POINT_RASTER_RULE | ENABLE_LINE_STRIP_PROVOKE_VRTX | ENABLE_TRI_FAN_PROVOKE_VRTX | ENABLE_TRI_STRIP_PROVOKE_VRTX | LINE_STRIP_PROVOKE_VRTX(1) | TRI_FAN_PROVOKE_VRTX(2) | TRI_STRIP_PROVOKE_VRTX(2)); i830->state.Stipple[I830_STPREG_ST0] = _3DSTATE_STIPPLE; i830->state.Buffer[I830_DESTREG_DV0] = _3DSTATE_DST_BUF_VARS_CMD; i830->state.Buffer[I830_DESTREG_SENABLE] = (_3DSTATE_SCISSOR_ENABLE_CMD | DISABLE_SCISSOR_RECT); i830->state.Buffer[I830_DESTREG_SR0] = _3DSTATE_SCISSOR_RECT_0_CMD; i830->state.Buffer[I830_DESTREG_SR1] = 0; i830->state.Buffer[I830_DESTREG_SR2] = 0; }
/** * Sets both the blend equation (called "function" in i830 docs) and the * blend function (called "factor" in i830 docs). This is done in a single * function because some blend equations (i.e., \c GL_MIN and \c GL_MAX) * change the interpretation of the blend function. */ static void i830_set_blend_state(struct gl_context * ctx) { struct i830_context *i830 = i830_context(ctx); int funcA; int funcRGB; int eqnA; int eqnRGB; int iab; int s1; funcRGB = SRC_BLND_FACT(intel_translate_blend_factor(ctx->Color.Blend[0].SrcRGB)) | DST_BLND_FACT(intel_translate_blend_factor(ctx->Color.Blend[0].DstRGB)); switch (ctx->Color.Blend[0].EquationRGB) { case GL_FUNC_ADD: eqnRGB = BLENDFUNC_ADD; break; case GL_MIN: eqnRGB = BLENDFUNC_MIN; funcRGB = SRC_BLND_FACT(BLENDFACT_ONE) | DST_BLND_FACT(BLENDFACT_ONE); break; case GL_MAX: eqnRGB = BLENDFUNC_MAX; funcRGB = SRC_BLND_FACT(BLENDFACT_ONE) | DST_BLND_FACT(BLENDFACT_ONE); break; case GL_FUNC_SUBTRACT: eqnRGB = BLENDFUNC_SUB; break; case GL_FUNC_REVERSE_SUBTRACT: eqnRGB = BLENDFUNC_RVRSE_SUB; break; default: fprintf(stderr, "[%s:%u] Invalid RGB blend equation (0x%04x).\n", __FUNCTION__, __LINE__, ctx->Color.Blend[0].EquationRGB); return; } funcA = SRC_ABLEND_FACT(intel_translate_blend_factor(ctx->Color.Blend[0].SrcA)) | DST_ABLEND_FACT(intel_translate_blend_factor(ctx->Color.Blend[0].DstA)); switch (ctx->Color.Blend[0].EquationA) { case GL_FUNC_ADD: eqnA = BLENDFUNC_ADD; break; case GL_MIN: eqnA = BLENDFUNC_MIN; funcA = SRC_BLND_FACT(BLENDFACT_ONE) | DST_BLND_FACT(BLENDFACT_ONE); break; case GL_MAX: eqnA = BLENDFUNC_MAX; funcA = SRC_BLND_FACT(BLENDFACT_ONE) | DST_BLND_FACT(BLENDFACT_ONE); break; case GL_FUNC_SUBTRACT: eqnA = BLENDFUNC_SUB; break; case GL_FUNC_REVERSE_SUBTRACT: eqnA = BLENDFUNC_RVRSE_SUB; break; default: fprintf(stderr, "[%s:%u] Invalid alpha blend equation (0x%04x).\n", __FUNCTION__, __LINE__, ctx->Color.Blend[0].EquationA); return; } iab = eqnA | funcA | _3DSTATE_INDPT_ALPHA_BLEND_CMD | ENABLE_SRC_ABLEND_FACTOR | ENABLE_DST_ABLEND_FACTOR | ENABLE_ALPHA_BLENDFUNC; s1 = eqnRGB | funcRGB | _3DSTATE_MODES_1_CMD | ENABLE_SRC_BLND_FACTOR | ENABLE_DST_BLND_FACTOR | ENABLE_COLR_BLND_FUNC; if ((eqnA | funcA) != (eqnRGB | funcRGB)) iab |= ENABLE_INDPT_ALPHA_BLEND; else iab |= DISABLE_INDPT_ALPHA_BLEND; if (iab != i830->state.Ctx[I830_CTXREG_IALPHAB] || s1 != i830->state.Ctx[I830_CTXREG_STATE1]) { I830_STATECHANGE(i830, I830_UPLOAD_CTX); i830->state.Ctx[I830_CTXREG_IALPHAB] = iab; i830->state.Ctx[I830_CTXREG_STATE1] = s1; } /* This will catch a logicop blend equation. It will also ensure * independant alpha blend is really in the correct state (either enabled * or disabled) if blending is already enabled. */ i830EvalLogicOpBlendState(ctx); if (0) { fprintf(stderr, "[%s:%u] STATE1: 0x%08x IALPHAB: 0x%08x blend is %sabled\n", __FUNCTION__, __LINE__, i830->state.Ctx[I830_CTXREG_STATE1], i830->state.Ctx[I830_CTXREG_IALPHAB], (ctx->Color.BlendEnabled) ? "en" : "dis"); } }
static void i830_init_packets( i830ContextPtr i830 ) { intelScreenPrivate *screen = i830->intel.intelScreen; /* Zero all state */ memset(&i830->state, 0, sizeof(i830->state)); /* Set default blend state */ i830->state.TexBlend[0][0] = (_3DSTATE_MAP_BLEND_OP_CMD(0) | TEXPIPE_COLOR | ENABLE_TEXOUTPUT_WRT_SEL | TEXOP_OUTPUT_CURRENT | DISABLE_TEX_CNTRL_STAGE | TEXOP_SCALE_1X | TEXOP_MODIFY_PARMS | TEXOP_LAST_STAGE | TEXBLENDOP_ARG1); i830->state.TexBlend[0][1] = (_3DSTATE_MAP_BLEND_OP_CMD(0) | TEXPIPE_ALPHA | ENABLE_TEXOUTPUT_WRT_SEL | TEXOP_OUTPUT_CURRENT | TEXOP_SCALE_1X | TEXOP_MODIFY_PARMS | TEXBLENDOP_ARG1); i830->state.TexBlend[0][2] = (_3DSTATE_MAP_BLEND_ARG_CMD(0) | TEXPIPE_COLOR | TEXBLEND_ARG1 | TEXBLENDARG_MODIFY_PARMS | TEXBLENDARG_DIFFUSE); i830->state.TexBlend[0][3] = (_3DSTATE_MAP_BLEND_ARG_CMD(0) | TEXPIPE_ALPHA | TEXBLEND_ARG1 | TEXBLENDARG_MODIFY_PARMS | TEXBLENDARG_DIFFUSE); i830->state.TexBlendWordsUsed[0] = 4; i830->state.Ctx[I830_CTXREG_VF] = 0; i830->state.Ctx[I830_CTXREG_VF2] = 0; i830->state.Ctx[I830_CTXREG_AA] = (_3DSTATE_AA_CMD | AA_LINE_ECAAR_WIDTH_ENABLE | AA_LINE_ECAAR_WIDTH_1_0 | AA_LINE_REGION_WIDTH_ENABLE | AA_LINE_REGION_WIDTH_1_0 | AA_LINE_DISABLE); i830->state.Ctx[I830_CTXREG_ENABLES_1] = (_3DSTATE_ENABLES_1_CMD | DISABLE_LOGIC_OP | DISABLE_STENCIL_TEST | DISABLE_DEPTH_BIAS | DISABLE_SPEC_ADD | DISABLE_FOG | DISABLE_ALPHA_TEST | DISABLE_COLOR_BLEND | DISABLE_DEPTH_TEST); if (i830->intel.hw_stencil) { i830->state.Ctx[I830_CTXREG_ENABLES_2] = (_3DSTATE_ENABLES_2_CMD | ENABLE_STENCIL_WRITE | ENABLE_TEX_CACHE | ENABLE_DITHER | ENABLE_COLOR_MASK | /* set no color comps disabled */ ENABLE_COLOR_WRITE | ENABLE_DEPTH_WRITE); } else { i830->state.Ctx[I830_CTXREG_ENABLES_2] = (_3DSTATE_ENABLES_2_CMD | DISABLE_STENCIL_WRITE | ENABLE_TEX_CACHE | ENABLE_DITHER | ENABLE_COLOR_MASK | /* set no color comps disabled */ ENABLE_COLOR_WRITE | ENABLE_DEPTH_WRITE); } i830->state.Ctx[I830_CTXREG_STATE1] = (_3DSTATE_MODES_1_CMD | ENABLE_COLR_BLND_FUNC | BLENDFUNC_ADD | ENABLE_SRC_BLND_FACTOR | SRC_BLND_FACT(BLENDFACT_ONE) | ENABLE_DST_BLND_FACTOR | DST_BLND_FACT(BLENDFACT_ZERO) ); i830->state.Ctx[I830_CTXREG_STATE2] = (_3DSTATE_MODES_2_CMD | ENABLE_GLOBAL_DEPTH_BIAS | GLOBAL_DEPTH_BIAS(0) | ENABLE_ALPHA_TEST_FUNC | ALPHA_TEST_FUNC(COMPAREFUNC_ALWAYS) | ALPHA_REF_VALUE(0) ); i830->state.Ctx[I830_CTXREG_STATE3] = (_3DSTATE_MODES_3_CMD | ENABLE_DEPTH_TEST_FUNC | DEPTH_TEST_FUNC(COMPAREFUNC_LESS) | ENABLE_ALPHA_SHADE_MODE | ALPHA_SHADE_MODE(SHADE_MODE_LINEAR) | ENABLE_FOG_SHADE_MODE | FOG_SHADE_MODE(SHADE_MODE_LINEAR) | ENABLE_SPEC_SHADE_MODE | SPEC_SHADE_MODE(SHADE_MODE_LINEAR) | ENABLE_COLOR_SHADE_MODE | COLOR_SHADE_MODE(SHADE_MODE_LINEAR) | ENABLE_CULL_MODE | CULLMODE_NONE); i830->state.Ctx[I830_CTXREG_STATE4] = (_3DSTATE_MODES_4_CMD | ENABLE_LOGIC_OP_FUNC | LOGIC_OP_FUNC(LOGICOP_COPY) | ENABLE_STENCIL_TEST_MASK | STENCIL_TEST_MASK(0xff) | ENABLE_STENCIL_WRITE_MASK | STENCIL_WRITE_MASK(0xff)); i830->state.Ctx[I830_CTXREG_STENCILTST] = (_3DSTATE_STENCIL_TEST_CMD | ENABLE_STENCIL_PARMS | STENCIL_FAIL_OP(STENCILOP_KEEP) | STENCIL_PASS_DEPTH_FAIL_OP(STENCILOP_KEEP) | STENCIL_PASS_DEPTH_PASS_OP(STENCILOP_KEEP) | ENABLE_STENCIL_TEST_FUNC | STENCIL_TEST_FUNC(COMPAREFUNC_ALWAYS) | ENABLE_STENCIL_REF_VALUE | STENCIL_REF_VALUE(0) ); i830->state.Ctx[I830_CTXREG_STATE5] = (_3DSTATE_MODES_5_CMD | FLUSH_TEXTURE_CACHE | ENABLE_SPRITE_POINT_TEX | SPRITE_POINT_TEX_OFF | ENABLE_FIXED_LINE_WIDTH | FIXED_LINE_WIDTH(0x2) | /* 1.0 */ ENABLE_FIXED_POINT_WIDTH | FIXED_POINT_WIDTH(1) ); i830->state.Ctx[I830_CTXREG_IALPHAB] = (_3DSTATE_INDPT_ALPHA_BLEND_CMD | DISABLE_INDPT_ALPHA_BLEND | ENABLE_ALPHA_BLENDFUNC | ABLENDFUNC_ADD); i830->state.Ctx[I830_CTXREG_FOGCOLOR] = (_3DSTATE_FOG_COLOR_CMD | FOG_COLOR_RED(0) | FOG_COLOR_GREEN(0) | FOG_COLOR_BLUE(0)); i830->state.Ctx[I830_CTXREG_BLENDCOLOR0] = _3DSTATE_CONST_BLEND_COLOR_CMD; i830->state.Ctx[I830_CTXREG_BLENDCOLOR1] = 0; i830->state.Ctx[I830_CTXREG_MCSB0] = _3DSTATE_MAP_COORD_SETBIND_CMD; i830->state.Ctx[I830_CTXREG_MCSB1] = (TEXBIND_SET3(TEXCOORDSRC_VTXSET_3) | TEXBIND_SET2(TEXCOORDSRC_VTXSET_2) | TEXBIND_SET1(TEXCOORDSRC_VTXSET_1) | TEXBIND_SET0(TEXCOORDSRC_VTXSET_0)); i830->state.Stipple[I830_STPREG_ST0] = _3DSTATE_STIPPLE; i830->state.Buffer[I830_DESTREG_CBUFADDR0] = _3DSTATE_BUF_INFO_CMD; i830->state.Buffer[I830_DESTREG_CBUFADDR1] = (BUF_3D_ID_COLOR_BACK | BUF_3D_PITCH(screen->front.pitch) | /* pitch in bytes */ BUF_3D_USE_FENCE); i830->state.Buffer[I830_DESTREG_DBUFADDR0] = _3DSTATE_BUF_INFO_CMD; i830->state.Buffer[I830_DESTREG_DBUFADDR1] = (BUF_3D_ID_DEPTH | BUF_3D_PITCH(screen->depth.pitch) | /* pitch in bytes */ BUF_3D_USE_FENCE); i830->state.Buffer[I830_DESTREG_DBUFADDR2] = screen->depth.offset; i830->state.Buffer[I830_DESTREG_DV0] = _3DSTATE_DST_BUF_VARS_CMD; switch (screen->fbFormat) { case DV_PF_555: case DV_PF_565: i830->state.Buffer[I830_DESTREG_DV1] = (DSTORG_HORT_BIAS(0x8) | /* .5 */ DSTORG_VERT_BIAS(0x8) | /* .5 */ screen->fbFormat | DEPTH_IS_Z | DEPTH_FRMT_16_FIXED); break; case DV_PF_8888: i830->state.Buffer[I830_DESTREG_DV1] = (DSTORG_HORT_BIAS(0x8) | /* .5 */ DSTORG_VERT_BIAS(0x8) | /* .5 */ screen->fbFormat | DEPTH_IS_Z | DEPTH_FRMT_24_FIXED_8_OTHER); break; } i830->state.Buffer[I830_DESTREG_SENABLE] = (_3DSTATE_SCISSOR_ENABLE_CMD | DISABLE_SCISSOR_RECT); i830->state.Buffer[I830_DESTREG_SR0] = _3DSTATE_SCISSOR_RECT_0_CMD; i830->state.Buffer[I830_DESTREG_SR1] = 0; i830->state.Buffer[I830_DESTREG_SR2] = 0; }