RBAPI(unsigned) i2cmaster_ReadLast(int dev) { unsigned val; switch (I2C_action[dev]) { case I2CACT_MASTERREAD: if (I2C_swMode[dev] == I2CSW_DISABLE) { if (I2C_rsInfo[dev].restart == true) { i2cmaster_WriteAddrREG(dev, I2C_rsInfo[dev].addr, I2C_rsInfo[dev].rwbit); delay_us(150L); //Remarks: must delay here due to DX's I2C H/W bug } else i2cmaster_SetStopBit(dev); } break; case I2CACT_MASTERHASREAD: err_SetMsg(ERROR_I2CWRONGUSAGE, "set Second-Last-Read before calling %s()", __FUNCTION__); return 0xffff; case I2CACT_MASTERLASTREAD: I2C_action[dev] = I2CACT_MASTERHASREAD; // for calling i2cmaster_Read1() again to get the last byte break; } val = (I2C_swMode[dev] != I2CSW_DISABLE)? i2csw_Read(dev, true) : i2cmaster_Read1(dev, false); I2C_action[dev] = I2CACT_IDLE; if (val == 0xffff) return 0xffff; if (I2C_rsInfo[dev].restart == true) { I2C_rsInfo[dev].restart = false; if (I2C_swMode[dev] != I2CSW_DISABLE) { if (i2csw_Start(dev, I2C_rsInfo[dev].addr, I2C_rsInfo[dev].rwbit, true) == false) return 0xffff; } else { if (check_TX_done(dev) == false) return 0xffff; } I2C_action[dev] = (I2C_rsInfo[dev].rwbit == I2C_WRITE)? I2CACT_MASTERWRITE : I2CACT_MASTERREAD; I2C_count[dev] = I2C_rsInfo[dev].count; } else { if (I2C_swMode[dev] != I2CSW_DISABLE) i2csw_Stop(dev); else { if (check_STOP_done(dev) == false) return 0xffff; } }//end if I2C_restart... return val; }
_RB_INLINE bool i2cmaster_Start1(int dev, unsigned char addr, unsigned char rwbit) { if (i2c_IsMaster(dev) == false) { err_SetMsg(ERROR_I2CWRONGUSAGE, "can't start a transaction in Slave state"); return false; } i2cmaster_WriteAddrREG(dev, addr, rwbit); //Remarks: if I2C master sends "Start" twice sequently, ARLoss will occur according to H/W design return check_TX_done(dev); }
RBAPI(bool) i2cmaster_Write(int dev, unsigned char val) { if (I2C_action[dev] != I2CACT_MASTERWRITE) { err_SetMsg(ERROR_I2CWRONGUSAGE, "must start a correct transaction before writing data"); return false; } i2c_WriteDataREG(dev, val); if (check_TX_done(dev) == true) return true; I2C_action[dev] = I2CACT_IDLE; return false; }
_RB_INLINE bool i2cmaster_Start1(int dev, unsigned char addr, unsigned char rwbit) { if (i2c_IsMaster(dev) == false) { err_SetMsg(ERROR_I2CWRONGUSAGE, "can't start a transaction in Slave state"); return false; } i2cmaster_WriteAddrREG(dev, addr, rwbit); //Remarks: if I2C master sends "Start" twice sequently, ARLoss will occur according to H/W design if (check_TX_done(dev) == false) return false; I2C_action[dev] = (rwbit == I2C_WRITE)? I2CACT_MASTERWRITE : I2CACT_MASTERREAD; I2C_curAddr = addr; return true; }
RBAPI(bool) i2cmaster_Write(int dev, unsigned char val) { bool result; if (I2C_action[dev] != I2CACT_MASTERWRITE) { err_SetMsg(ERROR_I2CWRONGUSAGE, "must start a correct transaction before writing data"); return false; } if (I2C_swMode[dev] != I2CSW_DISABLE) result = i2csw_Write(dev, val); else { i2c_WriteDataREG(dev, val); result = check_TX_done(dev); } if (result == false) I2C_action[dev] = I2CACT_IDLE; return result; }
RBAPI(unsigned) i2cmaster_ReadLast(int dev) { unsigned val; switch (I2C_action[dev]) { case I2CACT_MASTERREAD: if (I2C_rsInfo[dev].restart == true) { i2cmaster_WriteAddrREG(dev, I2C_rsInfo[dev].addr, I2C_rsInfo[dev].rwbit); delay_ms(1); //Remarks: must delay here due to DX's I2C H/W bug } else i2cmaster_SetStopBit(dev); break; case I2CACT_MASTERHASREAD: err_SetMsg(ERROR_I2CWRONGUSAGE, "set Second-Last-Read before calling %s()", __FUNCTION__); return 0xffff; case I2CACT_MASTERLASTREAD: I2C_action[dev] = I2CACT_MASTERHASREAD; break; } if ((val = i2cmaster_Read1(dev, false)) == 0xffff) return 0xffff; else I2C_action[dev] = I2CACT_IDLE; if (I2C_rsInfo[dev].restart == true) { I2C_rsInfo[dev].restart = false; if (check_TX_done(dev) == false) return 0xffff; I2C_count = I2C_rsInfo[dev].count; I2C_action[dev] = (I2C_rsInfo[dev].rwbit == I2C_WRITE)? I2CACT_MASTERWRITE : I2CACT_MASTERREAD; } else { if (check_STOP_done(dev) == false) return 0xffff; }//end if I2C_restart... return val; }