void kvmppc_mmu_pte_flush(struct kvm_vcpu *vcpu, ulong guest_ea, ulong ea_mask) { u64 i; dprintk_mmu("KVM: Flushing %d Shadow PTEs: 0x%lx & 0x%lx\n", vcpu->arch.hpte_cache_count, guest_ea, ea_mask); guest_ea &= ea_mask; switch (ea_mask) { case ~0xfffUL: kvmppc_mmu_pte_flush_page(vcpu, guest_ea); break; case 0x0ffff000: /* 32-bit flush w/o segment, go through all possible segments */ for (i = 0; i < 0x100000000ULL; i += 0x10000000ULL) kvmppc_mmu_pte_flush(vcpu, guest_ea | i, ~0xfffUL); break; case 0: /* Doing a complete flush -> start from scratch */ kvmppc_mmu_pte_flush_all(vcpu); break; default: WARN_ON(1); break; } }
void kvmppc_mmu_pte_flush(struct kvm_vcpu *vcpu, ulong guest_ea, ulong ea_mask) { trace_kvm_book3s_mmu_flush("", vcpu, guest_ea, ea_mask); guest_ea &= ea_mask; switch (ea_mask) { case ~0xfffUL: kvmppc_mmu_pte_flush_page(vcpu, guest_ea); break; case 0x0ffff000: kvmppc_mmu_pte_flush_long(vcpu, guest_ea); break; case 0: /* Doing a complete flush -> start from scratch */ kvmppc_mmu_pte_flush_all(vcpu); break; default: WARN_ON(1); break; } }