static int __init da850_evm_console_init(void) { if (!machine_is_davinci_da850_evm()) return 0; return add_preferred_console("ttyS", 2, "115200"); }
static int __init da850_evm_config_emac(void) { void __iomem *cfg_chip3_base; int ret; u32 val; struct davinci_soc_info *soc_info = &davinci_soc_info; u8 rmii_en = soc_info->emac_pdata->rmii_en; if (!machine_is_davinci_da850_evm()) return 0; cfg_chip3_base = DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP3_REG); val = __raw_readl(cfg_chip3_base); if (rmii_en) { val |= BIT(8); ret = davinci_cfg_reg_list(da850_rmii_pins); pr_info("EMAC: RMII PHY configured, MII PHY will not be" " functional\n"); } else { val &= ~BIT(8); ret = davinci_cfg_reg_list(da850_cpgmac_pins); pr_info("EMAC: MII PHY configured, RMII PHY will not be" " functional\n"); } if (ret) pr_warning("da850_evm_init: cpgmac/rmii mux setup failed: %d\n", ret); /* configure the CFGCHIP3 register for RMII or MII */ __raw_writel(val, cfg_chip3_base); ret = davinci_cfg_reg(DA850_GPIO2_6); if (ret) pr_warning("da850_evm_init:GPIO(2,6) mux setup " "failed\n"); ret = gpio_request(DA850_MII_MDIO_CLKEN_PIN, "mdio_clk_en"); if (ret) { pr_warning("Cannot open GPIO %d\n", DA850_MII_MDIO_CLKEN_PIN); return ret; } /* Enable/Disable MII MDIO clock */ gpio_direction_output(DA850_MII_MDIO_CLKEN_PIN, rmii_en); soc_info->emac_pdata->phy_mask = DA850_EVM_PHY_MASK; soc_info->emac_pdata->mdio_max_freq = DA850_EVM_MDIO_FREQUENCY; ret = da8xx_register_emac(); if (ret) pr_warning("da850_evm_init: emac registration failed: %d\n", ret); return 0; }
static int evm_hw_params(struct snd_pcm_substream *substream, struct snd_pcm_hw_params *params) { struct snd_soc_pcm_runtime *rtd = substream->private_data; struct snd_soc_dai *codec_dai = rtd->codec_dai; struct snd_soc_dai *cpu_dai = rtd->cpu_dai; int ret = 0; unsigned sysclk; /* ASP1 on DM355 EVM is clocked by an external oscillator */ if (machine_is_davinci_dm355_evm() || machine_is_davinci_dm6467_evm() || machine_is_davinci_dm365_evm()) sysclk = 27000000; /* ASP0 in DM6446 EVM is clocked by U55, as configured by * board-dm644x-evm.c using GPIOs from U18. There are six * options; here we "know" we use a 48 KHz sample rate. */ else if (machine_is_davinci_evm()) sysclk = 12288000; else if (machine_is_davinci_da830_evm() || machine_is_davinci_da850_evm()) sysclk = 24576000; /* On AM335X, CODEC gets MCLK from external Xtal (12MHz). */ else if (machine_is_am335xevm()) sysclk = 12000000; else return -EINVAL; /* set codec DAI configuration */ ret = snd_soc_dai_set_fmt(codec_dai, AUDIO_FORMAT); if (ret < 0) return ret; /* set cpu DAI configuration */ ret = snd_soc_dai_set_fmt(cpu_dai, AUDIO_FORMAT); if (ret < 0) return ret; /* set the codec system clock */ ret = snd_soc_dai_set_sysclk(codec_dai, 0, sysclk, SND_SOC_CLOCK_OUT); if (ret < 0) return ret; return 0; }
static int __init evm_init(void) { struct snd_soc_card *evm_snd_dev_data; int index; int ret; /* * If dtb is there, the devices will be created dynamically. * Only register platfrom driver structure. */ #if defined(CONFIG_OF) if (of_have_populated_dt()) return platform_driver_register(&davinci_evm_driver); #endif if (machine_is_davinci_evm()) { evm_snd_dev_data = &dm6446_snd_soc_card_evm; index = 0; } else if (machine_is_davinci_dm355_evm()) { evm_snd_dev_data = &dm355_snd_soc_card_evm; index = 1; } else if (machine_is_davinci_dm365_evm()) { evm_snd_dev_data = &dm365_snd_soc_card_evm; index = 0; } else if (machine_is_davinci_dm6467_evm()) { evm_snd_dev_data = &dm6467_snd_soc_card_evm; index = 0; } else if (machine_is_davinci_da830_evm()) { evm_snd_dev_data = &da830_snd_soc_card; index = 1; } else if (machine_is_davinci_da850_evm()) { evm_snd_dev_data = &da850_snd_soc_card; index = 0; } else return -EINVAL; evm_snd_device = platform_device_alloc("soc-audio", index); if (!evm_snd_device) return -ENOMEM; platform_set_drvdata(evm_snd_device, evm_snd_dev_data); ret = platform_device_add(evm_snd_device); if (ret) platform_device_put(evm_snd_device); return ret; }
static int __init evm_init(void) { struct snd_soc_card *evm_snd_dev_data; int index; int ret; if (machine_is_davinci_evm()) { evm_snd_dev_data = &dm6446_snd_soc_card_evm; index = 0; } else if (machine_is_davinci_dm355_evm()) { evm_snd_dev_data = &dm355_snd_soc_card_evm; index = 1; } else if (machine_is_davinci_dm365_evm()) { evm_snd_dev_data = &dm365_snd_soc_card_evm; index = 0; } else if (machine_is_davinci_dm6467_evm()) { evm_snd_dev_data = &dm6467_snd_soc_card_evm; index = 0; } else if (machine_is_davinci_da830_evm()) { evm_snd_dev_data = &da830_snd_soc_card; index = 1; } else if (machine_is_davinci_da850_evm()) { evm_snd_dev_data = &da850_snd_soc_card; index = 0; } else if (machine_is_am335xevm()) { evm_snd_dev_data = &am335x_snd_soc_card; index = 0; } else return -EINVAL; evm_snd_device = platform_device_alloc("soc-audio", index); if (!evm_snd_device) { return -ENOMEM; } platform_set_drvdata(evm_snd_device, evm_snd_dev_data); ret = platform_device_add(evm_snd_device); if (ret) platform_device_put(evm_snd_device); return ret; }
static int evm_hw_params(struct snd_pcm_substream *substream, struct snd_pcm_hw_params *params) { struct snd_soc_pcm_runtime *rtd = substream->private_data; struct snd_soc_dai *codec_dai = rtd->dai->codec_dai; struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai; int ret = 0; unsigned sysclk; if (machine_is_davinci_dm355_evm() || machine_is_davinci_dm6467_evm()) sysclk = 27000000; else if (machine_is_davinci_evm()) sysclk = 12288000; else if (machine_is_davinci_da830_evm() || machine_is_davinci_da850_evm()) sysclk = 24576000; else return -EINVAL; ret = snd_soc_dai_set_fmt(codec_dai, AUDIO_FORMAT); if (ret < 0) return ret; ret = snd_soc_dai_set_fmt(cpu_dai, AUDIO_FORMAT); if (ret < 0) return ret; ret = snd_soc_dai_set_sysclk(codec_dai, 0, sysclk, SND_SOC_CLOCK_OUT); if (ret < 0) return ret; return 0; }
static int __init evm_init(void) { struct snd_soc_device *evm_snd_dev_data; int index; int ret; if (machine_is_davinci_evm()) { evm_snd_dev_data = &evm_snd_devdata; index = 0; } else if (machine_is_davinci_dm355_evm()) { evm_snd_dev_data = &evm_snd_devdata; index = 1; } else if (machine_is_davinci_dm6467_evm()) { evm_snd_dev_data = &dm6467_evm_snd_devdata; index = 0; } else if (machine_is_davinci_da830_evm()) { evm_snd_dev_data = &da830_evm_snd_devdata; index = 1; } else if (machine_is_davinci_da850_evm()) { evm_snd_dev_data = &da850_evm_snd_devdata; index = 0; } else return -EINVAL; evm_snd_device = platform_device_alloc("soc-audio", index); if (!evm_snd_device) return -ENOMEM; platform_set_drvdata(evm_snd_device, evm_snd_dev_data); evm_snd_dev_data->dev = &evm_snd_device->dev; ret = platform_device_add(evm_snd_device); if (ret) platform_device_put(evm_snd_device); return ret; }
/** * da850_enable_pca9543a() - Enable/Disable I2C switch PCA9543A for sensor * @en: enable/disable flag */ static int da850_enable_pca9543a(int en) { static char val = 1; int status = 1; struct i2c_msg msg = { .flags = 0, .len = 1, .buf = &val, }; pr_info("da850evm_enable_pca9543a\n"); if (!en) val = 0; if (!pca9543a) return -ENXIO; msg.addr = pca9543a->addr; /* turn i2c switch, pca9543a, on/off */ status = i2c_transfer(pca9543a->adapter, &msg, 1); if (status == 1) status = 0; return status; } static const short da850_evm_mii_pins[] = { DA850_MII_TXEN, DA850_MII_TXCLK, DA850_MII_COL, DA850_MII_TXD_3, DA850_MII_TXD_2, DA850_MII_TXD_1, DA850_MII_TXD_0, DA850_MII_RXER, DA850_MII_CRS, DA850_MII_RXCLK, DA850_MII_RXDV, DA850_MII_RXD_3, DA850_MII_RXD_2, DA850_MII_RXD_1, DA850_MII_RXD_0, DA850_MDIO_CLK, DA850_MDIO_D, -1 }; static const short da850_evm_rmii_pins[] = { DA850_RMII_TXD_0, DA850_RMII_TXD_1, DA850_RMII_TXEN, DA850_RMII_CRS_DV, DA850_RMII_RXD_0, DA850_RMII_RXD_1, DA850_RMII_RXER, DA850_RMII_MHZ_50_CLK, DA850_MDIO_CLK, DA850_MDIO_D, -1 }; static int __init da850_evm_config_emac(void) { void __iomem *cfg_chip3_base; int ret; u32 val; struct davinci_soc_info *soc_info = &davinci_soc_info; u8 rmii_en = soc_info->emac_pdata->rmii_en; if (!machine_is_davinci_da850_evm()) return 0; cfg_chip3_base = DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP3_REG); val = __raw_readl(cfg_chip3_base); if (rmii_en) { val |= BIT(8); ret = davinci_cfg_reg_list(da850_evm_rmii_pins); pr_info("EMAC: RMII PHY configured, MII PHY will not be" " functional\n"); } else { val &= ~BIT(8); ret = davinci_cfg_reg_list(da850_evm_mii_pins); pr_info("EMAC: MII PHY configured, RMII PHY will not be" " functional\n"); } if (ret) pr_warning("da850_evm_init: cpgmac/rmii mux setup failed: %d\n", ret); /* configure the CFGCHIP3 register for RMII or MII */ __raw_writel(val, cfg_chip3_base); ret = davinci_cfg_reg(DA850_GPIO2_6); if (ret) pr_warning("da850_evm_init:GPIO(2,6) mux setup " "failed\n"); ret = gpio_request(DA850_MII_MDIO_CLKEN_PIN, "mdio_clk_en"); if (ret) { pr_warning("Cannot open GPIO %d\n", DA850_MII_MDIO_CLKEN_PIN); return ret; } /* Enable/Disable MII MDIO clock */ gpio_direction_output(DA850_MII_MDIO_CLKEN_PIN, rmii_en); soc_info->emac_pdata->phy_id = DA850_EVM_PHY_ID; ret = da8xx_register_emac(); if (ret) pr_warning("da850_evm_init: emac registration failed: %d\n", ret); return 0; }