/**
* \brief Application entry point for pdca_usart example.
*
* \return Unused (ANSI-C compatibility).
*/
int main(void)
{
/* Initialize the SAM system */
sysclk_init();
board_init();
/* Initialize the UART console */
configure_console();
/* Output example information */
puts(STRING_HEADER);
/* Enable PDCA module clock */
pdca_enable(PDCA);
/* Init PDCA channel with the pdca_options.*/
pdca_channel_set_config(PDCA_TX_CHANNEL, &pdca_tx_configs);
/* Enable PDCA channel */
pdca_channel_enable(PDCA_TX_CHANNEL);
pdca_channel_set_callback(PDCA_TX_CHANNEL, pdca_tranfer_done, PDCA_0_IRQn,
1, PDCA_IER_RCZ);
while (1) {
}
}
/**
* \brief The AES interrupt call back function.
*/
static void aes_callback_pdca(void)
{
/* Read the output(this will clear the DATRDY flag) by PDCA. */
pdca_channel_enable(PDCA_RX_CHANNEL);
while (pdca_get_channel_status(PDCA_RX_CHANNEL) !=
PDCA_CH_TRANSFER_COMPLETED) {
}
state = true;
}
/**
* \brief Application entry point for usart_serial example.
*
* \return Unused (ANSI-C compatibility).
*/
int main(void)
{
/* Initialize the SAM system. */
sysclk_init();
board_init();
/* Configure UART for debug message output. */
configure_console();
/* Output example information. */
puts(STRING_HEADER);
puts("-- Start to echo serial inputs with PDCA -- \r\n\r");
/* Configure TC. */
configure_tc();
/* Enable PDCA module clock */
pdca_enable(PDCA);
/* Init PDCA channel with the pdca_options.*/
pdca_channel_set_config(PDCA_RX_CHANNEL, &pdca_rx_options);
pdca_channel_set_config(PDCA_TX_CHANNEL, &pdca_tx_options);
/* Enable PDCA channel, start receiving data. */
pdca_channel_enable(PDCA_RX_CHANNEL);
pdca_channel_enable(PDCA_TX_CHANNEL);
/* Enable USART RXBUFF interrupt */
usart_enable_interrupt(BOARD_USART, US_IER_RXBUFF);
/* Configure and enable interrupt of USART. */
NVIC_EnableIRQ(USART_IRQn);
/* Start timer. */
tc_start(TC0, 0);
while (1) {
}
}
/**
* Initialize the PDCA transfer for the example.
*/
static void init_pdca(void)
{
/* PDCA channel options */
static const pdca_channel_config_t pdca_tx_configs = {
.addr = (void *)event_string,
.pid = PDCA_PID_USART_TX,
.size = sizeof(event_string),
.r_addr = 0,
.r_size = 0,
.ring = false,
.etrig = true,
.transfer_size = PDCA_MR_SIZE_BYTE
};
/* Enable PDCA module clock */
pdca_enable(PDCA);
/* Init PDCA channel with the pdca_options.*/
pdca_channel_set_config(PEVC_ID_USER_PDCA_0, &pdca_tx_configs);
/* Set callback for PDCA channel */
pdca_channel_set_callback(PEVC_ID_USER_PDCA_0, pdca_tranfer_done,
PDCA_0_IRQn, 1, PDCA_IER_TRC | PDCA_IER_TERR);
/* Enable PDCA channel */
pdca_channel_enable(PEVC_ID_USER_PDCA_0);
}
/**
* Push button 0 interrupt callback.
*/
//! [example_pb0_callback]
static void pb0_callback(void)
{
/* Handle pin interrupt here e.g. toggle an LED */
LED_Toggle(LED0);
}
/**
* \brief Test ECB mode encryption and decryption with PDCA.
*
* \param test Current test case.
*/
static void run_ecb_mode_test_pdca(const struct test_case *test)
{
/* Change the AES interrupt callback function. */
aes_set_callback(&g_aes_inst, AES_INTERRUPT_INPUT_BUFFER_READY,
aes_callback_pdca, 1);
/* Enable PDCA module clock */
pdca_enable(PDCA);
state = false;
/* Configure the AES. */
g_aes_inst.aes_cfg->encrypt_mode = AES_ENCRYPTION;
g_aes_inst.aes_cfg->key_size = AES_KEY_SIZE_128;
g_aes_inst.aes_cfg->dma_mode = AES_DMA_MODE;
g_aes_inst.aes_cfg->opmode = AES_ECB_MODE;
g_aes_inst.aes_cfg->cfb_size = AES_CFB_SIZE_128;
g_aes_inst.aes_cfg->countermeasure_mask = AES_COUNTERMEASURE_TYPE_ALL;
aes_set_config(&g_aes_inst);
/* Beginning of a new message. */
aes_set_new_message(&g_aes_inst);
/* Set the cryptographic key. */
aes_write_key(&g_aes_inst, key128);
/* The initialization vector is not used by the ECB cipher mode. */
/* Write the data to be ciphered to the input data registers. */
/* Init PDCA channel with the pdca_options.*/
PDCA_TX_OPTIONS.addr = (void *)ref_plain_text; /* memory address */
PDCA_TX_OPTIONS.pid = AESA_PDCA_ID_TX; /* select peripheral - AESA TX.*/
PDCA_TX_OPTIONS.size = AES_EXAMPLE_REFBUF_SIZE; /* transfer counter */
PDCA_TX_OPTIONS.r_addr = (void *)0; /* next memory address */
PDCA_TX_OPTIONS.r_size = 0; /* next transfer counter */
PDCA_TX_OPTIONS.transfer_size = PDCA_MR_SIZE_WORD;
pdca_channel_set_config(PDCA_TX_CHANNEL, &PDCA_TX_OPTIONS);
PDCA_RX_OPTIONS.addr = (void *)output_data; /* memory address */
PDCA_RX_OPTIONS.pid = AESA_PDCA_ID_RX; /* select peripheral - AESA RX.*/
PDCA_RX_OPTIONS.size = AES_EXAMPLE_REFBUF_SIZE; /* transfer counter */
PDCA_RX_OPTIONS.r_addr = (void *)0; /* next memory address */
PDCA_RX_OPTIONS.r_size = 0; /* next transfer counter */
PDCA_RX_OPTIONS.transfer_size = PDCA_MR_SIZE_WORD;
pdca_channel_set_config(PDCA_RX_CHANNEL, &PDCA_RX_OPTIONS);
/* Enable PDCA channel, start transfer data. */
pdca_channel_enable(PDCA_TX_CHANNEL);
/* Wait for the end of the encryption process. */
delay_ms(30);
/* Disable PDCA channel. */
pdca_channel_disable(PDCA_RX_CHANNEL);
pdca_channel_disable(PDCA_TX_CHANNEL);
if ((ref_cipher_text_ecb[0] != output_data[0]) ||
(ref_cipher_text_ecb[1] != output_data[1]) ||
(ref_cipher_text_ecb[2] != output_data[2]) ||
(ref_cipher_text_ecb[3] != output_data[3])) {
flag = false;
} else {
flag = true;
}
test_assert_true(test, flag == true, "ECB mode encryption not work!");
state = false;
/* Configure the AES. */
g_aes_inst.aes_cfg->encrypt_mode = AES_DECRYPTION;
g_aes_inst.aes_cfg->key_size = AES_KEY_SIZE_128;
g_aes_inst.aes_cfg->dma_mode = AES_DMA_MODE;
g_aes_inst.aes_cfg->opmode = AES_ECB_MODE;
g_aes_inst.aes_cfg->cfb_size = AES_CFB_SIZE_128;
g_aes_inst.aes_cfg->countermeasure_mask = AES_COUNTERMEASURE_TYPE_ALL;
aes_set_config(&g_aes_inst);
/* Beginning of a new message. */
aes_set_new_message(&g_aes_inst);
/* Set the cryptographic key. */
aes_write_key(&g_aes_inst, key128);
/* The initialization vector is not used by the ECB cipher mode. */
/* Write the data to be deciphered to the input data registers. */
/* Init PDCA channel with the pdca_options.*/
PDCA_TX_OPTIONS.addr = (void *)ref_cipher_text_ecb; /* memory address */
PDCA_TX_OPTIONS.pid = AESA_PDCA_ID_TX; /* select peripheral - AESA TX.*/
PDCA_TX_OPTIONS.size = AES_EXAMPLE_REFBUF_SIZE; /* transfer counter */
PDCA_TX_OPTIONS.r_addr = (void *)0; /* next memory address */
PDCA_TX_OPTIONS.r_size = 0; /* next transfer counter */
PDCA_TX_OPTIONS.transfer_size = PDCA_MR_SIZE_WORD;
pdca_channel_set_config(PDCA_TX_CHANNEL, &PDCA_TX_OPTIONS);
PDCA_RX_OPTIONS.addr = (void *)output_data; /* memory address */
PDCA_RX_OPTIONS.pid = AESA_PDCA_ID_RX; /* select peripheral - AESA RX.*/
PDCA_RX_OPTIONS.size = AES_EXAMPLE_REFBUF_SIZE; /* transfer counter */
PDCA_RX_OPTIONS.r_addr = (void *)0; /* next memory address */
PDCA_RX_OPTIONS.r_size = 0; /* next transfer counter */
PDCA_RX_OPTIONS.transfer_size = PDCA_MR_SIZE_WORD;
pdca_channel_set_config(PDCA_RX_CHANNEL, &PDCA_RX_OPTIONS);
/* Enable PDCA channel, start transfer data. */
pdca_channel_enable(PDCA_TX_CHANNEL);
/* Wait for the end of the decryption process. */
delay_ms(30);
/* Disable PDCA channel. */
pdca_channel_disable(PDCA_RX_CHANNEL);
pdca_channel_disable(PDCA_TX_CHANNEL);
/* check the result. */
if ((ref_plain_text[0] != output_data[0]) ||
(ref_plain_text[1] != output_data[1]) ||
(ref_plain_text[2] != output_data[2]) ||
(ref_plain_text[3] != output_data[3])) {
flag = false;
} else {
flag = true;
}
test_assert_true(test, flag == true, "ECB mode decryption not work!");
/* Disable PDCA module clock */
pdca_disable(PDCA);
/* Change back the AES interrupt callback function. */
aes_set_callback(&g_aes_inst, AES_INTERRUPT_INPUT_BUFFER_READY,
aes_callback, 1);
}
/**
* Initialize the PDCA transfer for the example.
*/
static void init_pdca(void)
{
/* PDCA channel options */
static const pdca_channel_config_t pdca_tx_configs = {
.addr = (void *)event_string,
.pid = PDCA_PID_USART2_TX,
.size = sizeof(event_string),
.r_addr = 0,
.r_size = 0,
.ring = false,
.etrig = true,
.transfer_size = PDCA_MR_SIZE_BYTE
};
/* Enable PDCA module */
pdca_enable(PDCA);
/* Init PDCA channel with the pdca_options.*/
pdca_channel_set_config(PEVC_ID_USER_PDCA_0, &pdca_tx_configs);
/* Set callback for PDCA channel */
pdca_channel_set_callback(PEVC_ID_USER_PDCA_0, pdca_tranfer_done,
PDCA_0_IRQn, 1, PDCA_IER_TRC | PDCA_IER_TERR);
/* Enable PDCA channel */
pdca_channel_enable(PEVC_ID_USER_PDCA_0);
}
/**
* Configure serial console.
*/
static void configure_console(void)
{
const usart_serial_options_t uart_serial_options = {
.baudrate = CONF_UART_BAUDRATE,
#ifdef CONF_UART_CHAR_LENGTH
.charlength = CONF_UART_CHAR_LENGTH,
#endif
.paritytype = CONF_UART_PARITY,
#ifdef CONF_UART_STOP_BITS
.stopbits = CONF_UART_STOP_BITS,
#endif
};
/* Configure console. */
stdio_serial_init(CONF_UART, &uart_serial_options);
}
/**
* \brief Main entry point for event example.
*/
int main(void)
{
/* Initialize the SAM system */
sysclk_init();
board_init();
/* Initialize the console uart */
configure_console();
/* Output example information */
printf("\r\n\r\n-- Events example 2 --\r\n");
printf("-- %s\r\n", BOARD_NAME);
printf("-- Compiled: %s %s --\r\n", __DATE__, __TIME__);
/* Configure pin to trigger an enent on falling edge */
ioport_set_pin_mode(CONF_EXAMPLE_PIN_EVENT, IOPORT_MODE_PULLUP |
IOPORT_MODE_MUX_C);
ioport_disable_pin(CONF_EXAMPLE_PIN_EVENT);
ioport_set_pin_sense_mode(CONF_EXAMPLE_PIN_EVENT, IOPORT_SENSE_FALLING);
gpio_enable_pin_periph_event(CONF_EXAMPLE_PIN_EVENT);
printf(CONF_EXAMPLE_EVENT_MSG);
init_events();
init_pdca();
while (1) {
/* Toggle LED0 every 500 ms */
LED_Toggle(LED0);
delay_ms(500);
}
}
/**
* \brief Initialize the PDCA transfer for the example.
*/
static void init_pdca(void)
{
/* PDCA channel options */
static const pdca_channel_config_t pdca_tx_configs = {
.addr = (void *)event_string,
.pid = CONF_PDCA_PID_USART_TX,
.size = sizeof(event_string),
.r_addr = 0,
.r_size = 0,
.ring = false,
.etrig = true,
.transfer_size = PDCA_MR_SIZE_BYTE
};
/* Enable PDCA module */
pdca_enable(PDCA);
/* Init PDCA channel with the pdca_options.*/
pdca_channel_set_config(PEVC_ID_USER_PDCA_0, &pdca_tx_configs);
/* Set callback for PDCA channel */
pdca_channel_set_callback(PEVC_ID_USER_PDCA_0, pdca_tranfer_done,
PDCA_0_IRQn, 1, PDCA_IER_TRC | PDCA_IER_TERR);
/* Enable PDCA channel */
pdca_channel_enable(PEVC_ID_USER_PDCA_0);
}
/**
* \brief Configure serial console.
*/
static void configure_console(void)
{
const usart_serial_options_t uart_serial_options = {
.baudrate = CONF_UART_BAUDRATE,
#ifdef CONF_UART_CHAR_LENGTH
.charlength = CONF_UART_CHAR_LENGTH,
#endif /* CONF_UART_CHAR_LENGTH */
.paritytype = CONF_UART_PARITY,
#ifdef CONF_UART_STOP_BITS
.stopbits = CONF_UART_STOP_BITS,
#endif /* CONF_UART_STOP_BITS */
};
/* Configure console. */
stdio_serial_init(CONF_UART, &uart_serial_options);
}
/**
* \brief Main entry point for event example.
*/
int main(void)
{
/* Initialize the SAM system */
sysclk_init();
board_init();
/* Initialize the console uart */
configure_console();
/* Output example information */
printf("\r\n\r\n-- Events example 1 --\r\n");
printf("-- %s\r\n", BOARD_NAME);
printf("-- Compiled: %s %s --\r\n", __DATE__, __TIME__);
//! [quick_start_init_all_basic_use]
/* Initialize AST as event generator. */
//! [quick_start_init_ast_basic_use]
init_ast();
//! [quick_start_init_ast_basic_use]
/* Initialise events for this example. */
//! [quick_start_init_events_basic_use]
init_events();
//! [quick_start_init_events_basic_use]
/* Initialize the PDCA as event user */
//! [quick_start_init_pdca_basic_use]
init_pdca();
//! [quick_start_init_pdca_basic_use]
//! [quick_start_init_all_basic_use]
while (1) {
/* Toggle LED0 every 500 ms */
LED_Toggle(LED0);
delay_ms(500);
}
}
/**
* \brief Application entry point for ABDAC example.
*
* \return Unused (ANSI-C compatibility).
*/
int main(void)
{
uint8_t key;
uint32_t i, count;
status_code_t status;
/* Initialize the SAM system. */
sysclk_init();
board_init();
/* Initialize the UART console. */
configure_console();
/* Output example information */
printf("-- ABDAC Example --\r\n");
printf("-- %s\r\n", BOARD_NAME);
printf("-- Compiled: %s %s --\r\n", __DATE__, __TIME__);
/* Config the push button. */
config_buttons();
/* Config the ABDAC. */
abdac_get_config_defaults(&g_abdac_cfg);
g_abdac_cfg.sample_rate_hz = ABDAC_SAMPLE_RATE_11025;
g_abdac_cfg.data_word_format = ABDAC_DATE_16BIT;
g_abdac_cfg.mono = false;
g_abdac_cfg.cmoc = false;
status = abdac_init(&g_abdac_inst, ABDACB, &g_abdac_cfg);
if (status != STATUS_OK) {
printf("-- Initialization fails! --\r\n");
while (1) {
}
}
abdac_enable(&g_abdac_inst);
abdac_clear_interrupt_flag(&g_abdac_inst, ABDAC_INTERRUPT_TXRDY);
abdac_clear_interrupt_flag(&g_abdac_inst, ABDAC_INTERRUPT_TXUR);
/* Config PDCA module */
pdca_enable(PDCA);
pdca_channel_set_config(PDCA_ABDAC_CHANNEL0, &pdca_abdac_config0);
pdca_channel_enable(PDCA_ABDAC_CHANNEL0);
pdca_channel_set_config(PDCA_ABDAC_CHANNEL1, &pdca_abdac_config1);
pdca_channel_enable(PDCA_ABDAC_CHANNEL1);
/* Display menu. */
display_menu();
while (1) {
scanf("%c", (char *)&key);
switch (key) {
case 'h':
display_menu();
break;
case 's':
printf("--Looped output audio, use push button to exit--\r\n");
abdac_set_volume0(&g_abdac_inst, false, 0x7FFF);
abdac_set_volume1(&g_abdac_inst, false, 0x7FFF);
i = 0;
/* output sample from the sound_table array */
while(!exit_flag) {
count = 0;
// Store sample from the sound_table array
while(count < (SOUND_SAMPLES)){
samples_left[count] = ((uint8_t)sound_table[i]) << 8;
samples_right[count] = ((uint8_t)sound_table[i]) << 8;
i++;
count++;
if (i >= sizeof(sound_table)) i = 0;
}
pdca_channel_write_reload(PDCA_ABDAC_CHANNEL0,
(void *)samples_left, SOUND_SAMPLES);
pdca_channel_write_reload(PDCA_ABDAC_CHANNEL1,
(void *)samples_right, SOUND_SAMPLES);
/**
* Wait until the reload register is empty. This means that
* one transmission is still ongoing but we are already able
* to set up the next transmission.
*/
while(!(pdca_get_channel_status(PDCA_ABDAC_CHANNEL1)
== PDCA_CH_COUNTER_RELOAD_IS_ZERO));
}
exit_flag = false;
printf("--Exit the audio output--\r\n\r\n");
/* Mute the volume */
abdac_set_volume0(&g_abdac_inst, true, 0x7FFF);
abdac_set_volume1(&g_abdac_inst, true, 0x7FFF);
break;
default:
break;
}
}
}
/**
* \brief Application entry point for PARC example.
*
* \return Unused (ANSI-C compatibility).
*/
int main(void)
{
uint32_t uc_key;
/* Initialize the SAM system. */
sysclk_init();
board_init();
/* Configure UART for debug message output. */
configure_console();
parc_port_source_simulation_config();
//! [parc_variables]
struct parc_module module_inst;
struct parc_config config;
//! [parc_variables]
/* Output example information. */
puts(STRING_HEADER);
/* Configure TC. */
configure_tc();
/* Start timer. */
tc_start(TC0, 0);
//! [parc_get_defaults]
// Get default configuration
parc_get_config_defaults(&config);
//! [parc_get_defaults]
printf("Press y to sample the data when both data enable pins are enabled.\r\n");
printf("Press n to sample the data, don't care the status of the data enable pins.\r\n");
uc_key = 0;
while ((uc_key != 'y') && (uc_key != 'n')) {
usart_read(CONF_UART, &uc_key);
}
if (uc_key == 'y') {
/* Sample the data when both data enable pins are enabled. */
config.smode = PARC_SMODE_PCEN1_AND_PCEN2_H;
ioport_set_pin_level(PIN_PCEN1_INPUT, IOPORT_PIN_LEVEL_HIGH);
ioport_set_pin_level(PIN_PCEN2_INPUT, IOPORT_PIN_LEVEL_HIGH);
printf("Receive data when both data enable pins are enabled.\r\n");
} else {
/* Sample the data, don't care the status of the data enable pins. */
config.smode = PARC_SMODE_ALWAYS;
printf("Receive data, don't care the status of the data enable pins.\r\n");
}
printf("Press y to sample all the data.\r\n");
printf("Press n to sample the data only one out of two.\r\n");
uc_key = 0;
while ((uc_key != 'y') && (uc_key != 'n')) {
usart_read(CONF_UART, &uc_key);
}
if (uc_key == 'y') {
/* Sample all the data. */
config.capture_mode = PARC_BOTH_CAPTURE;
printf("All data are sampled.\r\n");
} else {
/* Sample the data only one out of two. */
config.capture_mode = PARC_EVEN_CAPTURE;
printf("Only one out of two data is sampled, with an even index.\r\n");
}
//! [parc_init_enable_and_start]
//! [parc_init_enable_and_start_1]
// Initialize PARC.
parc_init(&module_inst, PARC, &config);
//! [parc_init_enable_and_start_1]
//! [parc_init_enable_and_start_2]
// Enable the PARC
parc_enable(&module_inst);
// Start capture.
parc_start_capture(&module_inst);
//! [parc_init_enable_and_start_2]
//! [parc_init_enable_and_start]
/* Enable PDCA module clock */
pdca_enable(PDCA);
/* Init PDCA channel with the pdca_options.*/
pdca_channel_set_config(PDCA_PARC_CHANNEL, &PDCA_PARC_OPTIONS);
/* Set callback for PDCA interrupt. */
pdca_channel_set_callback(PDCA_PARC_CHANNEL,
pdca_parc_callback,PDCA_0_IRQn,1,PDCA_IER_RCZ);
/* Enable PDCA channel, start receiving data. */
pdca_channel_enable(PDCA_PARC_CHANNEL);
/* Start read PARC data capture via PDCA. */
pdca_channel_write_load(PDCA_PARC_CHANNEL,
(void *)gs_puc_buffer, BUFFER_SIZE);
/* Main loop. */
while(1) {
}
}
/**
* \brief Test audio data transfer and receive.
*
* \param test Current test case.
*/
static void run_iis_test(const struct test_case *test)
{
uint32_t i;
struct iis_config config;
struct iis_dev_inst dev_inst;
struct genclk_config gencfg;
struct pll_config pcfg;
/* Set the GCLK according to the sample rate */
genclk_config_defaults(&gencfg, IISC_GCLK_NUM);
/* CPUCLK 48M */
pll_config_init(&pcfg, PLL_SRC_OSC0, 2, 96000000 /
BOARD_OSC0_HZ);
pll_enable(&pcfg, 0);
sysclk_set_prescalers(0, 0, 0, 0, 0);
pll_wait_for_lock(0);
sysclk_set_source(SYSCLK_SRC_PLL0);
/* GCLK according fs ratio */
genclk_enable_source(GENCLK_SRC_CLK_CPU);
genclk_config_set_source(&gencfg, GENCLK_SRC_CLK_CPU);
genclk_config_set_divider(&gencfg, 4);
genclk_enable(&gencfg, IISC_GCLK_NUM);
/* Set the configuration */
iis_get_config_defaults(&config);
config.data_format = IIS_DATE_16BIT_COMPACT;
config.slot_length = IIS_SLOT_LENGTH_16BIT;
config.fs_ratio = IIS_FS_RATE_256;
config.tx_channels = IIS_CHANNEL_STEREO;
config.rx_channels = IIS_CHANNEL_STEREO;
config.tx_dma = IIS_ONE_DMA_CHANNEL_FOR_BOTH_CHANNELS;
config.rx_dma = IIS_ONE_DMA_CHANNEL_FOR_BOTH_CHANNELS;
config.loopback = true;
iis_init(&dev_inst, IISC, &config);
/* Enable the IIS module. */
iis_enable(&dev_inst);
/* Config PDCA module */
pdca_enable(PDCA);
pdca_channel_set_config(PDCA_IISC_CHANNEL0, &pdca_iisc_config_tx);
pdca_channel_set_config(PDCA_IISC_CHANNEL1, &pdca_iisc_config_rx);
pdca_channel_write_load(PDCA_IISC_CHANNEL0,
(void *)output_samples, SOUND_SAMPLES / 2);
pdca_channel_write_load(PDCA_IISC_CHANNEL1,
(void *)input_samples, SOUND_SAMPLES / 2);
pdca_channel_enable(PDCA_IISC_CHANNEL0);
pdca_channel_enable(PDCA_IISC_CHANNEL1);
/* Enable the functions */
iis_enable_transmission(&dev_inst);
iis_enable_clocks(&dev_inst);
/**
* Since the transfer and receive timing is not under control, we
* need adjust here the enable sequence and add some delay
* functions if it's needed.
*/
delay_us(20);
iis_enable_reception(&dev_inst);
while (!(pdca_get_channel_status(PDCA_IISC_CHANNEL1)
== PDCA_CH_TRANSFER_COMPLETED)) {
}
/* Disable the PDCA module. */
pdca_channel_disable(PDCA_IISC_CHANNEL0);
pdca_channel_disable(PDCA_IISC_CHANNEL1);
pdca_disable(PDCA);
/* Disable the IISC module. */
iis_disable(&dev_inst);
for (i = 0; i < SOUND_SAMPLES; i++) {
if (input_samples[i] != output_samples[i]) {
flag = false;
}
}
test_assert_true(test, flag == true, "Audio data did not match!");
}
/**
* \brief usart_rs485 Application entry point.
*
* Configure USART in RS485 mode. If the application starts earlier, it acts
* as a receiver. Otherwise, it should be a transmitter.
*
* \return Unused (ANSI-C compatibility).
*/
int main(void)
{
uint8_t uc_receive, uc_send = SYNC_CHAR;
uint32_t time_elapsed = 0;
uint32_t i;
/* Initialize the SAM system. */
sysclk_init();
board_init();
/* Configure UART for debug message output. */
configure_console();
/* Output example information. */
puts(STRING_HEADER);
/* 1ms tick. */
configure_systick();
/* Configure USART. */
configure_usart();
/* Initialize receiving buffer to distinguish with the sent frame. */
memset(g_uc_receive_buffer, 0x0, BUFFER_SIZE);
/*
* Enable transmitter here, and disable receiver first, to avoid receiving
* characters sent by itself. It's necessary for half duplex RS485.
*/
usart_enable_tx(BOARD_USART);
usart_disable_rx(BOARD_USART);
/* Enable PDCA module clock */
pdca_enable(PDCA);
/* Init PDCA channel with the pdca_options.*/
pdca_channel_set_config(PDCA_RX_CHANNEL, &PDCA_RX_OPTIONS);
pdca_channel_set_config(PDCA_TX_CHANNEL, &PDCA_TX_OPTIONS);
/* Send a sync character XON (0x11). */
pdca_channel_write_load(PDCA_TX_CHANNEL, &uc_send, 1);
/* Enable transfer PDCA channel */
pdca_channel_enable(PDCA_TX_CHANNEL);
/* Delay until the line is cleared, an estimated time used. */
wait(50);
/* Then enable receiver. */
usart_enable_rx(BOARD_USART);
/* Read the acknowledgement. */
pdca_channel_write_load(PDCA_RX_CHANNEL, &uc_receive, 1);
/* Enable PDCA channel */
pdca_channel_enable(PDCA_RX_CHANNEL);
/* Wait until time out or acknowledgement is received. */
time_elapsed = get_tick_count();
while (pdca_get_channel_status(PDCA_RX_CHANNEL) !=
PDCA_CH_TRANSFER_COMPLETED) {
if (get_tick_count() - time_elapsed > TIMEOUT) {
break;
}
}
/* If acknowledgement received in a short time. */
if (pdca_get_channel_status(PDCA_RX_CHANNEL) ==
PDCA_CH_TRANSFER_COMPLETED) {
/* Acknowledgement. */
if (uc_receive == ACK_CHAR) {
/* Act as transmitter, start transmitting. */
puts("-I- Act as transmitter.\r");
g_state = TRANSMITTING;
puts("-I- Start transmitting!\r");
pdca_channel_write_load(PDCA_TX_CHANNEL, g_uc_transmit_buffer,
BUFFER_SIZE);
/* Enable PDCA interrupt */
pdca_channel_set_callback(PDCA_TX_CHANNEL, PDCA_TX_Handler,
PDCA_1_IRQn, 1, PDCA_IER_TRC);
while (g_state != TRANSMITTED) {
}
puts("-I- Transmit done!\r");
while (1) {
}
}
} else {
/* Start receiving, act as receiver. */
puts("-I- Act as receiver.\r");
puts("-I- Receiving sync character.\r");
while (pdca_get_channel_status(PDCA_RX_CHANNEL) !=
PDCA_CH_TRANSFER_COMPLETED) {
}
/* Sync character is received. */
if (uc_receive == SYNC_CHAR) {
puts("-I- Received sync character.\r");
/* SEND XOff as acknowledgement. */
uc_send = ACK_CHAR;
/*
* Delay to prevent the character from being discarded by
* transmitter due to responding too soon.
*/
wait(100);
ioport_set_pin_level(RS485_USART_CTS_PIN, 1);
pdca_channel_write_load(PDCA_TX_CHANNEL, &uc_send, 1);
g_state = RECEIVING;
puts("-I- Start receiving buffer!\r");
pdca_channel_write_load(PDCA_RX_CHANNEL, g_uc_receive_buffer,
BUFFER_SIZE);
/* Enable PDCA interrupt */
pdca_channel_set_callback(PDCA_RX_CHANNEL, PDCA_RX_Handler,
PDCA_0_IRQn, 1, PDCA_IER_TRC);
ioport_set_pin_level(RS485_USART_CTS_PIN, 0);
while (g_state != RECEIVED) {
}
}
}
i = 0;
/* Check received frame. */
while (i < BUFFER_SIZE) {
if (g_uc_transmit_buffer[i] != g_uc_receive_buffer[i]) {
puts("-E- Error occurred while receiving!\r");
/* Infinite loop here. */
while (1) {
}
}
i++;
}
puts("-I- Received buffer successfully!\r");
while (1) {
}
}
/**
* \brief Configure ADC sequencer support multi-channel mode.
*
* \param cfg Pointer to ADC multi-channel mode configuration.
*/
void adc_pdca_set_config(struct adc_pdca_config *cfg)
{
/* Enable PDCA module clock */
pdca_enable(PDCA);
/* PDCA channel options */
pdca_channel_config_t PDCA_TX_CONFIGS = {
/* memory address */
.addr = (void *)cfg->cdma_cfg,
/* select peripheral */
.pid = ADCIFE_PDCA_ID_TX,
/* transfer counter */
.size = cfg->wm == true ? (cfg->nb_channels)*2 : cfg->nb_channels,
/* next memory address */
.r_addr = NULL,
/* next transfer counter */
.r_size = 0,
/* select size of the transfer */
.transfer_size = PDCA_MR_SIZE_WORD
};
pdca_channel_config_t PDCA_RX_CONFIGS = {
/* memory address */
.addr = (void *)cfg->buffer,
/* select peripheral */
.pid = ADCIFE_PDCA_ID_RX,
/* transfer counter */
.size = cfg->nb_channels,
/* next memory address */
.r_addr = NULL,
/* next transfer counter */
.r_size = 0,
/* select size of the transfer */
.transfer_size = PDCA_MR_SIZE_HALF_WORD
};
/* Init PDCA channel with the pdca_options. */
pdca_channel_set_config(cfg->pdc_tx_channel, &PDCA_TX_CONFIGS);
pdca_channel_set_config(cfg->pdc_rx_channel, &PDCA_RX_CONFIGS);
/* Enable PDCA channel */
pdca_channel_enable(cfg->pdc_tx_channel);
pdca_channel_enable(cfg->pdc_rx_channel);
}
/**
* \brief Enable ADC module.
*
* \param dev_inst Device structure pointer.
*
*/
status_code_t adc_enable(struct adc_dev_inst *const dev_inst)
{
uint32_t timeout = ADC_NUM_OF_ATTEMPTS;
sysclk_enable_peripheral_clock(dev_inst->hw_dev);
sleepmgr_lock_mode(SLEEPMGR_SLEEP_1);
dev_inst->hw_dev->ADCIFE_CR = ADCIFE_CR_EN;
while (!(dev_inst->hw_dev->ADCIFE_SR & ADCIFE_SR_EN)) {
if (!timeout--) {
return ERR_TIMEOUT;
}
}
dev_inst->hw_dev->ADCIFE_CR = ADCIFE_CR_REFBUFEN | ADCIFE_CR_BGREQEN;
return STATUS_OK;
}
/**
* \brief Disable ADC module.
*
* \param dev_inst Device structure pointer.
*
*/
void adc_disable(struct adc_dev_inst *const dev_inst)
{
dev_inst->hw_dev->ADCIFE_CR = ADCIFE_CR_DIS | ADCIFE_CR_REFBUFDIS |
ADCIFE_CR_BGREQDIS;
sysclk_disable_peripheral_clock(dev_inst->hw_dev);
sleepmgr_unlock_mode(SLEEPMGR_SLEEP_1);
}