static void isdbt_set_config_poweron(void)
{
#if defined(CONFIG_SEC_GPIO_SETTINGS)
struct pinctrl *isdbt_pinctrl;
/* Get pinctrl if target uses pinctrl */
isdbt_pinctrl = devm_pinctrl_get_select(isdbt_device, "isdbt_gpio_active");
if (IS_ERR(isdbt_pinctrl)) {
DPRINTK("Target does not use pinctrl\n");
isdbt_pinctrl = NULL;
}
#else
#if defined(CONFIG_MTV_QUALCOMM)
if(msm_gpiomux_write(dt_pdata->isdbt_spi_mosi, GPIOMUX_ACTIVE, &spi_active_config, NULL) < 0)
DPRINTK("spi_mosi Port request error!!!\n");
if(msm_gpiomux_write(dt_pdata->isdbt_spi_miso, GPIOMUX_ACTIVE, &spi_active_config, NULL) < 0)
DPRINTK("spi_miso Port request error!!!\n");
if(msm_gpiomux_write(dt_pdata->isdbt_spi_cs, GPIOMUX_ACTIVE, &spi_active_config, NULL) < 0)
DPRINTK("spi_cs Port request error!!!\n");
if(msm_gpiomux_write(dt_pdata->isdbt_spi_clk, GPIOMUX_ACTIVE, &spi_active_config, NULL) < 0)
DPRINTK("spi_clk Port request error!!!\n");
#elif defined(CONFIG_MTV_BROADCOM)
struct pin_config SdioPinCfgs;
SdioPinCfgs.name = dt_pdata->isdbt_irq;
pinmux_get_pin_config(&SdioPinCfgs);
SdioPinCfgs.reg.b.slew_rate_ctrl = 0;
pinmux_set_pin_config(&SdioPinCfgs);
SdioPinCfgs.name = dt_pdata->isdbt_rst;
pinmux_get_pin_config(&SdioPinCfgs);
SdioPinCfgs.reg.b.input_dis = 1;
SdioPinCfgs.reg.b.drv_sth = 0;
SdioPinCfgs.func = PF_GPIO00;
SdioPinCfgs.reg.b.sel = 4;
pinmux_set_pin_config(&SdioPinCfgs);
#elif defined(CONFIG_MTV_SPREADTRUM)
sprd_restore_spi_pin_cfg();
#endif
#endif
gpio_direction_output(dt_pdata->isdbt_pwr_en, 0);
if (gpio_is_valid(dt_pdata->isdbt_pwr_en2))
gpio_direction_output(dt_pdata->isdbt_pwr_en2, 0);
if (gpio_is_valid(dt_pdata->isdbt_ant_sel))
gpio_direction_output(dt_pdata->isdbt_ant_sel, 0);
if (gpio_is_valid(dt_pdata->isdbt_rst))
gpio_direction_output(dt_pdata->isdbt_rst, 0);
gpio_direction_input(dt_pdata->isdbt_irq);
}
static int pwm_backlight_remove(struct platform_device *pdev)
{
struct platform_pwm_backlight_data *data = pdev->dev.platform_data;
struct backlight_device *bl = platform_get_drvdata(pdev);
struct pwm_bl_data *pb = dev_get_drvdata(&bl->dev);
struct pin_config new_pin_config;
backlight_device_unregister(bl);
pwm_config(pb->pwm, 0, pb->period);
pwm_disable(pb->pwm);
pwm_free(pb->pwm);
if (data && data->exit)
data->exit(&pdev->dev);
if (data && pdev->dev.of_node) {
kfree(data);
pdev->dev.platform_data = NULL;
}
/*reset the pwm pin to GPIO function if defined in the kernel-dtb*/
if (pwm_pin >= 0 && pwm_pin_reboot_func >= 0) {
pr_info("remove reset the pwm pin to GPIO function\r\n");
pr_err("remove reset the pwm pin to GPIO function\r\n");
new_pin_config.name = pwm_pin;
pinmux_get_pin_config(&new_pin_config);
new_pin_config.func = pwm_pin_reboot_func;
pinmux_set_pin_config(&new_pin_config);
gpio_direction_output( 24, 0 );
gpio_set_value( 24, 0 );
}
return 0;
}
/* board level init */
int __init pinmux_board_init(void)
{
int i;
for (i=0; i<ARRAY_SIZE(board_pin_config); i++)
pinmux_set_pin_config(&board_pin_config[i]);
return 0;
}
int reset_pwm_padcntrl(void)
{
struct pin_config new_pin_config;
int ret;
new_pin_config.name = PN_GPIO24;
new_pin_config.func = PF_GPIO24;
ret = pinmux_set_pin_config(&new_pin_config);
return ret;
}
/* board level init */
int __init pinmux_board_init(void)
{
int i;
void __iomem *base = g_chip_pin_desc.base;
for (i=0; i<ARRAY_SIZE(board_pin_config); i++)
pinmux_set_pin_config(&board_pin_config[i]);
// Work around to SIMDAT/SIM2DAT. Once we move to DTS, we don't need this
// We cannot use PIN_CFG because bit 12 is used (previously RESERVED)
writel(0x00001033, base + PADCTRLREG_SIMDAT_OFFSET);
return 0;
}
static void pwm_backlight_shutdown(struct platform_device *pdev)
{
struct pin_config new_pin_config;
/*reset the pwm pin to GPIO function if defined in the kernel-dtb*/
if (pwm_pin >= 0 && pwm_pin_reboot_func >= 0) {
pr_info("reset the pwm pin to GPIO function\r\n");
pr_err("reset the pwm pin to GPIO function\r\n");
new_pin_config.name = pwm_pin;
pinmux_get_pin_config(&new_pin_config);
new_pin_config.func = pwm_pin_reboot_func;
pinmux_set_pin_config(&new_pin_config);
gpio_direction_output( 24, 0 );
gpio_set_value( 24, 0 );
}
}
static int bcm_modem_detect_gpio_request(enum PIN_NAME pin_cfg_name,
enum PIN_FUNC pin_cfg_func)
{
int rc = 0;
struct pin_config modem_det_pin_cfg;
struct pin_config modem_det_pin_cfg_orig;
unsigned int gpio_pin;
enum PIN_FUNC pin_func_orig;
if (is_ball_valid(pin_cfg_name)) {
rc = pinmux_find_gpio(pin_cfg_name, &gpio_pin, &pin_func_orig);
if (rc < 0) {
pr_err("%s: Unable to find gpio pin\n", __func__);
return rc;
}
modem_det_pin_cfg.name = pin_cfg_name;
rc = pinmux_get_pin_config(&modem_det_pin_cfg);
if (rc < 0) {
pr_err("%s: Unable to find pin configuration\n",
__func__);
return rc;
}
/* Keep a copy of original configuration */
memcpy(&modem_det_pin_cfg_orig, &modem_det_pin_cfg,
sizeof(struct pin_config));
modem_det_pin_cfg.reg.b.pull_up = 1;
modem_det_pin_cfg.reg.b.pull_dn = 0;
modem_det_pin_cfg.reg.b.drv_sth = DRIVE_STRENGTH_16MA;
modem_det_pin_cfg.func = pin_cfg_func;
rc = pinmux_set_pin_config(&modem_det_pin_cfg);
if (rc < 0) {
pr_err("%s: Unable to set pin configuration\n",
__func__);
return rc;
}
rc = gpio_request(gpio_pin, "modem_detect");
if (rc < 0) {
pr_err("Unable to request GPIO pin %d\n",
gpio_pin);
goto modem_detect_pin_config_restore;
}
/* Set to output to charge potentially existing capacitor */
gpio_direction_output(gpio_pin, 1);
mdelay(BCM_MODEM_DETECT_GPIO_CHARGE_MS);
gpio_direction_input(gpio_pin);
modem_present = gpio_get_value(gpio_pin);
modem_detect_pin_config_restore:
gpio_free(gpio_pin);
pinmux_set_pin_config(&modem_det_pin_cfg_orig);
} else {
rc = -EINVAL;
pr_err("%s: Invalid gpio pin name provided %d\n",
__func__, pin_cfg_name);
}
return rc;
}
//*****************************************************************************
//
// Function Name: DISPDRV__PowerControl
//
// Description: Display Module Control
//
//*****************************************************************************
Int32 DISPDRV_PowerControl (
DISPDRV_HANDLE_T drvH,
DISPLAY_POWER_STATE_T state )
{
Int32 res = 0;
DISPDRV_PANEL_T *pPanel = (DISPDRV_PANEL_T *)drvH;
struct pin_config GPIOSetup; /*for backlight off temporarily*/
DISPDRV_CHECK_PTR_2_RET( drvH, &panel[0], &panel[1], __FUNCTION__ );
#ifdef CONFIG_BACKLIGHT_LCD_SUPPORT
gpio_request(BACKLIGHT_GPIO,"BK_LIGHT");
if(!isFirstboot)
gpio_direction_output(BACKLIGHT_GPIO, 0);
#endif
switch ( state )
{
case DISPLAY_POWER_STATE_ON:
switch ( pPanel->pwrState )
{
case DISP_PWR_OFF:
if(isFirstboot){
isFirstboot = 0;
printk("First Kernel booting !!!!!!!!!!!!\n");
}
else
{
printk("First Kernel booting Write Sequence !!!!!!!!!!!!\n");
DISPDRV_ExecCmndList(drvH, &power_setting_seq_NT35510_DCS_Type[0], DCS_TYPE);
DISPDRV_SetMaxRxSize( drvH );
//DISPDRV_ExecCmndList(drvH, &power_setting_seq_GEN_Type[0], GEN_TYPE);
//DISPDRV_SetMaxRxSize( drvH );
//DISPDRV_ExecCmndList(drvH, &writemem_seq_DCS_Type[0], DCS_TYPE);
//printk("DISP_PWR_OFF, DISPDRV_ExecCmndList");
//Set Peripheral Max Ret Size ( applies to all reads )
//DISPDRV_SetMaxRxSize( drvH );
LCD_DBG ( LCD_DBG_INIT_ID, "[DISPDRV] %s: INIT-SEQ\n\r", __FUNCTION__ );
}
pPanel->pwrState = DISP_PWR_SLEEP_OFF;
break;
case DISP_PWR_SLEEP_ON:
DISPDRV_ExecCmndList(drvH, &power_on_seq_DCS_Type[0], DCS_TYPE);
#ifndef CONFIG_BACKLIGHT_LCD_SUPPORT
gpio_set_value_cansleep(BACKLIGHT_GPIO, 1);
#endif
pPanel->pwrState = DISP_PWR_SLEEP_OFF;
LCD_DBG ( LCD_DBG_INIT_ID, "[DISPDRV] %s: SLEEP-OUT\n\r",
__FUNCTION__ );
break;
default:
break;
}
break;
case DISPLAY_POWER_STATE_OFF:
LCD_DBG ( LCD_DBG_ERR_ID, "[DISPDRV] %s: POWER-OFF State "
"Not Supported\n\r", __FUNCTION__ );
res = -1;
break;
case DISPLAY_POWER_STATE_SLEEP:
if( pPanel->pwrState == DISP_PWR_SLEEP_OFF )
{
DISPDRV_ExecCmndList(drvH, &power_off_seq_NT35510_DCS_Type[0], DCS_TYPE);
pPanel->pwrState = DISP_PWR_SLEEP_ON;
LCD_DBG ( LCD_DBG_INIT_ID, "[DISPDRV] %s: SLEEP-IN\n\r",
__FUNCTION__ );
}
else
{
LCD_DBG ( LCD_DBG_ERR_ID, "[DISPDRV] %s: SLEEP-IN Requested, "
"But Not In POWER-ON State\n\r", __FUNCTION__ );
res = -1;
}
break;
case DISPLAY_POWER_STATE_BLANK_SCREEN:
if( pPanel->pwrState == DISP_PWR_SLEEP_OFF)
{
/*for backlight off temporarily*/
GPIOSetup.name = PN_DCLK4;
pinmux_get_pin_config(&GPIOSetup);
GPIOSetup.reg.b.pull_up = 0;
GPIOSetup.reg.b.pull_dn = 0;
pinmux_set_pin_config(&GPIOSetup);
gpio_direction_output(BACKLIGHT_GPIO, 0);
/* backlight off */
gpio_direction_input(BACKLIGHT_GPIO);
LCD_DBG ( LCD_DBG_INIT_ID, "[DISPDRV] %s: Turn off backlight\n\r",
__FUNCTION__ );
}
else
{
#ifndef CONFIG_BACKLIGHT_LCD_SUPPORT
gpio_direction_output(BACKLIGHT_GPIO, 1);
#endif
LCD_DBG ( LCD_DBG_INIT_ID, "[DISPDRV] %s: Turn on backlight ",
__FUNCTION__ );
}
break;
default:
LCD_DBG ( LCD_DBG_ERR_ID, "[DISPDRV] %s: Invalid Power State[%d] "
"Requested\n\r", __FUNCTION__, state );
res = -1;
break;
}
#ifndef CONFIG_BACKLIGHT_LCD_SUPPORT
gpio_free(BACKLIGHT_GPIO);
#endif
return ( res );
}
static int bcmpmu_adc_request(struct bcmpmu *bcmpmu, struct bcmpmu_adc_req *req)
{
struct bcmpmu_adc *padc = bcmpmu->adcinfo;
int ret = -EINVAL, timeout;
struct pin_config StoredPinmux, TestPinMux;
unsigned adcsyngpio;
enum PIN_FUNC adcsyngpiomux;
pr_hwmon(FLOW, "%s: called: ->sig %d, tm %d, flags %d\n", __func__,
req->sig, req->tm, req->flags);
if (req->flags == PMU_ADC_RAW_ONLY ||
req->flags == PMU_ADC_RAW_AND_UNIT) {
if ((req->tm == PMU_ADC_TM_RTM_SW) ||
(req->tm == PMU_ADC_TM_RTM_SW_TEST))
timeout = padc->adcsetting->sw_timeout;
else
timeout = padc->adcsetting->txrx_timeout;
switch (req->tm) {
case PMU_ADC_TM_HK:
ret = update_adc_result(padc, req);
break;
case PMU_ADC_TM_RTM_TX:
case PMU_ADC_TM_RTM_RX:
case PMU_ADC_TM_RTM_SW:
case PMU_ADC_TM_RTM_SW_TEST:
mutex_lock(&padc->lock);
padc->rtmreq = req;
if (req->tm == PMU_ADC_TM_RTM_SW_TEST) {
pinmux_find_gpio(PN_ADCSYN, &adcsyngpio,
&adcsyngpiomux);
pr_hwmon(FLOW, "%s: SW_TEST: Pin:%u, "
"Gpio:%u, Mux:%u\n", __func__,
PN_ADCSYN, adcsyngpio, adcsyngpiomux);
/* Setup test pinmuxing */
StoredPinmux.name = PN_ADCSYN;
pinmux_get_pin_config(&StoredPinmux);
TestPinMux.name = PN_ADCSYN;
pinmux_get_pin_config(&TestPinMux);
TestPinMux.func = adcsyngpiomux;
pinmux_set_pin_config(&TestPinMux);
gpio_request(adcsyngpio, "ADCSYN_GPIO");
gpio_direction_output(adcsyngpio, 1);
/* Use TX for test */
padc->bcmpmu->write_dev_drct(padc->bcmpmu,
padc->
ctrlmap
[PMU_ADC_RTM_DLY].
map,
padc->
ctrlmap
[PMU_ADC_RTM_DLY].
addr, 0,
padc->
ctrlmap
[PMU_ADC_RTM_DLY].
mask);
bcmpmu_sel_adcsync(PMU_ADC_TM_RTM_TX);
}
/* config hw for rtm adc */
if (req->tm == PMU_ADC_TM_RTM_TX) {
padc->bcmpmu->write_dev_drct(padc->bcmpmu,
padc->
ctrlmap
[PMU_ADC_RTM_DLY].
map,
padc->
ctrlmap
[PMU_ADC_RTM_DLY].
addr,
padc->adcsetting->
tx_delay << padc->
ctrlmap
[PMU_ADC_RTM_DLY].
shift,
padc->
ctrlmap
[PMU_ADC_RTM_DLY].
mask);
bcmpmu_sel_adcsync(PMU_ADC_TM_RTM_TX);
}
if (req->tm == PMU_ADC_TM_RTM_RX) {
padc->bcmpmu->write_dev_drct(padc->bcmpmu,
padc->
ctrlmap
[PMU_ADC_RTM_DLY].
map,
padc->
ctrlmap
[PMU_ADC_RTM_DLY].
addr,
padc->adcsetting->
rx_delay << padc->
ctrlmap
[PMU_ADC_RTM_DLY].
shift,
padc->
ctrlmap
[PMU_ADC_RTM_DLY].
mask);
bcmpmu_sel_adcsync(PMU_ADC_TM_RTM_RX);
}
req->ready = 0;
padc->bcmpmu->write_dev_drct(padc->bcmpmu,
padc->
ctrlmap[PMU_ADC_RTM_SEL].
map,
padc->
ctrlmap[PMU_ADC_RTM_SEL].
addr,
padc->adcmap[req->sig].
rtmsel << padc->
ctrlmap[PMU_ADC_RTM_SEL].
shift,
padc->
ctrlmap[PMU_ADC_RTM_SEL].
mask);
padc->bcmpmu->write_dev_drct(padc->bcmpmu,
padc->
ctrlmap[PMU_ADC_RTM_MASK].
map,
padc->
ctrlmap[PMU_ADC_RTM_MASK].
addr, 0,
padc->
ctrlmap[PMU_ADC_RTM_MASK].
mask);
if (req->tm == PMU_ADC_TM_RTM_SW) {
padc->bcmpmu->write_dev_drct(padc->bcmpmu,
padc->
ctrlmap
[PMU_ADC_RTM_DLY].
map,
padc->
ctrlmap
[PMU_ADC_RTM_DLY].
addr, 0,
padc->
ctrlmap
[PMU_ADC_RTM_DLY].
mask);
padc->bcmpmu->write_dev_drct(padc->bcmpmu,
padc->
ctrlmap
[PMU_ADC_RTM_MASK].
map,
padc->
ctrlmap
[PMU_ADC_RTM_START].
addr,
padc->
ctrlmap
[PMU_ADC_RTM_START].
mask,
padc->
ctrlmap
[PMU_ADC_RTM_START].
mask);
}
pr_hwmon(FLOW, "%s: start rtm adc\n", __func__);
if (req->tm == PMU_ADC_TM_RTM_SW_TEST) {
/* Set ADC_SYNC to Low */
msleep(20);
gpio_set_value(adcsyngpio, 0);
}
if (wait_event_interruptible_timeout(padc->wait,
req->ready,
timeout) == 0) {
pr_hwmon(ERROR, "%s: RTM ADC timeout\n",
__func__);
req->raw = 0;
ret = -ETIMEDOUT;
} else
ret = update_adc_result(padc, req);
padc->rtmreq = NULL;
pr_hwmon(FLOW, "%s: Wait/update_adc_result returned %d",
__func__, ret);
/* Need to disable RTM to avoid interrrupts from
ADC_SYN activated RTM reads */
padc->bcmpmu->write_dev_drct(padc->bcmpmu,
padc->
ctrlmap[PMU_ADC_RTM_MASK].
map,
padc->
ctrlmap[PMU_ADC_RTM_MASK].
addr,
padc->
ctrlmap[PMU_ADC_RTM_MASK].
mask,
padc->
ctrlmap[PMU_ADC_RTM_MASK].
mask);
if (req->tm == PMU_ADC_TM_RTM_SW_TEST) {
/* Set ADC_SYNC to High */
gpio_set_value(adcsyngpio, 1);
/* Restore */
gpio_free(adcsyngpio);
pinmux_set_pin_config(&StoredPinmux);
}
mutex_unlock(&padc->lock);
break;
case PMU_ADC_TM_MAX:
default:
ret = -EINVAL;
}
if (ret < 0)
return ret;
}
if ((req->flags == PMU_ADC_UNIT_ONLY ||
req->flags == PMU_ADC_RAW_AND_UNIT)) {
/* This gives us a voltage in req->cal */
cal_adc_result(padc, req);
/* This updates the req->cnv with the value */
cnv_adc_result(padc, req);
} else {
req->cal = req->raw;
req->cnv = req->raw;
}
if(req->sig == PMU_ADC_VMBATT)
{
req->cnv = spa_reward_voltage(req->cnv);
}
pr_hwmon(DATA, "%s: result sig=%d, raw=0x%X, cal=0x%X, cnv=%d\n",
__func__, req->sig, req->raw, req->cal, req->cnv);
return ret;
}
void bcm_sdiowl_term(void)
{
struct sdio_wifi_dev *dev = &gDev;
printk(KERN_ERR " %s ENTRY \n",__FUNCTION__);
atomic_set(&dev->dev_is_ready, 0);
#ifndef CONFIG_BRCM_UNIFIED_DHD_SUPPORT
sdio_card_emulate(SDIO_DEV_TYPE_WIFI, 0);
#endif
#ifdef CONFIG_BRCM_UNIFIED_DHD_SUPPORT
msleep(2);
#endif
#ifdef CONFIG_BRCM_UNIFIED_DHD_SUPPORT
sdio_stop_clk(SDIO_DEV_TYPE_WIFI, 0);
__wifi_reset(dev->wifi_gpio->reset, 0);
#endif
/* free GPIOs */
wifi_gpio_free(dev->wifi_gpio);
printk(KERN_ERR " %s GPIO Released \n",__FUNCTION__);
dev->wifi_gpio = NULL;
//Set the Pull down on sdio lines
SdioPinCfgs.name = PN_MMC1CMD;
pinmux_get_pin_config(&SdioPinCfgs);
SdioPinCfgs.reg.b.pull_dn=0;
SdioPinCfgs.reg.b.pull_up=1;
SdioPinCfgs.reg.b.drv_sth=3;
pinmux_set_pin_config(&SdioPinCfgs);
SdioPinCfgs.name = PN_MMC1DAT0;
pinmux_get_pin_config(&SdioPinCfgs);
SdioPinCfgs.reg.b.pull_dn=0;
SdioPinCfgs.reg.b.pull_up=1;
SdioPinCfgs.reg.b.drv_sth=3;
pinmux_set_pin_config(&SdioPinCfgs);
SdioPinCfgs.name = PN_MMC1DAT1;
pinmux_get_pin_config(&SdioPinCfgs);
SdioPinCfgs.reg.b.pull_dn=0;
SdioPinCfgs.reg.b.pull_up=1;
SdioPinCfgs.reg.b.drv_sth=3;
pinmux_set_pin_config(&SdioPinCfgs);
SdioPinCfgs.name = PN_MMC1DAT2;
pinmux_get_pin_config(&SdioPinCfgs);
SdioPinCfgs.reg.b.pull_dn=0;
SdioPinCfgs.reg.b.pull_up=1;
SdioPinCfgs.reg.b.drv_sth=3;
pinmux_set_pin_config(&SdioPinCfgs);
SdioPinCfgs.name = PN_MMC1DAT3;
pinmux_get_pin_config(&SdioPinCfgs);
SdioPinCfgs.reg.b.pull_dn=0;
SdioPinCfgs.reg.b.pull_up=1;
SdioPinCfgs.reg.b.drv_sth=3;
pinmux_set_pin_config(&SdioPinCfgs);
#if defined(CONFIG_MACH_RHEA_SS_ZANIN) || defined(CONFIG_MACH_RHEA_SS_CORIPLUS)
SdioPinCfgs.name = PN_GPIO07;
pinmux_get_pin_config(&SdioPinCfgs);
SdioPinCfgs.reg.b.pull_dn=0;
SdioPinCfgs.reg.b.pull_up=0;
SdioPinCfgs.reg.b.drv_sth=0;
pinmux_set_pin_config(&SdioPinCfgs);
#elif defined(CONFIG_MACH_RHEA_SS_LUCAS)
SdioPinCfgs.name = PN_UBCTSN;
pinmux_get_pin_config(&SdioPinCfgs);
SdioPinCfgs.reg.b.pull_dn=0;
SdioPinCfgs.reg.b.pull_up=0;
SdioPinCfgs.reg.b.drv_sth=0;
pinmux_set_pin_config(&SdioPinCfgs);
#endif
SdioPinCfgs.name = PN_MMC1RST;
pinmux_get_pin_config(&SdioPinCfgs);
SdioPinCfgs.reg.b.pull_dn=0;
SdioPinCfgs.reg.b.pull_up=0;
SdioPinCfgs.reg.b.drv_sth=0;
pinmux_set_pin_config(&SdioPinCfgs);
//-----------------------------------
}
int bcm_sdiowl_init(int onoff)
{
int rc;
struct sdio_wifi_dev *dev = &gDev;
#ifndef CONFIG_BRCM_UNIFIED_DHD_SUPPORT
int wait_cnt;
struct mmc_card *card;
#endif
printk(KERN_ERR "%s:ENTRY\n",__FUNCTION__);
//Set the Pull of Sdio Lines first
SdioPinCfgs.name = PN_MMC1CMD;
pinmux_get_pin_config(&SdioPinCfgs);
SdioPinCfgs.reg.b.pull_dn=0;
SdioPinCfgs.reg.b.pull_up=1;
SdioPinCfgs.reg.b.drv_sth=3;
pinmux_set_pin_config(&SdioPinCfgs);
SdioPinCfgs.name = PN_MMC1DAT0;
pinmux_get_pin_config(&SdioPinCfgs);
SdioPinCfgs.reg.b.pull_dn=0;
SdioPinCfgs.reg.b.pull_up=1;
SdioPinCfgs.reg.b.drv_sth=3;
pinmux_set_pin_config(&SdioPinCfgs);
SdioPinCfgs.name = PN_MMC1DAT1;
pinmux_get_pin_config(&SdioPinCfgs);
SdioPinCfgs.reg.b.pull_dn=0;
SdioPinCfgs.reg.b.pull_up=1;
SdioPinCfgs.reg.b.drv_sth=3;
pinmux_set_pin_config(&SdioPinCfgs);
SdioPinCfgs.name = PN_MMC1DAT2;
pinmux_get_pin_config(&SdioPinCfgs);
SdioPinCfgs.reg.b.pull_dn=0;
SdioPinCfgs.reg.b.pull_up=1;
SdioPinCfgs.reg.b.drv_sth=3;
pinmux_set_pin_config(&SdioPinCfgs);
SdioPinCfgs.name = PN_MMC1DAT3;
pinmux_get_pin_config(&SdioPinCfgs);
SdioPinCfgs.reg.b.pull_dn=0;
SdioPinCfgs.reg.b.pull_up=1;
SdioPinCfgs.reg.b.drv_sth=3;
pinmux_set_pin_config(&SdioPinCfgs);
#if defined(CONFIG_MACH_RHEA_SS_ZANIN) || defined(CONFIG_MACH_RHEA_SS_CORIPLUS)
SdioPinCfgs.name = PN_GPIO07;
pinmux_get_pin_config(&SdioPinCfgs);
SdioPinCfgs.reg.b.pull_dn=1;
SdioPinCfgs.reg.b.pull_up=0;
SdioPinCfgs.reg.b.drv_sth=3;
pinmux_set_pin_config(&SdioPinCfgs);
#elif defined(CONFIG_MACH_RHEA_SS_LUCAS)
SdioPinCfgs.name = PN_UBCTSN;
pinmux_get_pin_config(&SdioPinCfgs);
SdioPinCfgs.reg.b.pull_dn=1;
SdioPinCfgs.reg.b.pull_up=0;
SdioPinCfgs.reg.b.drv_sth=3;
pinmux_set_pin_config(&SdioPinCfgs);
#endif
SdioPinCfgs.name = PN_MMC1RST;
pinmux_get_pin_config(&SdioPinCfgs);
SdioPinCfgs.reg.b.pull_dn=0;
SdioPinCfgs.reg.b.pull_up=0;
SdioPinCfgs.reg.b.drv_sth=3;
pinmux_set_pin_config(&SdioPinCfgs);
//-----------------------------------
/* check if the SDIO device is already up */
rc = sdio_dev_is_initialized(SDIO_DEV_TYPE_WIFI);
if (rc <= 0) {
PRINT_ERR("sdio interface is not initialized or err=%d\n", rc);
return rc;
}
printk(KERN_ERR "%s:GET_GPIO INFO\n",__FUNCTION__);
dev->wifi_gpio = sdio_get_wifi_gpio(SDIO_DEV_TYPE_WIFI);
#ifndef CONFIG_BRCM_UNIFIED_DHD_SUPPORT
if (dev->wifi_gpio == NULL) {
PRINT_ERR("wifi gpio hardware config is missing\n");
return -EFAULT;
}
#endif
/* reserve GPIOs */
rc = wifi_gpio_request(dev->wifi_gpio);
if (rc < 0) {
PRINT_ERR("unable to reserve certain gpio pins\n");
return rc;
}
/* reset the wifi chip */
if(onoff)
__wifi_reset(dev->wifi_gpio->reset, 1);
else
__wifi_reset(dev->wifi_gpio->reset, 0);
printk(KERN_ERR "%s: WLAN_REG_ON(GPIO%d) : value(%d)\n",__FUNCTION__, dev->wifi_gpio->reset, gpio_get_value(dev->wifi_gpio->reset));
#ifndef CONFIG_BRCM_UNIFIED_DHD_SUPPORT
/* now, emulate the card insertion */
rc = sdio_card_emulate(SDIO_DEV_TYPE_WIFI, 1);
if (rc < 0) {
PRINT_ERR("sdio_card_emulate failed\n");
goto err_free_gpio;
}
#define WAIT_CNT 10
/* need to wait for the mmc device population to finish */
wait_cnt = 0;
while (wait_cnt++ < WAIT_CNT) {
card = sdio_get_mmc_card(SDIO_DEV_TYPE_WIFI);
if (card) {
atomic_set(&dev->dev_is_ready, 1);
return 0;
}
msleep(100);
}
PRINT_ERR("timeout while populating sdio wifi device\n");
rc = -EIO;
sdio_card_emulate(SDIO_DEV_TYPE_WIFI, 0);
err_free_gpio:
wifi_gpio_free(dev->wifi_gpio);
#endif // CONFIG_BRCM_UNIFIED_DHD_SUPPORT
return rc;
}
/* Enable Evatronix 'patch'. Set GPIO59 and GPIO63 */
gpio_set_value(59, 1);
gpio_set_value(63, 1);
return 0;
}
#else /* #if defined(CONFIG_MACH_CAPRI_FPGA) */
static int bcm_usbh_hsic_init(struct usbh_cfg *hw_cfg)
{
int ret;
struct usbh_hsic_priv *drv_hsic_data = &usbh_hsic_data;
int retries;
uint32_t tmp;
int i;
#if defined(HSIC_TEST)
for (i = 0; i < hw_cfg->num_ports; i++) {
struct usbh_port_cfg *port = &hw_cfg->port[i];
dbg_printk("%s: HSIC.%d - reset_gpio=%d\n",
__func__, i, port->reset_gpio);
if (port->reset_gpio >= 0) {
/* Enable second port and setup pinmux. */
gpio_free(port->reset_gpio);
if (i == 1) {
struct pin_config pin_cfg =
PIN_CFG(SRI_E, GPIO_032,
0, ON, OFF, 0, 0, 8MA);
/* Configure GPIO04 for port1
* power & enable MIC2015
*/
pinmux_set_pin_config(&pin_cfg);
}
ret = gpio_request(port->reset_gpio,
"HSIC reset");
if (ret < 0) {
dbg_printk("GPIO%d request failed\n",
port->reset_gpio);
goto err_hsic_init_cleanup;
}
gpio_direction_output(port->reset_gpio, 0);
}
}
#endif /* #if defined(CONFIG_MACH_CAPRI_FPGA) */
/* Enable 48MHz reference clock to PHY */
tmp = readl(&drv_hsic_data->ctrl_regs->clkrst_ctrl);
writel(tmp | HSIC_PHY_CLKRST_CTRL_CLK48_REQ_MASK,
&drv_hsic_data->ctrl_regs->clkrst_ctrl);
dbg_printk("Change PHY Clock & Reset Control from 0x%08x to 0x%08x\n",
tmp, readl(&drv_hsic_data->ctrl_regs->clkrst_ctrl));
/* Enable LDO */
tmp = readl(&drv_hsic_data->ctrl_regs->hsic_ldo_ctrl);
writel(tmp | HSIC_PHY_HSIC_LDO_CTRL_LDO_EN_MASK,
&drv_hsic_data->ctrl_regs->hsic_ldo_ctrl);
dbg_printk("Change PHY AFE Control from 0x%08x to 0x%08x\n",
tmp, readl(&drv_hsic_data->ctrl_regs->hsic_ldo_ctrl));
mdelay(1);
/* Deassert power downs */
tmp = readl(&drv_hsic_data->ctrl_regs->hsic_phy_ctrl);
writel(tmp | HSIC_PHY_HSIC_PHY_CTRL_UTMI_PWRDNB_MASK |
HSIC_PHY_HSIC_PHY_CTRL_PHY_PWRDNB_MASK,
&drv_hsic_data->ctrl_regs->hsic_phy_ctrl);
dbg_printk("Change HSIC PHY Control from 0x%08x to 0x%08x\n", tmp,
readl(&drv_hsic_data->ctrl_regs->hsic_phy_ctrl));
mdelay(1);
/* Deassert PLL power down */
tmp = readl(&drv_hsic_data->ctrl_regs->hsic_pll_ctrl);
writel(tmp | HSIC_PHY_HSIC_PLL_CTRL_PLL_POWERDOWNB_MASK,
&drv_hsic_data->ctrl_regs->hsic_pll_ctrl);
dbg_printk("Change HSIC PLL Control from 0x%08x to 0x%08x\n",
tmp, readl(&drv_hsic_data->ctrl_regs->hsic_pll_ctrl));
/* Deassert ISO */
tmp = readl(&drv_hsic_data->ctrl_regs->hsic_phy_ctrl);
writel(tmp & ~HSIC_PHY_HSIC_PHY_CTRL_PHY_ISO_MASK,
&drv_hsic_data->ctrl_regs->hsic_phy_ctrl);
dbg_printk("Change HSIC PHY Control from 0x%08x to 0x%08x\n",
tmp, readl(&drv_hsic_data->ctrl_regs->hsic_phy_ctrl));
mdelay(1);
/* Pull PHY out of reset */
tmp = readl(&drv_hsic_data->ctrl_regs->hsic_phy_ctrl);
writel(tmp | HSIC_PHY_HSIC_PHY_CTRL_RESETB_MASK,
&drv_hsic_data->ctrl_regs->hsic_phy_ctrl);
dbg_printk("Change HSIC PHY Control from 0x%08x to 0x%08x\n",
tmp, readl(&drv_hsic_data->ctrl_regs->hsic_phy_ctrl));
/* Pull PLL out of reset */
tmp = readl(&drv_hsic_data->ctrl_regs->hsic_pll_ctrl);
writel(tmp & ~HSIC_PHY_HSIC_PLL_CTRL_PLL_RESET_MASK,
&drv_hsic_data->ctrl_regs->hsic_pll_ctrl);
dbg_printk("Change HSIC PLL Control from 0x%08x to 0x%08x\n",
tmp, readl(&drv_hsic_data->ctrl_regs->hsic_pll_ctrl));
/* Wait for PLL lock */
retries = 100;
while ((!(readl(&drv_hsic_data->ctrl_regs->hsic_pll_ctrl) &
HSIC_PHY_HSIC_PLL_CTRL_PLL_LOCK_MASK)) && retries--) {
schedule_timeout_interruptible(HZ / 1000);
}
if (retries == 0)
dbg_printk("ERROR: HSIC PLL Lock failed!\n");
/* Deassert software reset for UTMI and port */
tmp = readl(&drv_hsic_data->ctrl_regs->clkrst_ctrl);
writel(tmp |
HSIC_PHY_CLKRST_CTRL_UTMIRESETN_SW_MASK |
HSIC_PHY_CLKRST_CTRL_RESETN_SW_MASK,
&drv_hsic_data->ctrl_regs->clkrst_ctrl);
dbg_printk("Change HSIC Clock Reset Control from 0x%08x to 0x%08x\n",
tmp, readl(&drv_hsic_data->ctrl_regs->clkrst_ctrl));
/* Deassert soft resets to the PHY */
tmp = readl(&drv_hsic_data->ctrl_regs->hsic_phy_ctrl);
writel((tmp | HSIC_PHY_HSIC_PHY_CTRL_SOFT_RESETB_MASK) &
~HSIC_PHY_HSIC_PHY_CTRL_NON_DRIVING_MASK,
&drv_hsic_data->ctrl_regs->hsic_phy_ctrl);
dbg_printk("Change HSIC PHY Control from 0x%08x to 0x%08x\n",
tmp, readl(&drv_hsic_data->ctrl_regs->hsic_phy_ctrl));
#if defined(HSIC_TEST)
for (i = 0; i < hw_cfg->num_ports; i++) {
struct usbh_port_cfg *port = &hw_cfg->port[i];
dbg_printk("%s: HSIC.%d - Pull out of reset. reset_gpio=%d\n",
__func__, i, port->reset_gpio);
if (port->reset_gpio >= 0)
gpio_set_value(port->reset_gpio, 1);
}
return 0;
err_hsic_init_cleanup:
for (; i >= 0; i--) {
struct usbh_port_cfg *port = &hw_cfg->port[i];
dbg_printk("%s: HSIC.%d - Free reset_gpio=%d\n",
__func__, i, port->reset_gpio);
if (port->reset_gpio >= 0)
gpio_free(port->reset_gpio);
}
#endif /* #if defined(HSIC_TEST) */
return 0;
}
void bcm_sdiowl_term(void)
{
struct sdio_wifi_dev *dev = &gDev;
printk(KERN_ERR " %s ENTRY\n", __func__);
atomic_set(&dev->dev_is_ready, 0);
#ifndef CONFIG_BRCM_UNIFIED_DHD_SUPPORT
sdio_card_emulate(SDIO_DEV_TYPE_WIFI, 0);
#endif
#ifdef CONFIG_BRCM_UNIFIED_DHD_SUPPORT
msleep(2);
#endif
#ifdef CONFIG_BRCM_UNIFIED_DHD_SUPPORT
__wifi_reset(dev->wifi_gpio->reset, 0);
#endif
/* free GPIOs */
wifi_gpio_free(dev->wifi_gpio);
printk(KERN_ERR " %s GPIO Released\n", __func__);
dev->wifi_gpio = NULL;
/*
* 4334 bug requires us to Pull down on sdio lines on reset
*/
SdioPinCfgs.name = PN_MMC1CK;
pinmux_get_pin_config(&SdioPinCfgs);
SdioPinCfgs.reg.b.input_dis = 1;
SdioPinCfgs.reg.b.pull_dn = 0;
SdioPinCfgs.reg.b.pull_up = 0;
SdioPinCfgs.reg.b.drv_sth = 3;
pinmux_set_pin_config(&SdioPinCfgs);
SdioPinCfgs.name = PN_MMC1CMD;
pinmux_get_pin_config(&SdioPinCfgs);
SdioPinCfgs.reg.b.pull_dn = 1;
SdioPinCfgs.reg.b.pull_up = 0;
SdioPinCfgs.reg.b.drv_sth = 3;
pinmux_set_pin_config(&SdioPinCfgs);
SdioPinCfgs.name = PN_MMC1DAT0;
pinmux_get_pin_config(&SdioPinCfgs);
SdioPinCfgs.reg.b.pull_dn = 1;
SdioPinCfgs.reg.b.pull_up = 0;
SdioPinCfgs.reg.b.drv_sth = 3;
pinmux_set_pin_config(&SdioPinCfgs);
SdioPinCfgs.name = PN_MMC1DAT1;
pinmux_get_pin_config(&SdioPinCfgs);
SdioPinCfgs.reg.b.pull_dn = 1;
SdioPinCfgs.reg.b.pull_up = 0;
SdioPinCfgs.reg.b.drv_sth = 3;
pinmux_set_pin_config(&SdioPinCfgs);
SdioPinCfgs.name = PN_MMC1DAT2;
pinmux_get_pin_config(&SdioPinCfgs);
SdioPinCfgs.reg.b.pull_dn = 1;
SdioPinCfgs.reg.b.pull_up = 0;
SdioPinCfgs.reg.b.drv_sth = 3;
pinmux_set_pin_config(&SdioPinCfgs);
SdioPinCfgs.name = PN_MMC1DAT3;
pinmux_get_pin_config(&SdioPinCfgs);
SdioPinCfgs.reg.b.pull_dn = 1;
SdioPinCfgs.reg.b.pull_up = 0;
SdioPinCfgs.reg.b.drv_sth = 3;
pinmux_set_pin_config(&SdioPinCfgs);
SdioPinCfgs.name = PN_MMC1DAT4;
pinmux_get_pin_config(&SdioPinCfgs);
SdioPinCfgs.reg.b.pull_dn = 0;
SdioPinCfgs.reg.b.pull_up = 1;
SdioPinCfgs.reg.b.drv_sth = 3;
pinmux_set_pin_config(&SdioPinCfgs);
/*
SdioPinCfgs.name = PN_LCDTE;
pinmux_get_pin_config(&SdioPinCfgs);
SdioPinCfgs.reg.b.pull_dn=1;
SdioPinCfgs.reg.b.pull_up=0;
SdioPinCfgs.reg.b.drv_sth=3;
pinmux_set_pin_config(&SdioPinCfgs);
*/
/* ----------------------------------- */
}
int bcm_sdiowl_init(int onoff)
{
int rc;
struct sdio_wifi_dev *dev = &gDev;
#ifndef CONFIG_BRCM_UNIFIED_DHD_SUPPORT
int wait_cnt;
struct mmc_card *card;
#endif
printk(KERN_ERR "%s:ENTRY\n", __func__);
/* Set the Pull of Sdio Lines first */
SdioPinCfgs.name = PN_MMC1CK;
pinmux_get_pin_config(&SdioPinCfgs);
SdioPinCfgs.reg.b.input_dis = 0;
SdioPinCfgs.reg.b.pull_dn = 0;
SdioPinCfgs.reg.b.pull_up = 0;
SdioPinCfgs.reg.b.drv_sth = 3;
pinmux_set_pin_config(&SdioPinCfgs);
SdioPinCfgs.name = PN_MMC1CMD;
pinmux_get_pin_config(&SdioPinCfgs);
SdioPinCfgs.reg.b.pull_dn = 0;
SdioPinCfgs.reg.b.pull_up = 1;
SdioPinCfgs.reg.b.drv_sth = 3;
pinmux_set_pin_config(&SdioPinCfgs);
SdioPinCfgs.name = PN_MMC1DAT0;
pinmux_get_pin_config(&SdioPinCfgs);
SdioPinCfgs.reg.b.pull_dn = 0;
SdioPinCfgs.reg.b.pull_up = 1;
SdioPinCfgs.reg.b.drv_sth = 3;
pinmux_set_pin_config(&SdioPinCfgs);
SdioPinCfgs.name = PN_MMC1DAT1;
pinmux_get_pin_config(&SdioPinCfgs);
SdioPinCfgs.reg.b.pull_dn = 0;
SdioPinCfgs.reg.b.pull_up = 1;
SdioPinCfgs.reg.b.drv_sth = 3;
pinmux_set_pin_config(&SdioPinCfgs);
SdioPinCfgs.name = PN_MMC1DAT2;
pinmux_get_pin_config(&SdioPinCfgs);
SdioPinCfgs.reg.b.pull_dn = 0;
SdioPinCfgs.reg.b.pull_up = 1;
SdioPinCfgs.reg.b.drv_sth = 3;
pinmux_set_pin_config(&SdioPinCfgs);
SdioPinCfgs.name = PN_MMC1DAT3;
pinmux_get_pin_config(&SdioPinCfgs);
SdioPinCfgs.reg.b.pull_dn = 0;
SdioPinCfgs.reg.b.pull_up = 1;
SdioPinCfgs.reg.b.drv_sth = 3;
pinmux_set_pin_config(&SdioPinCfgs);
SdioPinCfgs.name = PN_MMC1DAT4;
pinmux_get_pin_config(&SdioPinCfgs);
SdioPinCfgs.reg.b.pull_dn = 1;
SdioPinCfgs.reg.b.pull_up = 0;
SdioPinCfgs.reg.b.drv_sth = 3;
pinmux_set_pin_config(&SdioPinCfgs);
/*
SdioPinCfgs.name = PN_LCDTE;
pinmux_get_pin_config(&SdioPinCfgs);
SdioPinCfgs.reg.b.pull_dn = 0;
SdioPinCfgs.reg.b.pull_up = 0;
SdioPinCfgs.reg.b.drv_sth = 3;
pinmux_set_pin_config(&SdioPinCfgs);
*/
/* ----------------------------------- */
/* check if the SDIO device is already up */
rc = sdio_dev_is_initialized(SDIO_DEV_TYPE_WIFI);
if (rc <= 0) {
PRINT_ERR("sdio interface is not initialized or err=%d\n", rc);
return rc;
}
printk(KERN_ERR "%s:GET_GPIO INFO\n", __func__);
dev->wifi_gpio = sdio_get_wifi_gpio(SDIO_DEV_TYPE_WIFI);
#ifndef CONFIG_BRCM_UNIFIED_DHD_SUPPORT
if (dev->wifi_gpio == NULL) {
PRINT_ERR("wifi gpio hardware config is missing\n");
return -EFAULT;
}
#endif
#ifdef CONFIG_BRCM_UNIFIED_DHD_SUPPORT
#if defined(CONFIG_MACH_HAWAII_RAY) || defined(CONFIG_MACH_HAWAII_STONE) \
|| defined(CONFIG_MACH_HAWAII_GARNET) \
|| defined(CONFIG_MACH_HAWAII_SS_EVAL_REV00) \
|| defined(CONFIG_MACH_HAWAII_SS_LOGAN_REV00) \
|| defined(CONFIG_MACH_HAWAII_SS_LOGAN_REV01)
dev->wifi_gpio->reset = 3;
dev->wifi_gpio->reg = -1;
dev->wifi_gpio->host_wake = 74;
dev->wifi_gpio->shutdown = -1;
#endif
#endif
/* reserve GPIOs */
rc = wifi_gpio_request(dev->wifi_gpio);
if (rc < 0) {
PRINT_ERR("unable to reserve certain gpio pins\n");
return rc;
}
/* reset the wifi chip */
if (onoff)
__wifi_reset(dev->wifi_gpio->reset, 1);
else
__wifi_reset(dev->wifi_gpio->reset, 0);
printk(KERN_ERR "%s: WLAN_REG_ON(GPIO%d) : value(%d)\n",
__func__, dev->wifi_gpio->reset,
gpio_get_value(dev->wifi_gpio->reset));
printk(KERN_ERR "%s:GPIO TOGGLED AND EXIT\n", __func__);
#ifndef CONFIG_BRCM_UNIFIED_DHD_SUPPORT
/* now, emulate the card insertion */
rc = sdio_card_emulate(SDIO_DEV_TYPE_WIFI, 1);
if (rc < 0) {
PRINT_ERR("sdio_card_emulate failed\n");
goto err_free_gpio;
}
#define WAIT_CNT 10
/* need to wait for the mmc device population to finish */
wait_cnt = 0;
while (wait_cnt++ < WAIT_CNT) {
card = sdio_get_mmc_card(SDIO_DEV_TYPE_WIFI);
if (card) {
atomic_set(&dev->dev_is_ready, 1);
return 0;
}
msleep(100);
}
PRINT_ERR("timeout while populating sdio wifi device\n");
rc = -EIO;
sdio_card_emulate(SDIO_DEV_TYPE_WIFI, 0);
err_free_gpio:
wifi_gpio_free(dev->wifi_gpio);
#endif /* CONFIG_BRCM_UNIFIED_DHD_SUPPORT */
return rc;
}