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Comsys

Laboratories related to computer organization and architecture, microprocessor, etc. https://sites.google.com/a/ku.th/01219215/home Outline

  • Organization
    • ALU components
      • Adder / Substractor
      • Multiplier
      • Floating Point Representation
      • Simple ALU
    • Control
      • FSM
      • ROM / Array
  • Branch
    • Address Profiling
    • Branch Prediction
  • Memory
    • Cache Simulation
      • Address Profiling
      • Replacement Policy
      • Associativity
  • Architecture
    • Profiling
    • Performance Metric
      • CPI
      • Execution Time
      • Instruction Count
      • Memory Access
      • Insctruction Mix

Lab

  1. SystemC Installation
  2. Getting to know SystemC
  3. Simple logic gates and combinational logic
  4. Adder Subtractor
  5. Multiplier
  6. Division
  7. Registers
  8. Data Path with Registers
  9. Instrumental using Pin, and Others
  10. Writing your own cache simulation
  11. Thread Programming and Synchronization with POSIX
  12. InterProcess Communcation and inode

Quiz

Scope about SystemC

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Laboratories related to computer organization and architecture, microprocessor, etc.

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