/*FUNCTION****************************************************************
*
* Function Name : WDOG_DRV_Init
* Description : Initialize watchdog
* This function is used to initialize the WDOG, after called, the WDOG
* will run immediately according to the configure.
*
*END*********************************************************************/
void WDOG_DRV_Init(const wdog_user_config_t* userConfigPtr)
{
assert(userConfigPtr);
wdog_common_config wdogCommonConfig;
uint32_t coreClockHz, busClockHz;
CLOCK_SYS_GetFreq(kCoreClock, &coreClockHz);
CLOCK_SYS_GetFreq(kBusClock, &busClockHz);
wdogWctInstructionCount = ((coreClockHz/busClockHz) << 8); /* WCT is 256 bus clock */
wdogCommonConfig.U = 0x0U;
wdogCommonConfig.commonConfig.workInWaitModeEnable = (uint8_t)userConfigPtr->workInWaitModeEnable;
wdogCommonConfig.commonConfig.workInDebugModeEnable = (uint8_t)userConfigPtr->workInDebugModeEnable;
wdogCommonConfig.commonConfig.workInStopModeEnable = (uint8_t)userConfigPtr->workInStopModeEnable;
wdogCommonConfig.commonConfig.clockSource = (uint8_t)userConfigPtr->clockSource;
wdogCommonConfig.commonConfig.interruptEnable = (uint8_t)false;
wdogCommonConfig.commonConfig.windowModeEnable = (uint8_t)(0 != userConfigPtr->windowValue);
wdogCommonConfig.commonConfig.updateRegisterEnable = (uint8_t)userConfigPtr->updateRegisterEnable;
wdogCommonConfig.commonConfig.wdogEnable = (uint8_t)(true);
WDOG_DRV_Unlock();
WDOG_HAL_SetTimeoutValue(g_wdogBaseAddr[0], userConfigPtr->timeoutValue);
WDOG_HAL_SetWindowValue(g_wdogBaseAddr[0], userConfigPtr->windowValue);
WDOG_HAL_SetClockPrescalerValueMode(g_wdogBaseAddr[0], userConfigPtr->clockPrescalerValue);
WDOG_HAL_ClearIntFlag(g_wdogBaseAddr[0]);
WDOG_HAL_SetCommonConfig(g_wdogBaseAddr[0], wdogCommonConfig);
WDOG_DRV_WaitWctClose();
}
/*FUNCTION**********************************************************************
*
* Function Name : CLOCK_SYS_GetFtmFreq
* Description : Gets the clock frequency for FTM module. (FlexTimers)
* This function gets the clock frequency for FTM moudle.
*
*END**************************************************************************/
uint32_t CLOCK_SYS_GetFtmFreq(uint32_t instance)
{
(void) instance;
uint32_t freq = 0;
CLOCK_SYS_GetFreq(kMcgFfClock, &freq);
return freq;
}
/*FUNCTION**********************************************************************
*
* Function Name : CLOCK_SYS_GetAdcFreq
* Description : Gets the clock frequency for ADC module
* This function gets the clock frequency for ADC moudle.
*
*END**************************************************************************/
uint32_t CLOCK_SYS_GetAdcFreq(uint32_t instance)
{
(void) instance;
uint32_t freq = 0;
CLOCK_SYS_GetFreq(kOsc0ErClock, &freq);
return freq;
}
/*FUNCTION**********************************************************************
*
* Function Name : CLOCK_SYS_GetFtfFreq
* Description : Gets the clock frequency for FTF module. (Flash Memory)
* This function gets the clock frequency for FTF moudle.
*
*END**************************************************************************/
uint32_t CLOCK_SYS_GetFtfFreq(uint32_t instance)
{
(void) instance;
uint32_t freq = 0;
CLOCK_SYS_GetFreq(kFlashClock, &freq);
return freq;
}
/*FUNCTION**********************************************************************
*
* Function Name : CLOCK_SYS_GetDmamuxFreq
* Description : Gets the clock frequency for DMAMUX module
* This function gets the clock frequency for DMAMUX moudle.
*
*END**************************************************************************/
uint32_t CLOCK_SYS_GetDmamuxFreq(uint32_t instance)
{
(void) instance;
uint32_t freq = 0;
CLOCK_SYS_GetFreq(kBusClock, &freq);
return freq;
}
/*FUNCTION**********************************************************************
*
* Function Name : CLOCK_SYS_GetPortFreq
* Description : Gets the clock frequency for PORT module
* This function gets the clock frequency for PORT moudle.
*
*END**************************************************************************/
uint32_t CLOCK_SYS_GetPortFreq(uint32_t instance)
{
(void) instance;
uint32_t freq = 0;
CLOCK_SYS_GetFreq(kLpoClock, &freq);
return freq;
}
/*FUNCTION**********************************************************************
*
* Function Name : CLOCK_SYS_GetDmaFreq
* Description : Gets the clock frequency for DMA module
* This function gets the clock frequency for DMA moudle.
*
*END**************************************************************************/
uint32_t CLOCK_SYS_GetDmaFreq(uint32_t instance)
{
(void) instance;
uint32_t freq = 0;
CLOCK_SYS_GetFreq(kSystemClock, &freq);
return freq;
}
/*FUNCTION**********************************************************************
*
* Function Name : HWTIMER_SYS_SetFreq
* Description : The function configures timer to tick at frequency as close
* as possible to the requested one.
*
*END**************************************************************************/
_hwtimer_error_code_t HWTIMER_SYS_SetFreq(hwtimer_t *hwtimer, clock_names_t clockName, uint32_t freq)
{
uint32_t clockFreq;
uint32_t divider;
/* Check input parameters */
if ((NULL == hwtimer) || (0U == freq))
{
return kHwtimerInvalidInput;
}
if (NULL == hwtimer->devif)
{
return kHwtimerInvalidPointer;
}
/* Store clock_id in structure */
hwtimer->clockName = clockName;
/* Find out input frequency */
if ( kClockManagerSuccess != CLOCK_SYS_GetFreq(clockName, &clockFreq))
{
return kHwtimerClockManagerError;
}
divider = clockFreq / freq;
/* If Required frequency is higher than input clock frequency, we set divider 1 (for setting the highest possible frequency) */
if (0U == divider)
{
divider = 1U;
}
assert(NULL != hwtimer->devif->setDiv);
return hwtimer->devif->setDiv(hwtimer, divider);
}
void i2c_frequency(i2c_t *obj, int hz) {
uint32_t busClock;
uint32_t i2c_addrs[] = I2C_BASE_ADDRS;
clock_manager_error_code_t error = CLOCK_SYS_GetFreq(kBusClock, &busClock);
if (error == kClockManagerSuccess) {
I2C_HAL_SetBaudRate(i2c_addrs[obj->instance], busClock, hz / 1000, NULL);
}
}
/*FUNCTION**********************************************************************
*
* Function Name : CLOCK_SYS_GetUsbFreq
* Description : Gets the clock frequency for USB FS OTG module.
* This function gets the clock frequency for USB FS OTG moudle.
*
*END**************************************************************************/
uint32_t CLOCK_SYS_GetUsbFreq(uint32_t instance)
{
(void) instance;
uint32_t freq = 0;
uint8_t setting;
clock_names_t clockName;
uint32_t frac = 0;
uint32_t divider = 0;
/* get the sim clock source setting*/
if (CLOCK_HAL_GetSource(g_simBaseAddr[0], kClockUsbSrc, &setting) != kSimHalSuccess)
{
return freq;
}
switch ((sim_usb_clock_source_t)setting)
{
case kSimUsbSrcClkIn: /* Core/system clock */
clockName = kUSB_CLKIN;
break;
case kSimUsbSrcPllFllSel: /* clock as selected by SOPT2[PLLFLLSEL]. */
/* get the sim clock source setting*/
if (CLOCK_HAL_GetSource(g_simBaseAddr[0], kClockPllfllSel, &setting) != kSimHalSuccess)
{
return freq;
}
switch ((sim_pllfll_clock_sel_t)setting)
{
case kSimPllFllSelFll: /* Fll clock */
clockName = kMcgFllClock;
break;
case kSimPllFllSelPll: /* Pll0 clock */
clockName = kMcgPll0Clock;
break;
default:
clockName = kReserved;
break;
}
break;
default:
clockName = kReserved;
break;
}
/* Get ref clock freq */
CLOCK_SYS_GetFreq(clockName, &freq);
/* Get divider and frac */
CLOCK_HAL_GetDivider(g_simBaseAddr[0], kClockDividerUsbDiv, ÷r);
CLOCK_HAL_GetDivider(g_simBaseAddr[0], kClockDividerUsbFrac, &frac);
/* Divider output clock = Divider input clock � [ (FRAC+1) / (DIV+1) ]*/
freq = (freq) * (frac + 1) / (divider + 1);
return freq;
}
/*FUNCTION**********************************************************************
*
* Function Name : CLOCK_SYS_GetUartFreq
* Description : Gets the clock frequency for UART module.
* This function gets the clock frequency for UART moudle.
*
*END**************************************************************************/
uint32_t CLOCK_SYS_GetUartFreq(uint32_t instance)
{
uint32_t freq = 0;
switch (instance)
{
case 0:
case 1:
CLOCK_SYS_GetFreq(kSystemClock, &freq);
break;
case 2:
CLOCK_SYS_GetFreq(kBusClock, &freq);
break;
default:
break;
}
return freq;
}
/*!
* @Brief enable the trigger source
*/
void init_trigger_source(uint32_t adcInstance)
{
pdb_adc_pre_trigger_config_t pdbAdcTriggerConfig;
pdb_user_config_t pdbUserConfig;
pdb_clk_prescaler_div_mode_t divMode = kPdbClkPreDivBy64;
uint32_t busClock, modValue;
uint8_t preDivider = 1 << divMode;
// get the bus clock freq which for PDB
CLOCK_SYS_GetFreq(kBusClock, &busClock);
// calculate for MOD value
modValue = INPUT_SIGNAL_FREQ*NR_SAMPLES;
modValue = busClock/preDivider/modValue*4;
// init the pdb user config structure for
// enable SW trigger, enable continuous mode,
// set the correct MOD and DLY
// Enable the sequency error interrupt.
PDB_DRV_StructInitUserConfigForSoftTrigger(&pdbUserConfig);
pdbUserConfig.continuousModeEnable = true;
pdbUserConfig.pdbModulusValue = modValue;
pdbUserConfig.intEnable = true;
pdbUserConfig.seqErrIntEnable = true;
pdbUserConfig.clkPrescalerDivMode = divMode;
pdbUserConfig.multFactorMode = kPdbMultFactorAs1;
// Initialize PDB driver
PDB_DRV_Init(0, &pdbUserConfig);
// Configure the PDB channel for ADC_adcInstance
// disable BACK to BACK mode
pdbAdcTriggerConfig.backToBackModeEnable = false;
// enable pretrigger out
pdbAdcTriggerConfig.preTriggerOutEnable = true;
pdbAdcTriggerConfig.delayValue = modValue/4;
// Configure the pre trigger A for ADC
PDB_DRV_EnableAdcPreTrigger(0, adcInstance, 0, &pdbAdcTriggerConfig);
// the Pre-trigger A delay is set to 1/4 MOD,
// the Pre-trigger B delay is set to 3/4 MOD,
// so the trigger interval between A/B, B/A is same.
pdbAdcTriggerConfig.delayValue = modValue*3/4;
// Configure the pre trigger B for ADC
PDB_DRV_EnableAdcPreTrigger(0, adcInstance, 1, &pdbAdcTriggerConfig);
// Configure SIM for ADC hw trigger source PDB
SIM_HAL_SetAdcAlternativeTriggerCmd(gSimBase[0], adcInstance, false);
// Trigger the PDB, let it go in continuous mode
PDB_DRV_SoftTriggerCmd(0);
}
/*FUNCTION**********************************************************************
*
* Function Name : CLOCK_SYS_GetLpuartFreq
* Description : Gets the clock frequency for LPUART module.
* This function gets the clock frequency for LPUART moudle.
*
*END**************************************************************************/
uint32_t CLOCK_SYS_GetLpuartFreq(uint32_t instance)
{
uint32_t freq = 0;
uint8_t setting;
uint8_t setting1;
clock_names_t clockName;
uint32_t divider = 0;
/* get the sim clock source setting*/
if (CLOCK_HAL_GetSource(g_simBaseAddr[0], kClockLpuartSrc, &setting) != kSimHalSuccess)
{
return freq;
}
switch ((sim_lpuart_clock_source_t)setting)
{
case kSimLpuartSrcPllFllSel: /* clock as selected by SOPT2[PLLFLLSEL]. */
/* get the sim clock source setting*/
if (CLOCK_HAL_GetSource(g_simBaseAddr[0], kClockPllfllSel, &setting1) != kSimHalSuccess)
{
return freq;
}
switch ((sim_pllfll_clock_sel_t)setting1)
{
case kSimPllFllSelFll: /* Fll clock */
clockName = kMcgFllClock;
break;
case kSimPllFllSelIrc: /* Irc 48Mhz clock */
clockName = kIrc48mClock;
break;
default:
clockName = kReserved;
break;
}
break;
case kSimLpuartSrcOscErclk: /* OscErClk with divider */
clockName = kOsc0ErClock;
break;
case kSimLpuartSrcMcgIrclk: /* MCGIRCLK */
clockName = kMcgIrClock;
break;
default:
clockName = kReserved;
break;
}
/* Get ref clock freq */
CLOCK_SYS_GetFreq(clockName, &freq);
if ((sim_lpuart_clock_source_t)setting == kSimLpuartSrcOscErclk)
{
divider = OSC_HAL_GetExternalRefClkDivCmd(g_oscBaseAddr[0]);
freq = freq >> divider; /* 2 bits divider, divide by 1/2/4/8 */
}
/*FUNCTION**********************************************************************
*
* Function Name : CLOCK_SYS_GetSdhcFreq
* Description : Gets the clock frequency for SDHC module
* This function gets the clock frequency for SDHC moudle
*
*END**************************************************************************/
uint32_t CLOCK_SYS_GetSdhcFreq(uint32_t instance)
{
(void) instance;
uint32_t freq = 0;
uint8_t setting;
clock_names_t clockName;
/* get the sim clock source setting*/
if (CLOCK_HAL_GetSource(g_simBaseAddr[0], kClockSdhcSrc, &setting) != kSimHalSuccess)
{
return freq;
}
switch ((sim_sdhc_clock_source_t)setting)
{
case kSimSdhcSrcCoreSysClk: /* Core/system clock */
clockName = kCoreClock;
break;
case kSimSdhcSrcPllFllSel: /* clock as selected by SOPT2[PLLFLLSEL]. */
/* get the sim clock source setting*/
if (CLOCK_HAL_GetSource(g_simBaseAddr[0], kClockPllfllSel, &setting) != kSimHalSuccess)
{
return freq;
}
switch ((sim_pllfll_clock_sel_t)setting)
{
case kSimPllFllSelFll: /* Fll clock */
clockName = kMcgFllClock;
break;
case kSimPllFllSelPll: /* Pll0 clock */
clockName = kMcgPll0Clock;
break;
default:
clockName = kReserved;
break;
}
break;
case kSimSdhcSrcOscerclk: /* OSCERCLK clock */
clockName = kOsc0ErClock;
break;
case kSimSdhcSrcExt: /* SDHC CLKIN clock */
clockName = kSDHC0_CLKIN;
break;
default:
clockName = kReserved;
break;
}
/* Get ref clock freq */
CLOCK_SYS_GetFreq(clockName, &freq);
return freq;
}
/*FUNCTION**********************************************************************
*
* Function Name : CLOCK_SYS_GetAdcFreq
* Description : Gets the clock frequency for ADC module
* This function gets the clock frequency for ADC moudle.
*
*END**************************************************************************/
uint32_t CLOCK_SYS_GetAdcFreq(uint32_t instance)
{
uint32_t freq = 0;
uint32_t divider;
CLOCK_SYS_GetFreq(kOsc0ErClock, &freq);
divider = OSC_HAL_GetExternalRefClkDivCmd(g_oscBaseAddr[0]);
freq = freq >> divider; /* 2 bits divider, divide by 1/2/4/8 */
return freq;
}
/*FUNCTION****************************************************************
*
* Function Name: enet_mac_mii_init
* Return Value: The execution status.
* Description:Initialize the ENET Mac mii(mdc/mdio)interface.
*END*********************************************************************/
uint32_t enet_mac_mii_init(enet_dev_if_t * enetIfPtr)
{
uint32_t frequency;
/* Check the input parameters*/
if (enetIfPtr == NULL)
{
return kStatus_ENET_InvalidInput;
}
/* Configure mii speed*/
CLOCK_SYS_GetFreq(kSystemClock, &frequency);
enet_hal_config_mii(enetIfPtr->deviceNumber, (frequency/(2 * enetIfPtr->macCfgPtr->miiClock) + 1),
kEnetMdioHoldOneClkCycle, false);
return kStatus_ENET_Success;
}
/*FUNCTION**********************************************************************
*
* Function Name : SAI_DRV_RxConfigDataFormat
* Description :Configure audio format information of rx.
* The audio format information includes the sample rate, data length and so on.
*END**************************************************************************/
sai_status_t SAI_DRV_RxConfigDataFormat(uint32_t instance, sai_data_format_t *format)
{
uint32_t reg_base = g_saiBaseAddr[instance];
memcpy(&sai_state_ids[instance][1]->format, format, sizeof(sai_data_format_t));
if(sai_state_ids[instance][1]->master_slave == kSaiMaster)
{
uint32_t frequency = 0;
uint32_t bclk = format->sample_rate * format->bits * 2;
uint8_t divider;
if(SAI_HAL_RxGetBclkSrc(reg_base) == 0)
{
divider = (CLOCK_SYS_GetSaiFreq(instance))/bclk;
}
else
{
divider = format->mclk/bclk;
}
/* Get the clock source frequency */
CLOCK_SYS_GetFreq(kSystemClock,&frequency);
/* Configure master clock */
SAI_HAL_SetMclkDiv(reg_base, format->mclk, frequency);
/* Master clock and bit clock setting */
SAI_HAL_RxSetBclkDiv(reg_base, divider);
}
SAI_HAL_RxSetFrameSyncWidth(reg_base, format->bits);
/* Frmae size and word size setting */
SAI_HAL_RxSetFirstWordSize(reg_base, format->bits);
SAI_HAL_RxSetWordSize(reg_base, format->bits);
SAI_HAL_RxSetWordStartIndex(reg_base, 0);
SAI_HAL_RxSetFirstBitShifted(reg_base, format->bits);
/* The chennl number configuration */
if (format->mono_streo == kSaiMono)
{
SAI_HAL_RxSetWordMask(reg_base, 2u);
}
else
{
SAI_HAL_RxSetWordMask(reg_base, 0u);
}
return kStatus_SAI_Success;
}
/*FUNCTION**********************************************************************
*
* Function Name : HWTIMER_SYS_GetPeriod
* Description : The function returns current period of the timer in
* microseconds calculated from the base frequency and actual divider settings
* of the timer.
*
*END**************************************************************************/
uint32_t HWTIMER_SYS_GetPeriod(hwtimer_t *hwtimer)
{
uint32_t clockFreq;
uint32_t period;
/* Check input parameters */
if (NULL == hwtimer)
{
return 0U;
}
/* Obtain clock source clock frequency.*/
if (kClockManagerSuccess != CLOCK_SYS_GetFreq(hwtimer->clockName, &clockFreq))
{
return 0U;
}
assert(0U != clockFreq);
assert(hwtimer->divider <= clockFreq);
/* Divider is always less than clockFreq */
period = ((uint64_t)1000000U * hwtimer->divider) / clockFreq;
return period;
}
/*FUNCTION**********************************************************************
*
* Function Name : HWTIMER_SYS_GetFreq
* Description : The function returns current frequency of the timer
* calculated from the base frequency and actual divider settings of the timer
* or zero in case of an error.
*
*END**************************************************************************/
uint32_t HWTIMER_SYS_GetFreq(hwtimer_t *hwtimer)
{
uint32_t clockFreq;
/* Check input parameters */
if (NULL == hwtimer)
{
return 0U;
}
/* Uninitialized hwtimer contains value of 0 for divider */
if (0U == hwtimer->divider)
{
return 0U;
}
/* Obtain clock source clock frequency.*/
if (kClockManagerSuccess != CLOCK_SYS_GetFreq(hwtimer->clockName, &clockFreq))
{
return 0U;
}
return clockFreq / hwtimer->divider;
}
/*FUNCTION**********************************************************************
*
* Function Name : HWTIMER_SYS_SetPeriod
* Description : The function provides an alternate way to set up the timer to
* desired period specified in microseconds rather than to frequency in Hz.
*
*END**************************************************************************/
_hwtimer_error_code_t HWTIMER_SYS_SetPeriod(hwtimer_t *hwtimer, clock_names_t clockName, uint32_t period)
{
uint32_t clockFreq;
uint64_t divider;
/* Check input parameters */
if ((NULL == hwtimer) || (0U == period))
{
return kHwtimerInvalidInput;
}
if (NULL == hwtimer->devif)
{
return kHwtimerInvalidPointer;
}
/* Store clock_id in struct. */
hwtimer->clockName = clockName;
/* Find out input frequency*/
if ( kClockManagerSuccess != CLOCK_SYS_GetFreq(clockName, &clockFreq))
{
return kHwtimerClockManagerError;
}
divider = (((uint64_t)clockFreq * period)) / 1000000U ;
/* If required frequency is higher than input clock frequency, we set divider 1 (for setting the highest possible frequency) */
if (0U == divider)
{
divider = 1U;
}
/* if divider is greater than 32b value we set divider to max 32b value */
else if (divider & 0xFFFFFFFF00000000U)
{
divider = 0xFFFFFFFFU;
}
assert(NULL != hwtimer->devif->setDiv);
return hwtimer->devif->setDiv(hwtimer, (uint32_t)divider);
}
/*FUNCTION**********************************************************************
*
* Function Name : CLOCK_SYS_GetEnetRmiiFreq
* Description : Gets the clock frequency for ENET module RMII clock.
* This function gets the clock frequency for ENET moudle RMII clock.
*
*END**************************************************************************/
uint32_t CLOCK_SYS_GetEnetRmiiFreq(uint32_t instance)
{
(void) instance;
uint32_t freq = 0;
uint8_t setting;
clock_names_t clockName;
/* get the sim clock source setting*/
if (CLOCK_HAL_GetSource(g_simBaseAddr[0], kClockRmiiSrc, &setting) != kSimHalSuccess)
{
return freq;
}
if ((sim_rmii_clock_source_t)setting == kSimRmiiSrcExtalClk)
{
clockName = kEXTAL_Clock;
}
else
{
clockName = kENET_1588_CLKIN;
}
CLOCK_SYS_GetFreq(clockName, &freq);
return freq;
}
/*******************************************************************************
* Main function for application.
******************************************************************************/
void lab2_power(void)
{
demo_power_modes_t testVal = kDemoRun;
volatile uint8_t powerMode;
uint8_t clockManagerMode = CLOCK_RUN;
uint32_t freq = 0;
//*******************************************************
//* Step 1: Initialize the Clock Manager configurations.
//*******************************************************
// Create list of supported clock configurations. These are taken from the
// board.c file and will be passed into CLOCK_SYS_Init().
clock_manager_user_config_t const *clockConfigs[] =
{
NULL,
&g_defaultClockConfigVlpr,
&g_defaultClockConfigRun,
&g_defaultClockConfigHsrun,
};
//*****************************************************
//* Step 2: Configure Clock Manager callback function.
//*****************************************************
// Clock Manager callback function.
clock_manager_callback_user_config_t clockManagerCallbackCfg =
{
.callback = clockManagerCallback,
.callbackType = kClockManagerCallbackBeforeAfter,
.callbackData = NULL
};
clock_manager_callback_user_config_t *clockCallbacks[] =
{
&clockManagerCallbackCfg
};
//*****************************************************
//* Step 3: Initialize the Clock Manager.
//*****************************************************
// Pass in configuration and callback data to Clock Manager.
CLOCK_SYS_Init(clockConfigs,
CLOCK_NUMBER_OF_CONFIGURATIONS,
clockCallbacks,
ARRAY_SIZE(clockCallbacks));
// Set to RUN mode.
CLOCK_SYS_UpdateConfiguration(CLOCK_RUN, kClockManagerPolicyForcible);
//*****************************************************
//* Step 4: Set up supported power mode structures.
//*****************************************************
const power_manager_user_config_t runConfig =
{
.mode = kPowerManagerRun,
.sleepOnExitValue = false,
};
power_manager_user_config_t hsrunConfig = runConfig;
hsrunConfig.mode = kPowerManagerHsrun;
power_manager_user_config_t waitConfig = runConfig;
waitConfig.mode = kPowerManagerWait;
power_manager_user_config_t stopConfig = runConfig;
stopConfig.mode = kPowerManagerStop;
power_manager_user_config_t vlprConfig = runConfig;
vlprConfig.mode = kPowerManagerVlpr;
power_manager_user_config_t vlpwConfig = runConfig;
vlpwConfig.mode = kPowerManagerVlpw;
power_manager_user_config_t vlpsConfig = runConfig;
vlpsConfig.mode = kPowerManagerVlps;
power_manager_user_config_t lls3Config = runConfig;
lls3Config.mode = kPowerManagerLls3;
power_manager_user_config_t vlls0Config = runConfig;
vlls0Config.mode = kPowerManagerVlls0;
//***********************************************************
//* Step 5: Configure managed power configurations structure.
//***********************************************************
// Create the list of supported modes to pass into the Power Manager.
power_manager_user_config_t const *powerConfigs[] =
{
&runConfig,
&hsrunConfig,
&waitConfig,
&stopConfig,
&vlprConfig,
&vlpwConfig,
&vlpsConfig,
&lls3Config,
&vlls0Config
};
//*****************************************************
//* Step 6: Configure Power Manager callback function.
//*****************************************************
// Initializes callback configuration structure for the Power Manager.
power_manager_callback_user_config_t powerManagerCallbackCfg =
{
.callback = powerManagerCallback,
.callbackType = kPowerManagerCallbackBeforeAfter,
.callbackData = NULL
};
// Initializes array of pointers to power manager callbacks.
power_manager_callback_user_config_t *powerCallbacks[] =
{
&powerManagerCallbackCfg
};
//*****************************************************
//* Step 7: Initialize the Power Manager.
//*****************************************************
// Pass power configurations and callback info to Power Manager.
POWER_SYS_Init(powerConfigs,
sizeof(powerConfigs) / sizeof(power_manager_user_config_t *),
powerCallbacks,
ARRAY_SIZE(powerCallbacks));
// Initialize system to RUN mode.
powerMode = kDemoRun - kDemoMin - 1;
POWER_SYS_SetMode(powerMode, kPowerManagerPolicyAgreement);
//**************************************************************
//* Step 8: Configure the rest of the chip for this application.
//**************************************************************
// Configure pin mux for UART functionality.
configure_uart_pins(BOARD_DEBUG_UART_INSTANCE);
// Initializes GPIO driver for LEDs and buttons
GPIO_DRV_Init(switchPins, ledPins);
// Initialize the debug UART console.
DbgConsole_Init(BOARD_DEBUG_UART_INSTANCE, BOARD_LOW_POWER_UART_BAUD,
kDebugConsoleUART);
// Enable PORTC clock for GPIO/LLWU interrupt.
CLOCK_SYS_EnablePortClock(2);
// Enables falling edge interrupt for switch SW2.
PORT_HAL_SetMuxMode(BOARD_SW_LLWU_BASE, BOARD_SW_LLWU_PIN, kPortMuxAsGpio);
PORT_HAL_SetPinIntMode(BOARD_SW_LLWU_BASE, BOARD_SW_LLWU_PIN, kPortIntFallingEdge);
// Enable GPIO interrupt.
INT_SYS_EnableIRQ(PORTC_IRQn);
// Configure the LLWU.
LLWU_HAL_ClearExternalPinWakeupFlag(LLWU, BOARD_SW_LLWU_EXT_PIN);
LLWU_HAL_SetExternalInputPinMode(LLWU, kLlwuExternalPinFallingEdge, BOARD_SW_LLWU_EXT_PIN);
// Enable LLWU interrupt.
INT_SYS_EnableIRQ(LLWU_IRQn);
// Main loop.
while (1)
{
// Get the system clock frequency and current clock configuration to print out.
CLOCK_SYS_GetFreq(kCoreClock, &freq);
clockManagerMode = CLOCK_SYS_GetCurrentConfiguration();
PRINTF("\n\r#################### Power Manager Demo ####################\n\n\r");
PRINTF(" Core Clock = %d MHz \n\r", freq / 1000000);
PRINTF(" Current Mode = ");
switch(clockManagerMode)
{
case CLOCK_RUN:
PRINTF("RUN\n\r");
break;
case CLOCK_VLPR:
PRINTF("VLPR\n\r");
break;
case CLOCK_HSRUN:
PRINTF("HSRUN\n\r");
break;
}
PRINTF("\n\rSelect the desired operation \n\n\r");
PRINTF("Press %c for enter: RUN - Normal RUN mode\n\r", kDemoRun);
PRINTF("Press %c for enter: HSRUN - High Speed RUN mode\n\r", kDemoHsRun);
PRINTF("Press %c for enter: Wait - Wait mode\n\r", kDemoWait);
PRINTF("Press %c for enter: Stop - Stop mode\n\r", kDemoStop);
PRINTF("Press %c for enter: VLPR - Very Low Power Run mode\n\r", kDemoVlpr);
PRINTF("Press %c for enter: VLPW - Very Low Power Wait mode\n\r", kDemoVlpw);
PRINTF("Press %c for enter: VLPS - Very Low Power Stop mode\n\r", kDemoVlps);
PRINTF("Press %c for enter: LLS3 - Low Leakage Stop mode\n\r", kDemoLls3);
PRINTF("Press %c for enter: VLLS0 - Very Low Leakage Stop mode 0\n\r", kDemoVlls0);
//PRINTF("Press %c for enter: VLLS3 - Very Low Leakage Stop mode 3\n\r", kDemoVlls3);
PRINTF("\n\rWaiting for key press...\n\r\n\r");
// Wait for user input.
testVal = (demo_power_modes_t)GETCHAR();
if ((testVal >= 'a') && (testVal <= 'z'))
{
testVal -= 'a' - 'A';
}
if (testVal > kDemoMin && testVal < kDemoMax)
{
// Obtain Power Manager readable version of the value passed in.
powerMode = testVal - kDemoMin - 1;
// Switch to selected mode.
switch (testVal)
{
case kDemoRun:
if (POWER_SYS_GetCurrentMode() == kPowerManagerRun)
{
PRINTF("Run mode already active.\n\r");
break;
}
// Update the power configuration.
POWER_SYS_SetMode(powerMode, kPowerManagerPolicyAgreement);
// Update the clock configuration.
CLOCK_SYS_UpdateConfiguration(CLOCK_RUN, kClockManagerPolicyAgreement);
break;
case kDemoHsRun:
if (POWER_SYS_GetCurrentMode() == kPowerManagerHsrun)
{
PRINTF("High Speed Run mode already active.\n\r");
break;
}
// Update the power configuration.
POWER_SYS_SetMode(powerMode, kPowerManagerPolicyAgreement);
// Update the clock configuration.
CLOCK_SYS_UpdateConfiguration(CLOCK_HSRUN, kClockManagerPolicyAgreement);
break;
case kDemoWait:
if (POWER_SYS_GetCurrentMode() == kPowerManagerVlpr)
{
PRINTF("Cannot go from VLPR to WAIT directly...\n\r");
break;
}
if (POWER_SYS_GetCurrentMode() == kPowerManagerHsrun)
{
PRINTF("Cannot go from HSRUN to WAIT directly...\n\r");
break;
}
PRINTF("Entering WAIT mode. Press SW2 to wake...\n\r");
// Update the power configuration.
POWER_SYS_SetMode(powerMode, kPowerManagerPolicyAgreement);
break;
case kDemoStop:
if (POWER_SYS_GetCurrentMode() == kPowerManagerVlpr)
{
PRINTF("Cannot go from VLPR to STOP directly...\n\r");
break;
}
if (POWER_SYS_GetCurrentMode() == kPowerManagerHsrun)
{
PRINTF("Cannot go from HSRUN to STOP directly...\n\r");
break;
}
PRINTF("Entering STOP mode. Press SW2 to wake...\n\r");
// Update the power configuration.
POWER_SYS_SetMode(powerMode, kPowerManagerPolicyAgreement);
// Update the clock configuration.
CLOCK_SYS_UpdateConfiguration(clockManagerMode, kClockManagerPolicyAgreement);
break;
case kDemoVlpr:
if (POWER_SYS_GetCurrentMode() == kPowerManagerHsrun)
{
PRINTF("Cannot go from HSRUN to VLPR directly...\n\r");
break;
}
if(POWER_SYS_GetCurrentMode() != kPowerManagerVlpr)
{
// Update the clock configuration PRIOR to entering VLPR.
CLOCK_SYS_UpdateConfiguration(CLOCK_VLPR, kClockManagerPolicyAgreement);
// Update the power configuration.
POWER_SYS_SetMode(powerMode, kPowerManagerPolicyAgreement);
}
else
{
PRINTF("Very Low Power Run mode already active.\n\r");
}
break;
case kDemoVlpw:
if (POWER_SYS_GetCurrentMode() == kPowerManagerRun)
{
PRINTF("Cannot go from RUN to VLPW directly...\n\r");
break;
}
if (POWER_SYS_GetCurrentMode() == kPowerManagerHsrun)
{
PRINTF("Cannot go from HSRUN to VLPW directly...\n\r");
break;
}
PRINTF("Entering VLPW mode. Press SW2 to wake...\n\r");
// Update the power configuration.
POWER_SYS_SetMode(powerMode, kPowerManagerPolicyAgreement);
break;
case kDemoVlps:
if (POWER_SYS_GetCurrentMode() == kPowerManagerHsrun)
{
PRINTF("Cannot go from HSRUN to VLPS directly...\n\r");
break;
}
PRINTF("Entering VLPS mode. Press SW2 to wake...\n\r");
// Update the power configuration.
POWER_SYS_SetMode(powerMode, kPowerManagerPolicyAgreement);
// If we entered via RUN mode, restore clock settings.
if (POWER_SYS_GetCurrentMode() == kPowerManagerRun)
{
CLOCK_SYS_UpdateConfiguration(clockManagerMode, kClockManagerPolicyAgreement);
}
break;
case kDemoLls3:
if (POWER_SYS_GetCurrentMode() == kPowerManagerHsrun)
{
PRINTF("Cannot go from HSRUN to LLSx directly...\n\r");
break;
}
PRINTF("Entering LLS3 mode. Press SW2 to wake...\n\r");
// Update the power configuration.
POWER_SYS_SetMode(powerMode, kPowerManagerPolicyAgreement);
// Check the mode active mode prior to LLS3 entry.
if(POWER_SYS_GetCurrentMode() != kPowerManagerVlpr)
{
CLOCK_SYS_UpdateConfiguration(clockManagerMode, kClockManagerPolicyAgreement);
}
break;
case kDemoVlls0:
if (POWER_SYS_GetCurrentMode() == kPowerManagerHsrun)
{
PRINTF("Cannot go from HSRUN to VLLSx directly...\n\r");
break;
}
PRINTF("Press SW2 to wake. VLLSx wake goes through RESET sequence.\n\r");
// Update the power configuration.
POWER_SYS_SetMode(powerMode, kPowerManagerPolicyAgreement);
break;
default:
PRINTF("Bad value.");
break;
}
PRINTF("\n\rNext loop\n\r");
}
}
}
void task_lpm(task_param_t param)
{
demo_power_modes_t testVal;
uint8_t cmConfigMode = CLOCK_RUN;
uint8_t mode;
power_manager_error_code_t ret;
uint32_t freq = 0;
rtc_datetime_t date;
memset(&date, 0, sizeof(rtc_datetime_t));
memset(&cmCallbackData, 0, sizeof(lptmrStructure_t));
cmCallbackData.instance = PM_RTOS_DEMO_LPTMR_FUNC_INSTANCE;
lptmr_user_config_t *lptmrUserConfig = &(cmCallbackData.lptmrUserConfig);
lptmr_state_t *lptmrState = &(cmCallbackData.lptmrState);
CLOCK_SYS_Init(g_defaultClockConfigurations,
CLOCK_NUMBER_OF_CONFIGURATIONS,
cm_callback_tbl,
cm_callback_tbl_size);
CLOCK_SYS_UpdateConfiguration(cmConfigMode, kClockManagerPolicyForcible);
// Set a start date time and start RTC
date.year = 2014;
date.month = 4U;
date.day = 30U;
date.hour = 14U;
date.minute = 0U;
date.second = 0U;
rtcInit(PM_RTOS_DEMO_RTC_FUNC_INSTANCE, &date);
lptmrUserConfig->timerMode = kLptmrTimerModeTimeCounter; // Use LPTMR in Time Counter mode
lptmrUserConfig->freeRunningEnable = false; // When hit compare value, set counter back to zero
lptmrUserConfig->prescalerEnable = false; // bypass prescaler
lptmrUserConfig->prescalerClockSource = kClockLptmrSrcLpoClk; // use 1kHz Low Power Clock
lptmrUserConfig->isInterruptEnabled = false;
lptmrInit(lptmrUserConfig, lptmrState);
// initialize power manager driver
POWER_SYS_Init(powerConfigs,
powerConfigsSize,
pm_callback_tbl,
pm_callback_tbl_size);
// Enables LLWU interrupt
INT_SYS_EnableIRQ(LLWU_IRQn);
#if (defined FSL_RTOS_BM)
PRINTF("\n\r#################### Power Manager BM Demo ####################\n\n\r");
#elif (defined FSL_RTOS_FREE_RTOS)
PRINTF("\n\r#################### Power Manager FreeRTOS Demo ####################\n\n\r");
#elif (defined FSL_RTOS_MQX)
PRINTF("\n\r#################### Power Manager MQX Demo ####################\n\n\r");
#elif (defined FSL_RTOS_UCOSII)
PRINTF("\n\r#################### Power Manager Ucosii Demo ####################\n\n\r");
#elif (defined FSL_RTOS_UCOSIII)
PRINTF("\n\r#################### Power Manager Ucosiii Demo ####################\n\n\r");
#else
PRINTF("\n\rUnknown RTOS\n\n\r");
#endif
while (1)
{
mode = 0;
CLOCK_SYS_GetFreq(kCoreClock, &freq);
PRINTF(" Core Clock = %luHz \n\r", freq);
displayPowerMode();
PRINTF("\n\rSelect the desired operation \n\n\r");
PRINTF("Press %c for enter: RUN - Normal RUN mode\n\r",kDemoRun);
PRINTF("Press %c for enter: Wait - Wait mode\n\r",kDemoWait);
PRINTF("Press %c for enter: Stop - Stop mode\n\r",kDemoStop);
PRINTF("Press %c for enter: VLPR - Very Low Power Run mode\n\r",kDemoVlpr);
PRINTF("Press %c for enter: VLPW - Very Low Power Wait mode\n\r",kDemoVlpw);
PRINTF("Press %c for enter: VLPS - Very Low Power Stop mode\n\r",kDemoVlps);
PRINTF("Press %c for enter: LLS - Low Leakage Stop mode\n\r",kDemoLls);
PRINTF("Press %c for enter: VLLS1 - Very Low Leakage Stop 1 mode\n\r",kDemoVlls1);
PRINTF("Press %c for enter: VLLS2 - Very Low Leakage Stop 2 mode\n\r",kDemoVlls2);
PRINTF("Press %c for enter: VLLS3 - Very Low Leakage Stop 3 mode\n\r",kDemoVlls3);
PRINTF("Press %c to get current chip temperature\n\r",KDemoADC);
PRINTF("------------------------------------------------------------\n\r");
PRINTF("\n\rWaiting for key press..\n\r\n\r");
// Wait for user response
testVal = (demo_power_modes_t)getInput();
PRINTF("You pressed: '%c'\r\n", testVal);
// convert lower to upper character.
if(testVal > kDemoMax)
{
testVal = (demo_power_modes_t)(testVal + 'A' - 'a');
}
mode = testVal - kDemoMin - 1;
switch (testVal)
{
case kDemoWait:
if (POWER_SYS_GetCurrentMode() == kPowerManagerVlpr)
{
PRINTF("Can not go from VLPR to WAIT directly\n\r");
break;
}
setWakeUpSource(selectWakeUpSource(testVal),"Wait mode");
ret = POWER_SYS_SetMode(mode, kPowerManagerPolicyAgreement);
CHECK_RET_VAL(ret, mode);
break;
case kDemoStop:
if (POWER_SYS_GetCurrentMode() == kPowerManagerVlpr)
{
PRINTF("Can not go from VLPR to STOP directly\n\r");
break;
}
setWakeUpSource(selectWakeUpSource(testVal),"Stop mode");
ret = POWER_SYS_SetMode(mode, kPowerManagerPolicyAgreement);
CHECK_RET_VAL(ret, mode);
// update Clock Mode
update_clock_mode(CLOCK_RUN);
break;
case kDemoVlpr:
if(kPowerManagerVlpr != POWER_SYS_GetCurrentMode())
{
/*
If apps default CM config mode is not VLPR, but needs to enter VLPR, and real CM config
is not VLPR, then we need to update it to VLPR mode here. Otherwise pass through.
*/
update_clock_mode(CLOCK_VLPR);
PRINTF("Entering Very Low Power Run mode\n\r");
ret = POWER_SYS_SetMode(mode, kPowerManagerPolicyAgreement);
CHECK_RET_VAL(ret, mode);
}
else
{
PRINTF("Very Low Power Run mode already active\n\r");
}
break;
case kDemoVlpw:
if (POWER_SYS_GetCurrentMode() == kPowerManagerRun)
{
PRINTF("Can not go from RUN to VLPW directly\n\r");
break;
}
setWakeUpSource(selectWakeUpSource(testVal),"Very Low Wait mode");
ret = POWER_SYS_SetMode(mode, kPowerManagerPolicyAgreement);
if (POWER_SYS_GetCurrentMode() == kPowerManagerRun)
{
// update Clock Mode to Run
update_clock_mode(CLOCK_RUN);
}
CHECK_RET_VAL(ret, mode);
break;
case kDemoVlps:
setWakeUpSource(selectWakeUpSource(testVal),"Very Low Power Stop mode");
ret = POWER_SYS_SetMode(mode, kPowerManagerPolicyAgreement);
if (POWER_SYS_GetCurrentMode() == kPowerManagerRun)
{
// update Clock Mode to Run
update_clock_mode(CLOCK_RUN);
}
CHECK_RET_VAL(ret, mode);
break;
case kDemoLls:
setWakeUpSource(selectWakeUpSource(testVal),"Low Leakage Stop mode");
ret = POWER_SYS_SetMode(mode, kPowerManagerPolicyAgreement);
// Check the mode LLS was entered
if(kPowerManagerVlpr != POWER_SYS_GetCurrentMode())
{
update_clock_mode(CLOCK_RUN);
}
CHECK_RET_VAL(ret, mode);
break;
case kDemoVlls1:
setWakeUpSource(selectWakeUpSource(testVal),"Very Low Leakage Stop 1 mode");
PRINTF("Wake up goes through Reset sequence.\n\r");
ret = POWER_SYS_SetMode(mode, kPowerManagerPolicyAgreement);
CHECK_RET_VAL(ret, mode);
break;
case kDemoVlls2:
setWakeUpSource(selectWakeUpSource(testVal),"Very Low Leakage Stop 2 mode");
PRINTF("Wake up goes through Reset sequence.\n\r");
ret = POWER_SYS_SetMode(mode, kPowerManagerPolicyAgreement);
CHECK_RET_VAL(ret, mode);
break;
case kDemoVlls3:
setWakeUpSource(selectWakeUpSource(testVal),"Very Low Leakage Stop 3 mode");
PRINTF("Wake up goes through Reset sequence.\n\r");
ret = POWER_SYS_SetMode(mode, kPowerManagerPolicyAgreement);
CHECK_RET_VAL(ret, mode);
break;
case kDemoRun:
ret = POWER_SYS_SetMode(mode, kPowerManagerPolicyAgreement);
if (ret != kPowerManagerSuccess)
{
PRINTF("POWER_SYS_SetMode(%u) returned unexpected status : %u\n\r",mode,ret);
}
else
{
update_clock_mode(CLOCK_RUN);
}
break;
case KDemoADC:
adc16PrintTemperature();
break;
default:
break;
}
PRINTF("\n\rNext loop\n\r\n\r");
}
}
/*FUNCTION**********************************************************************
*
* Function Name : CLOCK_SYS_GetEwmFreq
* Description : Gets the clock frequency for Ewm module
* This function gets the clock frequency for Ewm moudle.
*
*END**************************************************************************/
uint32_t CLOCK_SYS_GetEwmFreq(uint32_t instance)
{
uint32_t freq = 0;
CLOCK_SYS_GetFreq(kLpoClock, &freq);
return freq;
}
void spi_frequency(spi_t *obj, int hz) {
uint32_t busClock;
CLOCK_SYS_GetFreq(kBusClock, &busClock);
DSPI_HAL_SetBaudRate(obj->spi.address, kDspiCtar0, (uint32_t)hz, busClock);
}
/*!
* @brief main demo function.
*/
int main(void) {
demo_power_modes_t testVal = kDemoRun;
uint8_t mode;
power_manager_error_code_t ret = kPowerManagerSuccess;
uint32_t freq = 0;
rtc_datetime_t date =
{
.year = 2014U,
.month = 4U,
.day = 30U,
.hour = 14U,
.minute = 0U,
.second = 0U,
};
// Example of constant configuration
// It may save the space in RAM
const power_manager_user_config_t vlprConfig = {
.mode = kPowerManagerVlpr,
.sleepOnExitValue = false,
};
power_manager_user_config_t vlpwConfig = vlprConfig;
power_manager_user_config_t vlls0Config = vlprConfig;
power_manager_user_config_t vlls1Config = vlprConfig;
power_manager_user_config_t vlls2Config = vlprConfig;
power_manager_user_config_t vlls3Config = vlprConfig;
power_manager_user_config_t llsConfig = vlprConfig;
power_manager_user_config_t vlpsConfig = vlprConfig;
power_manager_user_config_t waitConfig = vlprConfig;
power_manager_user_config_t stopConfig = vlprConfig;
power_manager_user_config_t runConfig = vlprConfig;
power_manager_user_config_t hsrunConfig =
{
.mode = kPowerManagerHsrun,
};
// Initializes array of pointers to power manager configurations
power_manager_user_config_t const *powerConfigs[] =
{
&runConfig,
&waitConfig,
&stopConfig,
&vlprConfig,
&vlpwConfig,
&vlpsConfig,
&llsConfig,
&vlls0Config,
&vlls1Config,
&vlls2Config,
&vlls3Config,
&hsrunConfig
};
// User callback data
user_callback_data_t callbackData0;
// Initializes callback configuration structure for power manager
power_manager_callback_user_config_t callbackCfg0 = { callback0,
kPowerManagerCallbackBeforeAfter,
(power_manager_callback_data_t*) &callbackData0 };
// Initializes array of pointers to power manager callbacks
power_manager_callback_user_config_t * callbacks[] =
{ &callbackCfg0 };
// Initializes hardware
hardware_init();
// Make the current Clock Manager mode configuration 1 (default configuration)
/* Set clock configurations to clock manager. */
CLOCK_SYS_Init(g_defaultClockConfigurations, CLOCK_NUMBER_OF_CONFIGURATIONS,
clockCallbackTable, ARRAY_SIZE(clockCallbackTable));
CLOCK_SYS_UpdateConfiguration(CLOCK_RUN, kClockManagerPolicyForcible);
// select the 1Hz for RTC_CLKOUT
CLOCK_SYS_SetRtcOutSrc(kClockRtcoutSrc1Hz);
/* Enable clock gate to RTC module */
CLOCK_SYS_EnableRtcClock( 0U);
/* Initialize the general configuration for RTC module.*/
RTC_HAL_Init(RTC_BASE_PTR);
/* Need to check this here as the RTC_HAL_Init() may have issued a software reset on the
* module clearing all prior RTC OSC related setup */
if (!(RTC_HAL_IsOscillatorEnabled(RTC_BASE_PTR)))
{
BOARD_InitRtcOsc();
}
/* Enable the RTC Clock output */
RTC_HAL_SetClockOutCmd(RTC_BASE_PTR, true);
NVIC_ClearPendingIRQ(RTC_IRQn);
INT_SYS_EnableIRQ(RTC_IRQn);
//RTC_DRV_SetDatetime(0, &date);
RTC_HAL_SetDatetime(RTC_BASE_PTR, &date);
// Initializes GPIO driver for LEDs and buttons
GPIO_DRV_Init(switchPins, ledPins);
memset(&callbackData0, 0, sizeof(user_callback_data_t));
// initializes configuration structures
vlpwConfig.mode = kPowerManagerVlpw;
// VLLS0 mode is supported only by some SOCs.
vlls0Config.mode = kPowerManagerVlls0;
vlls1Config.mode = kPowerManagerVlls1;
vlls2Config.mode = kPowerManagerVlls2;
vlls3Config.mode = kPowerManagerVlls3;
// LLS3 mode retains all ram content so CPU wake up doesn't go through restart sequence
llsConfig.mode = kPowerManagerLls3;
vlpsConfig.mode = kPowerManagerVlps;
waitConfig.mode = kPowerManagerWait;
stopConfig.mode = kPowerManagerStop;
runConfig.mode = kPowerManagerRun;
hsrunConfig.mode = kPowerManagerHsrun;
// initialize power manager driver
POWER_SYS_Init(powerConfigs,
sizeof(powerConfigs)/sizeof(power_manager_user_config_t *),
callbacks,
sizeof(callbacks)/sizeof(power_manager_callback_user_config_t *));
// Enables LLWU interrupt
INT_SYS_EnableIRQ(LLWU_IRQn);
mode = kDemoRun - kDemoMin - 1;
ret = POWER_SYS_SetMode(mode, kPowerManagerPolicyAgreement);
if (ret != kPowerManagerSuccess)
{
PRINTF("POWER_SYS_SetMode(%u) returned unexpected status : %u\r\n",mode,ret);
}
while (1)
{
mode = 0;
CLOCK_SYS_GetFreq(kCoreClock, &freq);
PRINTF("\r\n#################### Power Manager Demo ####################\r\n\r\n");
PRINTF(" Core Clock = %dHz \r\n", freq);
displayPowerMode();
PRINTF("\r\nSelect the desired operation \r\n\r\n");
PRINTF("Press %c for enter: RUN - Normal RUN mode\r\n",kDemoRun);
PRINTF("Press %c for enter: Wait - Wait mode\r\n",kDemoWait);
PRINTF("Press %c for enter: Stop - Stop mode\r\n",kDemoStop);
PRINTF("Press %c for enter: VLPR - Very Low Power Run mode\r\n",kDemoVlpr);
PRINTF("Press %c for enter: VLPW - Very Low Power Wait mode\r\n",kDemoVlpw);
PRINTF("Press %c for enter: VLPS - Very Low Power Stop mode\r\n",kDemoVlps);
PRINTF("Press %c for enter: LLS3 - Low Leakage Stop mode\r\n",kDemoLls);
PRINTF("Press %c for enter: VLLS0 - Very Low Leakage Stop 0 mode\r\n",kDemoVlls0);
PRINTF("Press %c for enter: VLLS1 - Very Low Leakage Stop 1 mode\r\n",kDemoVlls1);
PRINTF("Press %c for enter: VLLS2 - Very Low Leakage Stop 2 mode\r\n",kDemoVlls2);
PRINTF("Press %c for enter: VLLS3 - Very Low Leakage Stop 3 mode\r\n",kDemoVlls3);
PRINTF("Press %c for enter: HSRUN - High Speed RUN mode\r\n",kDemoHsRun);
PRINTF("\r\nWaiting for key press..\r\n\r\n");
// Wait for user response
testVal = (demo_power_modes_t)GETCHAR();
if ((testVal >= 'a') && (testVal <= 'z'))
{
testVal -= 'a' - 'A';
}
if (testVal > kDemoMin && testVal < kDemoMax)
{
mode = testVal - kDemoMin - 1;
switch (testVal)
{
case kDemoWait:
if (POWER_SYS_GetCurrentMode() == kPowerManagerVlpr)
{
PRINTF("Can not go from VLPR to WAIT directly\r\n");
break;
}
if (POWER_SYS_GetCurrentMode() == kPowerManagerHsrun)
{
PRINTF("Can not go from HSRUN to WAIT directly\r\n");
break;
}
setWakeUpSource(selectWakeUpSource(testVal),"Wait mode");
ret = POWER_SYS_SetMode(mode, kPowerManagerPolicyAgreement);
CHECK_RET_VAL(ret, mode);
break;
case kDemoStop:
if (POWER_SYS_GetCurrentMode() == kPowerManagerVlpr)
{
PRINTF("Can not go from VLPR to STOP directly\r\n");
break;
}
if (POWER_SYS_GetCurrentMode() == kPowerManagerHsrun)
{
PRINTF("Can not go from HSRUN to STOP directly\r\n");
break;
}
setWakeUpSource(selectWakeUpSource(testVal),"Stop mode");
ret = POWER_SYS_SetMode(mode, kPowerManagerPolicyAgreement);
CHECK_RET_VAL(ret, mode);
// update Clock Mode
update_clock_mode(CLOCK_RUN);
break;
case kDemoVlpr:
if (POWER_SYS_GetCurrentMode() == kPowerManagerHsrun)
{
PRINTF("Can not go from HSRUN to VLPR directly\r\n");
break;
}
if(kPowerManagerVlpr != POWER_SYS_GetCurrentMode())
{
/*
If apps default CM config mode is not VLPR, but needs to enter VLPR, and real CM config
is not VLPR, then we need to update it to VLPR mode here. Otherwise pass through.
*/
update_clock_mode(CLOCK_VLPR);
PRINTF("Entering Very Low Power Run mode\r\n");
ret = POWER_SYS_SetMode(mode, kPowerManagerPolicyAgreement);
CHECK_RET_VAL(ret, mode);
}
else
{
PRINTF("Very Low Power Run mode already active\r\n");
}
break;
case kDemoVlpw:
if (POWER_SYS_GetCurrentMode() == kPowerManagerRun)
{
PRINTF("Can not go from RUN to VLPW directly\r\n");
break;
}
if (POWER_SYS_GetCurrentMode() == kPowerManagerHsrun)
{
PRINTF("Can not go from HSRUN to VLPW directly\r\n");
break;
}
setWakeUpSource(selectWakeUpSource(testVal),"Very Low Wait mode");
ret = POWER_SYS_SetMode(mode, kPowerManagerPolicyAgreement);
CHECK_RET_VAL(ret, mode);
break;
case kDemoVlps:
if (POWER_SYS_GetCurrentMode() == kPowerManagerHsrun)
{
PRINTF("Can not go from HSRUN to VLPS directly\r\n");
break;
}
setWakeUpSource(selectWakeUpSource(testVal),"Very Low Power Stop mode");
ret = POWER_SYS_SetMode(mode, kPowerManagerPolicyAgreement);
if (POWER_SYS_GetCurrentMode() == kPowerManagerRun)
{
// update Clock Mode to Run
update_clock_mode(CLOCK_RUN);
}
CHECK_RET_VAL(ret, mode);
break;
case kDemoLls:
if (POWER_SYS_GetCurrentMode() == kPowerManagerHsrun)
{
PRINTF("Can not go from HSRUN to LLSx directly\r\n");
break;
}
setWakeUpSource(selectWakeUpSource(testVal),"Low Leakage Stop mode 3");
ret = POWER_SYS_SetMode(mode, kPowerManagerPolicyAgreement);
// Check the mode LLS was entered
if(kPowerManagerVlpr != POWER_SYS_GetCurrentMode())
{
update_clock_mode(CLOCK_RUN);
}
CHECK_RET_VAL(ret, mode);
break;
case kDemoVlls0:
if (POWER_SYS_GetCurrentMode() == kPowerManagerHsrun)
{
PRINTF("Can not go from HSRUN to VLLS0 directly\r\n");
break;
}
setWakeUpSource(selectWakeUpSource(testVal),"Very Low Leakage Stop 0 mode");
PRINTF("Wake up goes through Reset sequence.\r\n");
ret = POWER_SYS_SetMode(mode, kPowerManagerPolicyAgreement);
CHECK_RET_VAL(ret, mode);
break;
case kDemoVlls1:
if (POWER_SYS_GetCurrentMode() == kPowerManagerHsrun)
{
PRINTF("Can not go from HSRUN to VLLS1 directly\r\n");
break;
}
setWakeUpSource(selectWakeUpSource(testVal),"Very Low Leakage Stop 1 mode");
PRINTF("Wake up goes through Reset sequence.\r\n");
ret = POWER_SYS_SetMode(mode, kPowerManagerPolicyAgreement);
CHECK_RET_VAL(ret, mode);
break;
case kDemoVlls2:
if (POWER_SYS_GetCurrentMode() == kPowerManagerHsrun)
{
PRINTF("Can not go from HSRUN to VLLS2 directly\r\n");
break;
}
setWakeUpSource(selectWakeUpSource(testVal),"Very Low Leakage Stop 2 mode");
PRINTF("Wake up goes through Reset sequence.\r\n");
ret = POWER_SYS_SetMode(mode, kPowerManagerPolicyAgreement);
CHECK_RET_VAL(ret, mode);
break;
case kDemoVlls3:
if (POWER_SYS_GetCurrentMode() == kPowerManagerHsrun)
{
PRINTF("Can not go from HSRUN to VLLS3 directly\r\n");
break;
}
setWakeUpSource(selectWakeUpSource(testVal),"Very Low Leakage Stop 3 mode");
PRINTF("Wake up goes through Reset sequence.\r\n");
ret = POWER_SYS_SetMode(mode, kPowerManagerPolicyAgreement);
CHECK_RET_VAL(ret, mode);
break;
case kDemoRun:
/* Need to decrease clock frequence before back RUN mode from HSRUN */
if (POWER_SYS_GetCurrentMode() == kPowerManagerHsrun)
{
update_clock_mode(CLOCK_RUN);
}
ret = POWER_SYS_SetMode(mode, kPowerManagerPolicyAgreement);
if (ret != kPowerManagerSuccess)
{
PRINTF("POWER_SYS_SetMode(%u) returned unexpected status : %u\r\n",mode,ret);
}
else
{
update_clock_mode(CLOCK_RUN);
}
break;
case kDemoHsRun:
if (POWER_SYS_GetCurrentMode() == kPowerManagerVlpr)
{
PRINTF("Can not go from HSRUN to VLPR directly\r\n");
break;
}
ret = POWER_SYS_SetMode(mode, kPowerManagerPolicyAgreement);
if (ret != kPowerManagerSuccess)
{
PRINTF("POWER_SYS_SetMode(%u) returned unexpected status : %u\r\n",mode,ret);
}
else
{
update_clock_mode(CLOCK_HSRUN);
}
break;
default:
PRINTF("Wrong value");
break;
}
PRINTF("\r\nNext loop\r\n");
}
}
}
/*FUNCTION**********************************************************************
*
* Function Name : CLOCK_SYS_GetI2cFreq
* Description : Gets the clock frequency for I2C module.
* This function gets the clock frequency for I2C moudle.
*
*END**************************************************************************/
uint32_t CLOCK_SYS_GetI2cFreq(uint32_t instance)
{
uint32_t freq = 0;
CLOCK_SYS_GetFreq(kBusClock, &freq);
return freq;
}
/*FUNCTION**********************************************************************
*
* Function Name : CLOCK_SYS_GetVrefFreq
* Description : Gets the clock frequency for VREF module
* This function gets the clock frequency for VREF moudle.
*
*END**************************************************************************/
uint32_t CLOCK_SYS_GetVrefFreq(uint32_t instance)
{
uint32_t freq = 0;
CLOCK_SYS_GetFreq(kFlashClock, &freq);
return freq;
}
/*See fsl_ftm_driver.h for documentation of this function.*/
void FTM_DRV_PwmStart(uint8_t instance, ftm_pwm_param_t *param, uint8_t channel)
{
uint32_t uFTMhz;
uint16_t uMod, uCnv, uCnvFirstEdge = 0;
assert(instance < HW_FTM_INSTANCE_COUNT);
assert(param->uDutyCyclePercent <= 100);
assert(channel < FSL_FEATURE_FTM_CHANNEL_COUNTn(instance));
uint32_t ftmBaseAddr = g_ftmBaseAddr[instance];
/* Clear the overflow flag */
FTM_HAL_ClearTimerOverflow(g_ftmBaseAddr[instance]);
FTM_HAL_EnablePwmMode(ftmBaseAddr, param, channel);
#if FSL_FEATURE_FTM_BUS_CLOCK
CLOCK_SYS_GetFreq(kBusClock, &uFTMhz);
#else
CLOCK_SYS_GetFreq(kSystemClock, &uFTMhz);
#endif
/* Based on Ref manual, in PWM mode CNTIN is to be set 0*/
FTM_HAL_SetCounterInitVal(ftmBaseAddr, 0);
uFTMhz = uFTMhz / (1 << FTM_HAL_GetClockPs(ftmBaseAddr));
switch(param->mode)
{
case kFtmEdgeAlignedPWM:
uMod = uFTMhz / (param->uFrequencyHZ) - 1;
uCnv = uMod * param->uDutyCyclePercent / 100;
/* For 100% duty cycle */
if(uCnv >= uMod)
{
uCnv = uMod + 1;
}
FTM_HAL_SetMod(ftmBaseAddr, uMod);
FTM_HAL_SetChnCountVal(ftmBaseAddr, channel, uCnv);
break;
case kFtmCenterAlignedPWM:
uMod = uFTMhz / (param->uFrequencyHZ * 2);
uCnv = uMod * param->uDutyCyclePercent / 100;
/* For 100% duty cycle */
if(uCnv >= uMod)
{
uCnv = uMod + 1;
}
FTM_HAL_SetMod(ftmBaseAddr, uMod);
FTM_HAL_SetChnCountVal(ftmBaseAddr, channel, uCnv);
break;
case kFtmCombinedPWM:
uMod = uFTMhz / (param->uFrequencyHZ) - 1;
uCnv = uMod * param->uDutyCyclePercent / 100;
uCnvFirstEdge = uMod * param->uFirstEdgeDelayPercent / 100;
/* For 100% duty cycle */
if(uCnv >= uMod)
{
uCnv = uMod + 1;
}
FTM_HAL_SetMod(ftmBaseAddr, uMod);
FTM_HAL_SetChnCountVal(ftmBaseAddr, FTM_HAL_GetChnPairIndex(channel) * 2,
uCnvFirstEdge);
FTM_HAL_SetChnCountVal(ftmBaseAddr, FTM_HAL_GetChnPairIndex(channel) * 2 + 1,
uCnv + uCnvFirstEdge);
break;
default:
assert(0);
break;
}
/* Set clock source to start counter */
FTM_HAL_SetClockSource(ftmBaseAddr, kClock_source_FTM_SystemClk);
}