/*****************************************************************************
* FUNCTION: WFHardwareInit
*
* RETURNS: error code
*
* PARAMS: None
*
* NOTES: Initializes CPU Host hardware interfaces (SPI, External Interrupt).
* Also resets the MRF24W.
*****************************************************************************/
void WFHardwareInit(void)
{
UINT8 mask8;
UINT16 mask16;
g_MgmtReadMsgReady = FALSE;
g_ExIntNeedsServicing = FALSE;
RawMoveState.rawInterrupt = 0;
RawMoveState.waitingForRawMoveCompleteInterrupt = FALSE; /* not waiting for RAW move complete */
/* needed for Microchip PICTail (chip enable active low) */
WF_SetCE_N(WF_LOW); /* set low to enable regulator */
/* initialize the SPI interface */
WF_SpiInit();
ResetPll(); // needed until PLL fix made in A2 silicon
/* Reset the MRF24W (using SPI bus to write/read MRF24W registers */
ChipReset();
/* disable the interrupts gated by the 16-bit host int register */
HostInterrupt2RegInit(WF_HOST_2_INT_MASK_ALL_INT, (UINT16)WF_INT_DISABLE);
/* disable the interrupts gated the by main 8-bit host int register */
HostInterruptRegInit(WF_HOST_INT_MASK_ALL_INT, WF_INT_DISABLE);
/* Initialize the External Interrupt for the MRF24W allowing the MRF24W to interrupt */
/* the Host from this point forward. */
WF_EintInit();
WF_EintEnable();
/* enable the following MRF24W interrupts in the INT1 8-bit register */
mask8 = (WF_HOST_INT_MASK_FIFO_1_THRESHOLD | /* Mgmt Rx Msg interrupt */
WF_HOST_INT_MASK_FIFO_0_THRESHOLD | /* Data Rx Msg interrupt */
WF_HOST_INT_MASK_RAW_0_INT_0 | /* RAW0 Move Complete (Data Rx) interrupt */
WF_HOST_INT_MASK_RAW_1_INT_0 | /* RAW1 Move Complete (Data Tx) interrupt */
WF_HOST_INT_MASK_INT2); /* Interrupt 2 interrupt */
HostInterruptRegInit(mask8, WF_INT_ENABLE);
/* enable the following MRF24W interrupts in the INT2 16-bit register */
mask16 = (WF_HOST_INT_MASK_RAW_2_INT_0 | /* RAW2 Move Complete (Mgmt Rx) interrupt */
WF_HOST_INT_MASK_RAW_3_INT_0 | /* RAW3 Move Complete (Mgmt Tx) interrupt */
WF_HOST_INT_MASK_RAW_4_INT_0 | /* RAW4 Move Complete (Scratch) interrupt */
WF_HOST_INT_MASK_RAW_5_INT_0 | /* RAW5 Move Complete (Scratch) interrupt */
WF_HOST_INT_MASK_MAIL_BOX_0_WRT);
HostInterrupt2RegInit(mask16, WF_INT_ENABLE);
/* Disable PS-Poll mode */
WFConfigureLowPowerMode(WF_LOW_POWER_MODE_OFF);
}
/*****************************************************************************
* FUNCTION: ZGPrvComInit
*
* RETURNS: N/A
*
* PARAMS:
* N/A
*
*
* NOTES: Used to initialize the COM layer of this driver as well as to
* initialize the G2100 hardware. Function manages the call order of
* several other functions to clear the hw interrupt registers, reset
* the chip, enable the external interrupt driver and initialize the
* hw interrupt registers.
*****************************************************************************/
tZGVoidReturn ZGPrvComInit(tZGVoidInput)
{
COMCXT.state = kComStIdle;
COMCXT.bRdWtReady = kZGBoolFalse;
COMCXT.bIntServiceReq = kZGBoolFalse;
COMCXT.bLowPowerModeActive = kZGBoolFalse;
COMCXT.bLowPowerModeDesired = kZGBoolFalse;
/* set the bInitDevice to true so that
* the following functions capture the SPI
* done and prevent it from signaling the
* driver. */
COMCXT.bInitDevice = kZGBoolTrue;
COMCXT.rawInterrupt = 0;
COMCXT.enableRawIntr = 0;
/* initialize the SPI next so that it can
* be used by the ZGDriver to reset the
* G2100 and initialize the G2100 interrupt
* control registers. */
zgHALSpiInit();
/* Call function to - Reset the G2100 here */
ChipReset();
/* disable the interrupts gated by the 16-bit host int register */
HostInterrupt2RegInit(kZGCOMRegHost2IntMaskAllInt, kZGCOMIntDisable);
/* disable the interrupts gate the by main 8-bit host int register */
HostInterruptRegInit(kZGCOMRegHostIntMaskAllInt, kZGCOMIntDisable);
/* Now initialize the External Interrupt for
* the G2100 allowing the G2100 to interrupt
* the Host from this point forward. */
zgHALEintInit();
zgHALEintEnable();
/* enable the 2 read fifo interrupts for this driver */
HostInterruptRegInit((kZGCOMRegHostIntMaskFifo1Thresh | kZGCOMRegHostIntMaskFifo0Thresh | kZGCOMRegHostIntMaskRAW0Intr0 | kZGCOMRegHostIntMaskRAW1Intr0),
kZGCOMIntEnable);
/* NOTE: This is where additional host interrupts would be enabled */
/* Set the power mode active as last step of Init operation */
ChangeLowPowerMode(kZGBoolFalse);
/* read the G2100 Info Block */
ReadChipInfoBlock();
/* clear the bInitDevice so that announcements
* from the SPI driver will behave normally. */
COMCXT.bInitDevice = kZGBoolFalse;
}
/*****************************************************************************
* FUNCTION: WFHardwareInit
*
* RETURNS: error code
*
* PARAMS: None
*
* NOTES: Initializes CPU Host hardware interfaces (SPI, External Interrupt).
* Also resets the MRF24WB0M.
*****************************************************************************/
void WFHardwareInit(void)
{
g_MgmtReadMsgReady = FALSE;
g_ExIntNeedsServicing = FALSE;
RawMoveState.rawInterrupt = 0;
RawMoveState.waitingForRawMoveCompleteInterrupt = FALSE; /* not waiting for RAW move complete */
/* initialize the SPI interface */
WF_SpiInit();
/* Reset the MRF24WB0M (using SPI bus to write/read MRF24WB0M registers */
ChipReset();
/* disable the interrupts gated by the 16-bit host int register */
HostInterrupt2RegInit(WF_HOST_2_INT_MASK_ALL_INT, WF_INT_DISABLE);
/* disable the interrupts gated the by main 8-bit host int register */
HostInterruptRegInit(WF_HOST_INT_MASK_ALL_INT, WF_INT_DISABLE);
/* Initialize the External Interrupt for the MRF24WB0M allowing the MRF24WB0M to interrupt
* the Host from this point forward. */
WF_EintInit();
WF_EintEnable();
/* enable the following MRF24WB0M interrupts */
HostInterruptRegInit((WF_HOST_INT_MASK_FIFO_1_THRESHOLD | /* Mgmt Rx Msg interrupt */
WF_HOST_INT_MASK_FIFO_0_THRESHOLD | /* Data Rx Msg interrupt */
WF_HOST_INT_MASK_RAW_0_INT_0 | /* RAW0 Move Complete interrupt */
WF_HOST_INT_MASK_RAW_1_INT_0), /* RAW1 Move Complete interrupt */
WF_INT_ENABLE);
/* Disable PS-Poll mode */
WFConfigureLowPowerMode(WF_LOW_POWER_MODE_OFF);
}
/**
* Method is executed after CPU reset.
*/
void SystemPIO::resetDevice(int ticks)
{
currentTicks = ticks;
ChipReset(false);
}
/**
* Metoda je volana procesorom pri jeho resete.
*/
void RomModule::resetDevice(int ticks)
{
ChipReset(false);
}
/*****************************************************************************
* FUNCTION: WFHardwareInit
*
* RETURNS: error code
*
* PARAMS: None
*
* NOTES: Initializes CPU Host hardware interfaces (SPI, External Interrupt).
* Also resets the MRF24W.
*****************************************************************************/
void WFHardwareInit(void)
{
UINT8 mask8;
UINT16 mask16;
g_MgmtReadMsgReady = FALSE;
g_ExIntNeedsServicing = FALSE;
RawMoveState.rawInterrupt = 0;
RawMoveState.waitingForRawMoveCompleteInterrupt = FALSE; /* not waiting for RAW move complete */
/* initialize the SPI interface */
WF_SpiInit();
#if defined(__Digilent_Build__)
WF_SetRST_N(WF_LOW); // put module into reset; should already be there.
// we have taken out the next 3 lines as MarkW says we do not need to toggle HIB to competely reset the part.
// WF_SetCE_N(WF_HIGH); // disable module, turn off regulators
// DelayMs(200); // 200ms to allow decoupling caps to discharge, between the 70uF in the MRF , this can take some time.
// WF_SetCE_N(WF_LOW); // enable module, turn on regulators; careful this has an inrush that can drag the Power supply below min. if the MRF is not decoupled well enough.
DelayMs(2); // Spec says at least 1ms to let the regulators settle, leave this here to ensure timing from board powerup.
WF_SetRST_N(WF_HIGH); // take module out of of reset
DelayMs(5); // Per MarkW’s email, leave 5ms here before accessing the SPI port
#else
/* Toggle the module into and then out of hibernate */
WF_SetCE_N(WF_HIGH); /* disable module */
WF_SetCE_N(WF_LOW); /* enable module */
/* Toggle the module into and out of reset */
WF_SetRST_N(WF_LOW); // put module into reset
WF_SetRST_N(WF_HIGH); // take module out of of reset
#endif
/* Silicon work-around -- needed for A1 silicon to initialize PLL values correctly */
ResetPll();
/* Soft reset the MRF24W (using SPI bus to write/read MRF24W registers */
ChipReset();
/* disable the interrupts gated by the 16-bit host int register */
HostInterrupt2RegInit(WF_HOST_2_INT_MASK_ALL_INT, (UINT16)WF_INT_DISABLE);
/* disable the interrupts gated the by main 8-bit host int register */
HostInterruptRegInit(WF_HOST_INT_MASK_ALL_INT, WF_INT_DISABLE);
/* Initialize the External Interrupt for the MRF24W allowing the MRF24W to interrupt */
/* the Host from this point forward. */
WF_EintInit();
WF_EintEnable();
/* enable the following MRF24W interrupts in the INT1 8-bit register */
mask8 = (WF_HOST_INT_MASK_FIFO_1_THRESHOLD | /* Mgmt Rx Msg interrupt */
WF_HOST_INT_MASK_FIFO_0_THRESHOLD | /* Data Rx Msg interrupt */
WF_HOST_INT_MASK_RAW_0_INT_0 | /* RAW0 Move Complete (Data Rx) interrupt */
WF_HOST_INT_MASK_RAW_1_INT_0 | /* RAW1 Move Complete (Data Tx) interrupt */
WF_HOST_INT_MASK_INT2); /* Interrupt 2 interrupt */
HostInterruptRegInit(mask8, WF_INT_ENABLE);
/* enable the following MRF24W interrupts in the INT2 16-bit register */
mask16 = (WF_HOST_INT_MASK_RAW_2_INT_0 | /* RAW2 Move Complete (Mgmt Rx) interrupt */
WF_HOST_INT_MASK_RAW_3_INT_0 | /* RAW3 Move Complete (Mgmt Tx) interrupt */
WF_HOST_INT_MASK_RAW_4_INT_0 | /* RAW4 Move Complete (Scratch) interrupt */
WF_HOST_INT_MASK_RAW_5_INT_0 | /* RAW5 Move Complete (Scratch) interrupt */
WF_HOST_INT_MASK_MAIL_BOX_0_WRT);
HostInterrupt2RegInit(mask16, WF_INT_ENABLE);
/* Disable PS-Poll mode */
WFConfigureLowPowerMode(WF_LOW_POWER_MODE_OFF);
}