void
sl_reset_586(struct ie_softc *sc)
{
outb(PORT(sc) + IEATT_RESET, 0);
}
#include <linux/module.h>
#include <linux/init.h>
#include <linux/serial_8250.h>
#define PORT(base, int) \
{ \
.iobase = base, \
.irq = int, \
.uartclk = 1843200, \
.iotype = UPIO_PORT, \
.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, \
.regshift = 0, \
}
static struct plat_serial8250_port uart8250_data[] = {
PORT(0x3F8, 4),
PORT(0x2F8, 3),
PORT(0x3E8, 4),
PORT(0x2E8, 3),
{ },
};
static struct platform_device uart8250_device = {
.name = "serial8250",
.id = PLAT8250_DEV_PLATFORM,
.dev = {
.platform_data = uart8250_data,
},
};
static int __init uart8250_init(void)
static void host_close(struct sscape_info *devc)
{
outb((0x03), PORT(HOST_CTRL)); /* Put the board to the MIDI mode */
}
asic = (csmsr & 0x08) ? asic : !asic;
p += sprintf(p, ", ASIC PCI Rev %s", asic ? "1.0" : "1.1");
printk("%s.\n", boardtype);
}
#define PORT(_base,_irq) \
{ \
.iobase = _base, \
.irq = _irq, \
.uartclk = 1843200, \
.iotype = UPIO_PORT, \
.flags = UPF_BOOT_AUTOCONF, \
}
static struct plat_serial8250_port pcimt_data[] = {
PORT(0x3f8, 4),
PORT(0x2f8, 3),
{ },
};
static struct platform_device pcimt_serial8250_device = {
.name = "serial8250",
.id = PLAT8250_DEV_PLATFORM,
.dev = {
.platform_data = pcimt_data,
},
};
static struct resource pcimt_cmos_rsrc[] = {
{
.start = 0x70,
static void _spi_deselect(void) {
IO_WRITE(PORT(IO_SPI), IO_SPI_SS_ALL, IO_SPI_SS_ALL);
}
int bfin_device_ready(struct mtd_info *mtd)
{
int ret = (*PORT(CONFIG_NAND_GPIO_PORT, IO) & BFIN_NAND_READY) ? 1 : 0;
SSYNC();
return ret;
}
#define PORT(_irq) \
{ \
.irq = _irq, \
.regshift = 2, \
.iotype = UPIO_MEM32, \
.flags = (UPF_SKIP_TEST | \
UPF_FIXED_TYPE | UPF_BOOT_AUTOCONF),\
.uartclk = PIC_CLKS_PER_SEC, \
.type = PORT_16550A, \
.serial_in = nlm_xlr_uart_in, \
.serial_out = nlm_xlr_uart_out, \
}
static struct plat_serial8250_port xlr_uart_data[] = {
PORT(PIC_UART_0_IRQ),
PORT(PIC_UART_1_IRQ),
{},
};
static struct platform_device uart_device = {
.name = "serial8250",
.id = PLAT8250_DEV_PLATFORM,
.dev = {
.platform_data = xlr_uart_data,
},
};
static int __init nlm_uart_init(void)
{
unsigned long uartbase;
#include <linux/module.h>
#include <linux/init.h>
#include <linux/serial_8250.h>
#define PORT(_base,_irq) \
{ \
.iobase = _base, \
.irq = _irq, \
.uartclk = 1843200, \
.iotype = UPIO_PORT, \
.flags = UPF_BOOT_AUTOCONF, \
}
static struct plat_serial8250_port boca_data[] = {
PORT(0x100, 12),
PORT(0x108, 12),
PORT(0x110, 12),
PORT(0x118, 12),
PORT(0x120, 12),
PORT(0x128, 12),
PORT(0x130, 12),
PORT(0x138, 12),
PORT(0x140, 12),
PORT(0x148, 12),
PORT(0x150, 12),
PORT(0x158, 12),
PORT(0x160, 12),
PORT(0x168, 12),
PORT(0x170, 12),
PORT(0x178, 12),
/**
* Send next binary value to demultiplexer
* we have cycle of LEDS_AMOUNT values, blink them consecutively (don't forget
* to reduce LEDs resistor according to LEDS_AMOUNT)
*/
void blink_next_LED(){
PORT(LEDS_PORT, ODR) = LED_bits[current_LED++];
if(current_LED == LEDS_AMOUNT)
current_LED = 0;
}
/*
* What to do upon receipt of an interrupt.
*/
void
ie_intr(void *xsc)
{
struct ie_softc *sc = (struct ie_softc *)xsc;
u_short status;
/* Clear the interrupt latch on the 3C507. */
if (sc->hard_type == IE_3C507
&& (inb(PORT(sc) + IE507_CTRL) & EL_CTRL_INTL))
outb(PORT(sc) + IE507_ICTRL, 1);
/* disable interrupts on the EE16. */
if (sc->hard_type == IE_EE16)
outb(PORT(sc) + IEE16_IRQ, sc->irq_encoded);
status = sc->scb->ie_status;
loop:
/* Don't ack interrupts which we didn't receive */
ie_ack(sc, IE_ST_WHENCE & status);
if (status & (IE_ST_RECV | IE_ST_RNR)) {
#ifdef DEBUG
in_ierint++;
if (ie_debug & IED_RINT)
printf("ie%d: rint\n", sc->unit);
#endif
ierint(sc);
#ifdef DEBUG
in_ierint--;
#endif
}
if (status & IE_ST_DONE) {
#ifdef DEBUG
in_ietint++;
if (ie_debug & IED_TINT)
printf("ie%d: tint\n", sc->unit);
#endif
ietint(sc);
#ifdef DEBUG
in_ietint--;
#endif
}
if (status & IE_ST_RNR) {
#ifdef DEBUG
if (ie_debug & IED_RNR)
printf("ie%d: rnr\n", sc->unit);
#endif
iernr(sc);
}
#ifdef DEBUG
if ((status & IE_ST_ALLDONE) && (ie_debug & IED_CNA))
printf("ie%d: cna\n", sc->unit);
#endif
if ((status = sc->scb->ie_status) & IE_ST_WHENCE)
goto loop;
/* Clear the interrupt latch on the 3C507. */
if (sc->hard_type == IE_3C507)
outb(PORT(sc) + IE507_ICTRL, 1);
/* enable interrupts on the EE16. */
if (sc->hard_type == IE_EE16)
outb(PORT(sc) + IEE16_IRQ, sc->irq_encoded | IEE16_IRQ_ENABLE);
}
void
ee16_chan_attn(struct ie_softc *sc)
{
outb(PORT(sc) + IEE16_ATTN, 0);
}
void
sl_chan_attn(struct ie_softc *sc)
{
outb(PORT(sc) + IEATT_ATTN, 0);
}
void
el_chan_attn(struct ie_softc *sc)
{
outb(PORT(sc) + IE507_ATTN, 1);
}
#elif defined(CONFIG_KM_PIGGY4_88E6352)
#include <mv88e6352.h>
#if defined(CONFIG_KM_NUSA)
struct mv88e_sw_reg extsw_conf[] = {
/*
* port 0, PIGGY4, autoneg
* first the fix for the 1000Mbits Autoneg, this is from
* a Marvell errata, the regs are undocumented
*/
{ PHY(0), PHY_PAGE, AN1000FIX_PAGE },
{ PHY(0), PHY_STATUS, AN1000FIX },
{ PHY(0), PHY_PAGE, 0 },
/* now the real port and phy configuration */
{ PORT(0), PORT_PHY, NO_SPEED_FOR },
{ PORT(0), PORT_CTRL, FORWARDING | EGRS_FLD_ALL },
{ PHY(0), PHY_1000_CTRL, NO_ADV },
{ PHY(0), PHY_SPEC_CTRL, AUTO_MDIX_EN },
{ PHY(0), PHY_CTRL, PHY_100_MBPS | AUTONEG_EN | AUTONEG_RST |
FULL_DUPLEX },
/* port 1, unused */
{ PORT(1), PORT_CTRL, PORT_DIS },
{ PHY(1), PHY_CTRL, PHY_PWR_DOWN },
{ PHY(1), PHY_SPEC_CTRL, SPEC_PWR_DOWN },
/* port 2, unused */
{ PORT(2), PORT_CTRL, PORT_DIS },
{ PHY(2), PHY_CTRL, PHY_PWR_DOWN },
{ PHY(2), PHY_SPEC_CTRL, SPEC_PWR_DOWN },
/* port 3, unused */
{ PORT(3), PORT_CTRL, PORT_DIS },
int main() {
line_t in_lines[8] = {
PORT(B, 0),
PORT(B, 1),
PORT(B, 2),
PORT(B, 3),
PORT(B, 4),
PORT(B, 5),
PORT(B, 6),
PORT(B, 7)
},
out_lines[16] = {
PORT(B, 8),
PORT(B, 11),
PORT(B, 12),
PORT(B, 15),
PORT(D, 0),
PORT(D, 2),
PORT(D, 3),
PORT(D, 4),
PORT(D, 5),
PORT(D, 6),
PORT(D, 7),
PORT(D, 8),
PORT(D, 9),
PORT(D, 10),
PORT(D, 11),
PORT(D, 12)
};
bus_t in_bus = initialise_bus(8, in_lines, BUS_INPUT_PULLUP),
out_bus = initialise_bus(16, out_lines, BUS_OUTPUT);
int input = 0, output;
while (1) {
input = read_data(&in_bus);
output = 0;
for (int i = 1, j = 3; i < (1 << 8); i <<= 1, j <<= 1) {
if (input & i) {
output |= j;
}
}
set_data(&out_bus, output);
}
return 0;
}
#endif
return 0;
}
int misc_init_r(void)
{
ivm_read_eeprom(ivm_content, CONFIG_SYS_IVM_EEPROM_MAX_LEN);
return 0;
}
#if defined(CONFIG_KMVECT1)
#include <mv88e6352.h>
/* Marvell MV88E6122 switch configuration */
static struct mv88e_sw_reg extsw_conf[] = {
/* port 1, FRONT_MDI, autoneg */
{ PORT(1), PORT_PHY, NO_SPEED_FOR },
{ PORT(1), PORT_CTRL, FORWARDING | EGRS_FLD_ALL },
{ PHY(1), PHY_1000_CTRL, NO_ADV },
{ PHY(1), PHY_SPEC_CTRL, AUTO_MDIX_EN },
{ PHY(1), PHY_CTRL, PHY_100_MBPS | AUTONEG_EN | AUTONEG_RST |
FULL_DUPLEX },
/* port 2, unused */
{ PORT(2), PORT_CTRL, PORT_DIS },
{ PHY(2), PHY_CTRL, PHY_PWR_DOWN },
{ PHY(2), PHY_SPEC_CTRL, SPEC_PWR_DOWN },
/* port 3, BP_MII (CPU), PHY mode, 100BASE */
{ PORT(3), PORT_CTRL, FORWARDING | EGRS_FLD_ALL },
/* port 4, ESTAR to slot 11, SerDes, 1000BASE-X */
{ PORT(4), PORT_STATUS, NO_PHY_DETECT },
{ PORT(4), PORT_PHY, SPEED_1000_FOR },
{ PORT(4), PORT_CTRL, FORWARDING | EGRS_FLD_ALL },
{"Servname not supported for ai_socktype", 16},
{"ai_socktype not supported", 17},
{"System error", 18},
{"Unknown error", 19},
{"Copyright (C) 1999 Free Software Foundation, Inc.", 20},
{"\
This program is free software with ABSOLUTELY NO WARRANTY; you may\n\
redistribute it under the terms of the GNU General Public License.", 21},
{"version", 22},
{"Usage: jwhois [OPTIONS] [QUERY]", 23},
{"\
--version display version number and patch level\n\
--help display this help\n\
-c FILE, --config=FILE use FILE as configuration file\n\
-h HOST, --host=HOST explicitly query HOST\n\
-p PORT, --port=PORT use port number PORT (in conjunction with HOST)\n\
-v, --verbose verbose debug output\n", 24},
{"\
-f, --force-lookup force lookup even if the entry is cached\n\
-d, --disable-cache disable cache functions\n", 25},
{"Report bugs to [email protected]", 26},
{"invalid port number", 27},
{"error allocating memory", 28},
{"string out of bounds on line", 29},
{"end of file looking for '\"' on line", 30},
{"unexpected end of file on line", 31},
{"multiple keys on line", 32},
{"missing key on line", 33},
{"error creating socket", 34},
{"fatal error searching for host to query", 35},
{"fatal error reading cache", 36},
*/
#include <linux/module.h>
#include <linux/init.h>
#include <linux/serial_8250.h>
#define PORT(_base,_irq) \
{ \
.iobase = _base, \
.irq = _irq, \
.uartclk = 1843200, \
.iotype = UPIO_PORT, \
.flags = UPF_BOOT_AUTOCONF, \
}
static struct plat_serial8250_port exar_data[] = {
PORT(0x100, 5),
PORT(0x108, 5),
PORT(0x110, 5),
PORT(0x118, 5),
{ },
};
static struct platform_device exar_device = {
.name = "serial8250",
.id = PLAT8250_DEV_EXAR_ST16C554,
.dev = {
.platform_data = exar_data,
},
};
static int __init exar_init(void)
static void __sscape_write(int reg, int data)
{
outb(reg, PORT(ODIE_ADDR));
outb(data, PORT(ODIE_DATA));
}
#else
#define COM_FLAGS (UPF_BOOT_AUTOCONF | UPF_SKIP_TEST)
#define COM4_FLAGS UPF_BOOT_AUTOCONF
#endif
#define PORT(_base,_irq,_flags) \
{ \
.iobase = _base, \
.irq = _irq, \
.uartclk = 1843200, \
.iotype = UPIO_PORT, \
.flags = _flags, \
}
static struct plat_serial8250_port x86_com_data[] = {
PORT(0x3F8, 4, COM_FLAGS),
PORT(0x2F8, 3, COM_FLAGS),
PORT(0x3E8, 4, COM_FLAGS),
PORT(0x2E8, 3, COM4_FLAGS),
{ },
};
static struct platform_device x86_com_device = {
.name = "serial8250",
.id = PLAT8250_DEV_PLATFORM,
.dev = {
.platform_data = x86_com_data,
},
};
static int force_legacy_probe;
int main() {
unsigned long T = 0L;
int Ival;
U8 rb, Num;
CFG_GCR |= 1; // disable SWIM
// Configure clocking
CLK_CKDIVR = 0; // F_HSI = 16MHz, f_CPU = 16MHz
// Timer 4 (8 bit) used as system tick timer
// prescaler == 128 (2^7), Tfreq = 125kHz
// period = 1ms, so ARR = 125
TIM4_PSCR = 7;
TIM4_ARR = 125;
// interrupts: update
TIM4_IER = TIM_IER_UIE;
// auto-reload + interrupt on overflow + enable
TIM4_CR1 = TIM_CR1_APRE | TIM_CR1_URS | TIM_CR1_CEN;
// Configure pins
// PC2 - PP output (on-board LED)
PORT(LED_PORT, DDR) |= LED_PIN;
PORT(LED_PORT, CR1) |= LED_PIN;
// PD5 - UART2_TX -- pseudo open-drain output; don't forget an pullup resistor!
PORT(UART_PORT, DDR) |= UART_TX_PIN;
PORT(UART_PORT, ODR) |= UART_TX_PIN; // torn off N push-down ???
//PORT(UART_PORT, CR1) |= UART_TX_PIN;
// Configure UART
// 9 bit, no parity, 1 stop (UART_CR3 = 0 - reset value)
// 57600 on 16MHz: BRR1=0x11, BRR2=0x06
UART2_BRR1 = 0x11; UART2_BRR2 = 0x06;
UART2_CR1 = UART_CR1_M; // M = 1 -- 9bits
UART2_CR2 = UART_CR2_REN | UART_CR2_RIEN; // Allow RX, generate ints on rx
setup_stepper_pins();
// enable all interrupts
enableInterrupts();
// Loop
do{
if((Global_time - T > paused_val) || (T > Global_time)){
T = Global_time;
PORT(LED_PORT, ODR) ^= LED_PIN; // blink on-board LED
}
if(UART_read_byte(&rb)){ // buffer isn't empty
switch(rb){
case 'h': // help
case 'H':
uart_write("\nPROTO:\n"
"+/-\tLED period\n"
"Ex/ex\tset/get end-switches stored\n"
"p\tget HW end-switches\n"
"Mx\tstop on end-switch\n"
"Sx/sx\tset/get Mspeed\n"
"mx\tget steps\n"
"Px\tpause/resume\n"
"Xx\tstop\n"
"0..2N\tmove xth motor for N steps\n"
"=\tinfinity moving (after 0..2)"
"U/u\tset/get U-stepping\n"
"I\tget serial ID\n"
"N\tchange HW number\n"
"n\tshow HW number\n"
);
break;
case 'I': // get serial id
show_uid();
break;
case '+':
paused_val += 100;
if(paused_val > 10000)
paused_val = 500; // but not more than 10s
break;
case '-':
paused_val -= 100;
if(paused_val < 100) // but not less than 0.1s
paused_val = 500;
break;
case 'E': // set end-switches value
if(get_motor_number(&Num)){
if(readInt(&Ival) && (Ival == (Ival & 0x1f))){
if(Num)
EPs[Num] = Ival & 0x0f; // 4 bits in motors 1&2
else
EPs[0] = Ival; // all 5 bits in motor 0
}else
error_msg("bad EP");
}
break;
case 'e': // get stored end-switches value
if(get_motor_number(&Num)){
printUint(&EPs[Num], 1);
}
break;
case 'p': // get hardware end-switches value
if(get_motor_number(&Num)){
Num = get_ep_value(Num);
printUint(&Num, 1);
}
break;
case 'S': // set stepper speed
if(get_motor_number(&Num)){
if(readInt(&Ival) && Ival > MIN_STEP_LENGTH)
set_stepper_speed(Num, Ival);
else
error_msg("bad speed");
}
break;
case 's': // get stepper speed
if(get_motor_number(&Num))
printUint((U8*)&Stepper_speed[Num], 2);
break;
case 'M': // move till EP, you can call it before starting motor
if(get_motor_number(&Num))
Stop_on_EP[Num] = 1;
break;
case 'm': // how much steps there is to the end of moving
if(get_motor_number(&Num))
printUint((U8*)&Nsteps[Num], 2);
break;
case 'X': // stop
if(get_motor_number(&Num))
stop_motor(Num);
break;
case 'P': // pause/resume
if(get_motor_number(&Num))
pause_resume(Num);
break;
case 'N':
if(readInt(&Ival) && Ival > 0 && Ival < 256)
if(!change_progmem_value(&UART_devNUM, (unsigned int) Ival))
error_msg("can't change val");
break;
case 'n': // show HW num
printUint(&UART_devNUM, 1);
break;
case 'u': // show UStepping
printUint(&USteps, 1);
break;
case 'U': // set UStepping
if(readInt(&Ival) && Ival > 0 && Ival < 256)
USteps = Ival;
break;
case '=': // infinity moving: just don't decrement steps
StepperInfty = 1;
break;
default:
if(rb >= '0' && rb <= '2'){ // run motor
Num = rb - '0';
if(readInt(&Ival) && Ival)
move_motor(Num, Ival);
else{
error_msg("bad Nsteps");
}
}
}
}
}while(1);
}
static inline unsigned int serial_in(int offset)
{
return inb(PORT(offset));
}
static void _spi_select(uint8_t slave){
IO_WRITE(PORT(IO_SPI), IO_SPI_SS_ALL, IO_SPI_SS_ALL ^ slave);
}
static inline void serial_out(int offset, int value)
{
outb(value, PORT(offset));
}
void spi_init(void) {
/* all output except MISO; all high, plus pullups on MISO */
IO_WRITE(PORT(IO_SPI), IO_SPI_ALL | IO_SPI_SS_ALL, IO_SPI_SS_ALL);
IO_WRITE(DDR(IO_SPI), IO_SPI_ALL | IO_SPI_SS_ALL,
(IO_SPI_ALL ^ IO_SPI_MISO) | IO_SPI_SS_ALL);
}
#define PORT(_base, _irq) \
{ \
.mapbase = _base, \
.irq = _irq, \
.regshift = 2, \
.iotype = UPIO_AU, \
.flags = UPF_SKIP_TEST | UPF_IOREMAP | \
UPF_FIXED_TYPE, \
.type = PORT_16550A, \
}
static struct plat_serial8250_port au1x00_uart_data[] = {
#if defined(CONFIG_SERIAL_8250_AU1X00)
#if defined(CONFIG_SOC_AU1000)
PORT(UART0_PHYS_ADDR, AU1000_UART0_INT),
PORT(UART1_PHYS_ADDR, AU1000_UART1_INT),
PORT(UART2_PHYS_ADDR, AU1000_UART2_INT),
PORT(UART3_PHYS_ADDR, AU1000_UART3_INT),
#elif defined(CONFIG_SOC_AU1500)
PORT(UART0_PHYS_ADDR, AU1500_UART0_INT),
PORT(UART3_PHYS_ADDR, AU1500_UART3_INT),
#elif defined(CONFIG_SOC_AU1100)
PORT(UART0_PHYS_ADDR, AU1100_UART0_INT),
PORT(UART1_PHYS_ADDR, AU1100_UART1_INT),
PORT(UART3_PHYS_ADDR, AU1100_UART3_INT),
#elif defined(CONFIG_SOC_AU1550)
PORT(UART0_PHYS_ADDR, AU1550_UART0_INT),
PORT(UART1_PHYS_ADDR, AU1550_UART1_INT),
PORT(UART3_PHYS_ADDR, AU1550_UART3_INT),
#elif defined(CONFIG_SOC_AU1200)
static void host_open(struct sscape_info *devc)
{
outb((0x00), PORT(HOST_CTRL)); /* Put the board to the host mode */
}
/*!
*
* @param display
* @param port_number
* @param status
*
* @return 0 on success
* @return -IGD_ERROR_INVAL on failure
*/
static int program_port_plb(igd_display_context_t *display,
unsigned short port_number,
unsigned long status)
{
unsigned long pipe_number;
unsigned long port_control;
unsigned long port_control_analog = 0;
unsigned long mult_port_control;
unsigned long pd_powerstate = 0;
unsigned long upscale = 0;
pd_timing_t *timing;
pd_timing_t local_timing;
unsigned long port_type;
int ret;
/* get the pipe number */
pipe_number = PIPE(display)->pipe_num;
/* get the timings */
timing = PIPE(display)->timing;
/* keep the port type as local as we access it frequently */
port_type = PORT(display, port_number)->port_type;
/* Reading the preservation bits */
port_control = PORT(display, port_number)->preserve &
READ_MMIO_REG(display, PORT(display, port_number)->port_reg);
/* Reading the preservation bits for SDVO Gang Mode */
mult_port_control = PORT(display, port_number)->mult_preserve &
READ_MMIO_REG(display, PORT(display, port_number)->port_reg);
/* If status is false, quickly disable the display */
if(status == FALSE) {
ret = PORT(display, port_number)->pd_driver->set_power(
PORT(display, port_number)->pd_context, PD_POWER_MODE_D3);
if (ret) {
EMGD_ERROR_EXIT("PD set_power() returned: 0x%x", ret);
return -IGD_ERROR_INVAL;
}
if(port_type == IGD_PORT_DIGITAL) {
WRITE_MMIO_REG(display, PORT(display, port_number)->port_reg,
port_control);
if(PORT(display, port_number)->mult_port) {
/* either gang mode or RGBA */
WRITE_MMIO_REG(display,
PORT(display, port_number)->mult_port->port_reg,
mult_port_control);
}
} else if (port_type == IGD_PORT_ANALOG) {
port_control |= (BIT11 | BIT10); /* put in D3 state */
WRITE_MMIO_REG(display, PORT(display, port_number)->port_reg,
port_control);
return 0;
}
return 0;
}
EMGD_DEBUG("status isn't false, Check port enabled");
if(! (PORT(display, port_number)->pt_info->flags & IGD_DISPLAY_ENABLE)) {
return 0;
}
/*
* Is this is the magic mode then turn on VGA syncs
*/
EMGD_DEBUG("Check vga_sync");
if(PORT(display, port_number)->vga_sync == 1) {
/*
* Is this is the magic mode then turn on VGA syncs
*/
EMGD_DEBUG("VGA sync true, is width x height 720 x 400?");
if((timing->width == 720) && (timing->height == 400)) {
EMGD_DEBUG("Modify port control and multi_port_control");
port_control |= (1L<<15);
mult_port_control |= (1L<<15);
}
}
EMGD_DEBUG("Check analog port");
if(port_type == IGD_PORT_ANALOG) {
port_control |= (0x80000000 | (pipe_number<<30));
if(timing->mode_info_flags & IGD_VSYNC_HIGH) {
port_control |= (1L<<4);
}
if(timing->mode_info_flags & IGD_HSYNC_HIGH) {
port_control |= (1L<<3);
}
/* To differentiate between analog and other ports */
port_control_analog = port_control;
}
EMGD_DEBUG("Get power state");
EMGD_DEBUG("power state = %ld ", GET_DISPLAY_POWER_STATE(display, port_number));
switch(GET_DISPLAY_POWER_STATE(display, port_number)) {
case IGD_POWERSTATE_D0:
EMGD_DEBUG("Power State is D0");
pi_pd_find_attr_and_value(PORT(display, port_number),
PD_ATTR_ID_PANEL_FIT,
0, /*no PD_FLAG for UPSCALING */
NULL, /* dont need the attr ptr*/
&upscale);
if(port_type == IGD_PORT_DIGITAL) {
/* Reach the end timing if upscaling is enabled */
if (timing->extn_ptr && upscale) {
timing = (pd_timing_t *)timing->extn_ptr;
}
local_timing = *timing;
if (upscale) {
/* For timings smaller than width 360 and height 200,
* double the size. This is because the active area of the mode
* is double the size of the resolution for these modes
* - Very tricky huh */
if (local_timing.width <= 360) {
local_timing.width <<= 1;
}
if (local_timing.height <= 200) {
local_timing.height <<= 1;
}
}
ret = PORT(display, port_number)->pd_driver->set_mode(
PORT(display, port_number)->pd_context, &local_timing, 0);
if (ret) {
EMGD_ERROR_EXIT("PD set_mode returned: 0x%x", ret);
return -IGD_ERROR_INVAL;
}
/* in Plba B-Speecs, there are no bits, *
* for the polarity of the H-sync/V-sync */
/* in Plba B-Speecs, there are no bits, *
* for data ordering/format for DVO data */
/* Gang-Mode and RGBA models are "exclusive-or" */
if((PORT(display, port_number)->pd_driver->flags) &
PD_FLAG_GANG_MODE) {
mult_port_control |= (1L<<16);
} else if(PORT(display, port_number)->pd_type == PD_DISPLAY_RGBA) {
mult_port_control |= (1L<<2);
}
timing = PIPE(display)->timing;
if(timing->dclk > 100000) {
/* 100MPs < pixel rate < 200MPs */
/* SDVO clock rate multiplier = 1x */
/*
port_control &= ~BIT23;
mult_port_control |= ~BIT23;
redundant code since BIT23 is
already 0 at this point
*/
} else if(timing->dclk > 50000) {
/* 50MPs < pixel rate < 100MPs */
/* SDVO clock rate multiplier = 2x */
port_control |= (1L<<23);
mult_port_control |= (1L<<23);
} else {
/* 25MPs < pixel rate < 50MPs */
/* SDVO clock rate multiplier = 4x */
port_control |= (3L<<23);
mult_port_control |= (3L<<23);
}
/*
* BIT7 = enable the border
* Do we need to disable the SDVO border for native
* VGA timings(i.e., use DE)?
* BIT22->BIT19 = setup the clock phase-9
* BIT29 = enable the stall
* Only set stall on DVO-B for gang mode
* BIT30 = pipe number
* BIT31 = port enable
*/
port_control |= ( ( pipe_number<<30 ) | (BIT31) | ((0x9l) << 19) |
(BIT29) | (BIT7) );
mult_port_control |= ( (BIT31) | ((0x9l) << 19) | (BIT7) );
WRITE_MMIO_REG(display, PORT(display, port_number)->port_reg,
port_control);
if(PORT(display, port_number)->mult_port) { /* gang mode or rgba*/
WRITE_MMIO_REG(display,
PORT(display, port_number)->mult_port->port_reg,
mult_port_control);
}
return 0;
} else if(port_type == IGD_PORT_LVDS) {
/*
* There is a special case for LVDS scaling. If the timing is
* the native one and the extension points to another non-vga
* mode then send the extension pointer.
*/
/* Reach the end timing to get user requested mode */
if(timing->extn_ptr) {
timing = (pd_timing_t *)timing->extn_ptr;
}
}
/* set mode will take care of port control */
ret = PORT(display, port_number)->pd_driver->set_mode(
PORT(display, port_number)->pd_context, (pd_timing_t *)timing,
1<<PIPE(display)->pipe_num);
if (ret) {
EMGD_ERROR_EXIT("PD set_mode returned: 0x%x",ret);
return -IGD_INVAL;
}
break;
case IGD_POWERSTATE_D1:
port_control_analog &= ~0x80000000;
port_control_analog |= 0x00000800 &
~(PORT(display, port_number)->preserve);
pd_powerstate =PD_POWER_MODE_D1;
break;
case IGD_POWERSTATE_D2:
port_control_analog &= ~0x80000000;
port_control_analog |= 0x00000400 &
~(PORT(display, port_number)->preserve);
pd_powerstate = PD_POWER_MODE_D2;
break;
case IGD_POWERSTATE_D3:
port_control_analog &= ~0x80000000;
port_control_analog |= 0x00003c00 &
~(PORT(display, port_number)->preserve);
pd_powerstate = PD_POWER_MODE_D3;
break;
default:
EMGD_ERROR_EXIT("Invalid power state: 0x%lx",
GET_DISPLAY_POWER_STATE(display, port_number));
return -IGD_ERROR_INVAL;
}
ret = PORT(display, port_number)->pd_driver->set_power(
PORT(display, port_number)->pd_context, pd_powerstate);
if (ret) {
EMGD_ERROR_EXIT("PD set_power returned: 0x%x", ret);
return -IGD_ERROR_INVAL;
}
if(port_type == IGD_PORT_DIGITAL) {
EMGD_DEBUG("Port_control = 0x%lx", port_control);
WRITE_MMIO_REG(display, PORT(display, port_number)->port_reg,
port_control);
if(PORT(display, port_number)->mult_port) { /* gang mode or rgba*/
WRITE_MMIO_REG(display,
PORT(display, port_number)->mult_port->port_reg,
mult_port_control);
}
}
EMGD_TRACE_EXIT;
return 0;
}
static int sscape_download_boot(struct sscape_info *devc, unsigned char *block, int size, int flag)
{
unsigned long flags;
unsigned char temp;
volatile int done, timeout_val;
static unsigned char codec_dma_bits = 0;
if (flag & CPF_FIRST)
{
/*
* First block. Have to allocate DMA and to reset the board
* before continuing.
*/
save_flags(flags);
cli();
codec_dma_bits = sscape_read(devc, GA_CDCFG_REG);
if (devc->dma_allocated == 0)
devc->dma_allocated = 1;
restore_flags(flags);
sscape_write(devc, GA_HMCTL_REG,
(temp = sscape_read(devc, GA_HMCTL_REG)) & 0x3f); /*Reset */
for (timeout_val = 10000; timeout_val > 0; timeout_val--)
sscape_read(devc, GA_HMCTL_REG); /* Delay */
/* Take board out of reset */
sscape_write(devc, GA_HMCTL_REG,
(temp = sscape_read(devc, GA_HMCTL_REG)) | 0x80);
}
/*
* Transfer one code block using DMA
*/
if (audio_devs[devc->codec_audiodev]->dmap_out->raw_buf == NULL)
{
printk(KERN_WARNING "soundscape: DMA buffer not available\n");
return 0;
}
memcpy(audio_devs[devc->codec_audiodev]->dmap_out->raw_buf, block, size);
save_flags(flags);
cli();
/******** INTERRUPTS DISABLED NOW ********/
do_dma(devc, SSCAPE_DMA_A,
audio_devs[devc->codec_audiodev]->dmap_out->raw_buf_phys,
size, DMA_MODE_WRITE);
/*
* Wait until transfer completes.
*/
done = 0;
timeout_val = 30;
while (!done && timeout_val-- > 0)
{
int resid;
if (HZ / 50)
sleep(HZ / 50);
clear_dma_ff(devc->dma);
if ((resid = get_dma_residue(devc->dma)) == 0)
done = 1;
}
restore_flags(flags);
if (!done)
return 0;
if (flag & CPF_LAST)
{
/*
* Take the board out of reset
*/
outb((0x00), PORT(HOST_CTRL));
outb((0x00), PORT(MIDI_CTRL));
temp = sscape_read(devc, GA_HMCTL_REG);
temp |= 0x40;
sscape_write(devc, GA_HMCTL_REG, temp); /* Kickstart the board */
/*
* Wait until the ODB wakes up
*/
save_flags(flags);
cli();
done = 0;
timeout_val = 5 * HZ;
while (!done && timeout_val-- > 0)
{
unsigned char x;
sleep(1);
x = inb(PORT(HOST_DATA));
if (x == 0xff || x == 0xfe) /* OBP startup acknowledge */
{
DDB(printk("Soundscape: Acknowledge = %x\n", x));
done = 1;
}
}
sscape_write(devc, GA_CDCFG_REG, codec_dma_bits);
restore_flags(flags);
if (!done)
{
printk(KERN_ERR "soundscape: The OBP didn't respond after code download\n");
return 0;
}
save_flags(flags);
cli();
done = 0;
timeout_val = 5 * HZ;
while (!done && timeout_val-- > 0)
{
sleep(1);
if (inb(PORT(HOST_DATA)) == 0xfe) /* Host startup acknowledge */
done = 1;
}
restore_flags(flags);
if (!done)
{
printk(KERN_ERR "soundscape: OBP Initialization failed.\n");
return 0;
}
printk(KERN_INFO "SoundScape board initialized OK\n");
set_control(devc, CTL_MASTER_VOL, 100);
set_control(devc, CTL_SYNTH_VOL, 100);
#ifdef SSCAPE_DEBUG3
/*
* Temporary debugging aid. Print contents of the registers after
* downloading the code.
*/
{
int i;
for (i = 0; i < 13; i++)
printk("I%d = %02x (new value)\n", i, sscape_read(devc, i));
}
#endif
}
return 1;
}
int main() {
unsigned long T = 0L;
U8 rb, waitfor = 0;
U8 *outbuf = "Hello, world";
U8 inbuf[13] = {0};
U8 inoutbuf[] = {'G','o','o','d','b','y','e',0};
CFG_GCR |= 1; // disable SWIM
// Configure clocking
CLK_CKDIVR = 0; // F_HSI = 16MHz, f_CPU = 16MHz
// Timer 4 (8 bit) used as system tick timer
// prescaler == 128 (2^7), Tfreq = 125kHz
// period = 1ms, so ARR = 125
TIM4_PSCR = 7;
TIM4_ARR = 125;
// interrupts: update
TIM4_IER = TIM_IER_UIE;
// auto-reload + interrupt on overflow + enable
TIM4_CR1 = TIM_CR1_APRE | TIM_CR1_URS | TIM_CR1_CEN;
// PC2 - PP output (on-board LED)
PORT(LED_PORT, DDR) |= LED_PIN;
PORT(LED_PORT, CR1) |= LED_PIN;
uart_init();
spi_init();
// enable all interrupts
enableInterrupts();
// Loop
do{
if((Global_time - T > paused_val) || (T > Global_time)){
T = Global_time;
PORT(LED_PORT, ODR) ^= LED_PIN; // blink on-board LED
}
if(waitfor && spi_buf_sent()){
if(waitfor == 1)
uart_write(inbuf);
else
uart_write(inoutbuf);
waitfor = 0;
}
if(UART_read_byte(&rb)){ // buffer isn't empty
switch(rb){
case 'h': // help
case 'H':
UART_send_byte(rb);
uart_write("\nPROTO:\n+/-\tLED period\n"
);
break;
case '+':
UART_send_byte(rb);
paused_val += 100;
if(paused_val > 10000)
paused_val = 500; // but not more than 10s
break;
case '-':
UART_send_byte(rb);
paused_val -= 100;
if(paused_val < 500) // but not less than 0.5s
paused_val = 500;
break;
case 's':
spi_init();
break;
case 'b':
printUHEX(SPI_SR);
break;
case '1':
spi_send_buffer(outbuf, 12, inbuf);
waitfor = 1;
break;
case '2':
spi_send_buffer(inoutbuf, 7, inoutbuf);
waitfor = 2;
break;
default:
UART_send_byte(spi_send_byte(rb)); // send received byte to SPI & write ans to UART
}
}
}while(1);
}
