Exemplo n.º 1
0
error_t dhcpv6DumpIaAddrOption(const Dhcpv6Option *option, uint_t level)
{
   Dhcpv6IaAddrOption *iaAddrOption;

   //Check the length of the option
   if(ntohs(option->length) < sizeof(Dhcpv6IaAddrOption))
      return ERROR_INVALID_OPTION;

   //Point to the option contents
   iaAddrOption = (Dhcpv6IaAddrOption *) option->value;

   //Dump contents
   TRACE_DEBUG("%sIA Address option (%u bytes)\r\n", prefix[level], ntohs(option->length));
   TRACE_DEBUG("%sIPv6 Address = %s\r\n", prefix[level + 1], ipv6AddrToString(&iaAddrOption->address, NULL));
   TRACE_DEBUG("%sPreferred Lifetime = %us\r\n", prefix[level + 1], ntohl(iaAddrOption->preferredLifetime));
   TRACE_DEBUG("%sValid Lifetime = %us\r\n", prefix[level + 1], ntohl(iaAddrOption->validLifetime));

   //Dump the options associated with this IA address
   dhcpv6DumpOptions(iaAddrOption->options, ntohs(option->length) - sizeof(Dhcpv6IaAddrOption), level + 1);

   //No error to report
   return NO_ERROR;
}
Exemplo n.º 2
0
error_t dhcpv6DumpIaNaOption(const Dhcpv6Option *option, uint_t level)
{
   Dhcpv6IaNaOption *iaNaOption;

   //Check the length of the option
   if(ntohs(option->length) < sizeof(Dhcpv6IaNaOption))
      return ERROR_INVALID_OPTION;

   //Point to the option contents
   iaNaOption = (Dhcpv6IaNaOption *) option->value;

   //Dump contents
   TRACE_DEBUG("%sIA_NA option (%u bytes)\r\n", prefix[level], ntohs(option->length));
   TRACE_DEBUG("%sIA ID = 0x%08X\r\n", prefix[level + 1], ntohl(iaNaOption->iaId));
   TRACE_DEBUG("%sT1 = %us\r\n", prefix[level + 1], ntohl(iaNaOption->t1));
   TRACE_DEBUG("%sT2 = %us\r\n", prefix[level + 1], ntohl(iaNaOption->t2));

   //Dump the options associated with this IA_NA
   dhcpv6DumpOptions(iaNaOption->options, ntohs(option->length) - sizeof(Dhcpv6IaNaOption), level + 1);

   //No error to report
   return NO_ERROR;
}
Exemplo n.º 3
0
/**
 * \brief Handles all interrupts on the given PIO controller.
 * \param id  PIO controller ID.
 * \param pPio  PIO controller base address.
 */
extern void PioInterruptHandler( uint32_t id, Pio *pPio )
{
    uint32_t status;
    uint32_t i;

    /* Read PIO controller status */
    status = pPio->PIO_ISR;
    status &= pPio->PIO_IMR;

    /* Check pending events */
    if ( status != 0 )
    {
        TRACE_DEBUG( "PIO interrupt on PIO controller #%d\n\r", id ) ;

        /* Find triggering source */
        i = 0;
        while ( status != 0 )
        {
            /* There cannot be an unconfigured source enabled. */
            assert(i < _dwNumSources);

            /* Source is configured on the same controller */
            if (_aIntSources[i].pPin->id == id)
            {
                /* Source has PIOs whose statuses have changed */
                if ( (status & _aIntSources[i].pPin->mask) != 0 )
                {
                    TRACE_DEBUG( "Interrupt source #%d triggered\n\r", i ) ;

                    _aIntSources[i].handler(_aIntSources[i].pPin);
                    status &= ~(_aIntSources[i].pPin->mask);
                }
            }
            i++;
        }
    }
}
Exemplo n.º 4
0
/**
 * \brief Configures a TWI peripheral to operate in master mode, at the given
 * frequency (in Hz). The duty cycle of the TWI clock is set to 50%.
 * \param pTwi  Pointer to an Twi instance.
 * \param twck  Desired TWI clock frequency.
 * \param mck  Master clock frequency.
 */
void TWI_ConfigureMaster(Twi *pTwi, uint32_t twck, uint32_t mck)
{
    uint32_t ckdiv = 0;
    uint32_t cldiv;
    uint8_t ok = 0;

    TRACE_DEBUG("TWI_ConfigureMaster()\n\r");
    SANITY_CHECK(pTwi);

    /* SVEN: TWI Slave Mode Enabled */
    pTwi->TWI_CR = TWI_CR_SVEN;
    /* Reset the TWI*/
    pTwi->TWI_CR = TWI_CR_SWRST;
    pTwi->TWI_RHR;

    /* TWI Slave Mode Disabled, TWI Master Mode Disabled. */
    pTwi->TWI_CR = TWI_CR_SVDIS;
    pTwi->TWI_CR = TWI_CR_MSDIS;

    /* Set master mode */
    pTwi->TWI_CR = TWI_CR_MSEN;

    /* Configure clock */
    while (!ok) {
        cldiv = ((mck / (2 * twck)) - 3) / power(2, ckdiv);
        if (cldiv <= 255) {
            ok = 1;
        }
        else {
            ckdiv++;
        }
    }
    ASSERT(ckdiv < 8, "-F- Cannot find valid TWI clock parameters\n\r");
    TRACE_DEBUG("Using CKDIV = %u and CLDIV/CHDIV = %u\n\r", ckdiv, cldiv);
    pTwi->TWI_CWGR = 0;
    pTwi->TWI_CWGR = (ckdiv << 16) | (cldiv << 8) | cldiv;
}
Exemplo n.º 5
0
//------------------------------------------------------------------------------
/// Cleans up the AES peripheral
//------------------------------------------------------------------------------
void aes_hard_cleanup(void) 
{
    TRACE_DEBUG("AES/HARD: Cleaning up ...\n\r");

    AT91C_BASE_AES->AES_MR = 0;

#ifdef AT91C_ID_AES
    PMC_DisablePeripheral( AT91C_ID_AES );
#elif AT91C_ID_AESTDES
    PMC_DisablePeripheral( AT91C_ID_AESTDES );
#elif AT91C_ID_TDES
    PMC_DisablePeripheral( AT91C_ID_TDES );
#else
#error AES undefined
#endif

#ifdef AT91C_BASE_PDC_AES
    // Close PDC
    AT91C_BASE_PDC_AES->PDC_PTCR = AT91C_PDC_RXTDIS;
    AT91C_BASE_PDC_AES->PDC_PTCR = AT91C_PDC_TXTDIS;

    // Reset all Counter register Next buffer first
    AT91C_BASE_PDC_AES->PDC_TNPR = 0;
    AT91C_BASE_PDC_AES->PDC_TNCR = 0;
    AT91C_BASE_PDC_AES->PDC_RPR = 0;
    AT91C_BASE_PDC_AES->PDC_RCR = 0;
    AT91C_BASE_PDC_AES->PDC_TPR = 0;
    AT91C_BASE_PDC_AES->PDC_TCR = 0;
    AT91C_BASE_PDC_AES->PDC_RPR = 0;
    AT91C_BASE_PDC_AES->PDC_RCR = 0;
#else
    //Disable DMA Channels
    AT91C_BASE_HDMA->HDMA_CHDR = (1<<0)| (1<<1);
 #endif

    TRACE_DEBUG("AES/HARD: Cleanup done.\n\r");
}
Exemplo n.º 6
0
/**
 * \brief  Initialize a list of OV registers.
 * The list of registers is terminated by the pair of values
 * \param pTwid TWI interface
 * \param pReglist Register list to be written
 * \return 0 if no error; otherwise TWID_ERROR_BUSY
 */
uint32_t ov_write_regs16(Twid *pTwid, const struct ov_reg* pReglist)
{
    uint32_t err = 0;
    uint32_t size = 0;
    const struct ov_reg *pNext = pReglist;
    volatile uint32_t delay;

    TRACE_DEBUG("ov_write_regs:");
    while (!((pNext->reg == OV_REG_TERM) && (pNext->val == OV_VAL_TERM))) 
    {
        err = ov_write_reg16(pTwid, pNext->reg, pNext->val);
        size++;
        for(delay = 0;delay <= 10000; delay++); 
        if (err == TWID_ERROR_BUSY)
        {
            TRACE_ERROR("ov_write_regs: TWI ERROR\n\r");
            return err;
        }
        TRACE_DEBUG("(0x%02x,0x%02x) \n\r",  pNext->reg,pNext->val);
        pNext++;
    }
    TRACE_DEBUG_WP("\n\r");
    return 0;
}
Exemplo n.º 7
0
//------------------------------------------------------------------------------
/// Interrupt service routine for the remote wake-up pin. Starts the debouncing
/// sequence.
//------------------------------------------------------------------------------
static void WakeUpHandler(const Pin *pin)
{
    TRACE_DEBUG("Wake-up handler\n\r");

    // Check current level on the remote wake-up pin
    if (!PIO_Get(&pinWakeUp))
    {

      #if defined(at91sam3uek)
        ConfigureSysTick();
      #else
        ConfigurePit();
      #endif
    }
}
void DataChart::Load(Simulator *lpSim, string strProjectPath, string strConfigFile)
{
	CStdXml oXml;

	TRACE_DEBUG("Loading data chart config file.\r\nFile: " + strConfigFile);

	if(Std_IsBlank(strProjectPath)) 
		THROW_ERROR(Al_Err_lProjectPathBlank, Al_Err_strProjectPathBlank);

	if(Std_IsBlank(strConfigFile)) 
		THROW_ERROR(Al_Err_lFilenameBlank, Al_Err_strFilenameBlank);

	m_strProjectPath = strProjectPath;
	m_strConfigFilename = strConfigFile;
	
	oXml.Load(AnimatLibrary::GetFilePath(strProjectPath, strConfigFile));

	oXml.FindElement("ChartConfiguration");
	oXml.FindChildElement("DataChart");

	Load(lpSim, oXml);

	TRACE_DEBUG("Finished loading data chart config file.");
}
Exemplo n.º 9
0
BOOL CElemCycleCleanup::bReadConfig(LPCTSTR pszFileName,CListStream *pListStream)
{
	BOOL bReturn = FALSE;

	if (bReturn = CElemCycle::bReadConfig(pszFileName,pListStream))
	{
	}

	if (!bReturn)
	{
		TRACE_DEBUG(eDebug,eCycleCleanup,_T(__FILE__),_T(__FUNCTION__),__LINE__,_T("Error: %s"),szGetLabel());
		TRACE_DEBUG_IHM(eError,eCycleCleanup,eErrorCycleCleanupReadConfig);
	}
	return bReturn;
}
Exemplo n.º 10
0
BOOL CElemCycleCalib::bWriteConfig(LPCTSTR pszFileName)
{
	BOOL bReturn = FALSE;

	if (bReturn = CElemCycleZero::bWriteConfig(pszFileName))
	{
	}

	if (!bReturn)
	{
		TRACE_DEBUG(eDebug,eCycleCalib,_T(__FILE__),_T(__FUNCTION__),__LINE__,_T("Error: %s"),szGetLabel());
		TRACE_DEBUG_IHM(eError,eCycleCalib,eErrorCycleCalibWriteConfig);
	}
	return bReturn;
}
Exemplo n.º 11
0
/**
 * \brief Initialize the GMAC with the Gmac controller address
 *  \param pGmacd Pointer to GMAC Driver instance. 
 *  \param pHw    Pointer to HW address for registers.
 *  \param bID     HW ID for power management
 *  \param enableCAF    Enable/Disable CopyAllFrame.
 *  \param enableNBC    Enable/Disable NoBroadCast.
 */
 void GMACD_Init(sGmacd *pGmacd,
                Gmac *pHw,
                uint8_t bID, 
                uint8_t enableCAF, 
                uint8_t enableNBC )
{
    uint32_t dwNcfgr;
    
    /* Check parameters */
    assert(GRX_BUFFERS * GMAC_RX_UNITSIZE > GMAC_FRAME_LENTGH_MAX);

    TRACE_DEBUG("GMAC_Init\n\r");

    /* Initialize struct */
    pGmacd->pHw = pHw;
    pGmacd->bId = bID;

    /* Power ON */
    PMC_EnablePeripheral(bID);

    /* Disable TX & RX and more */
    GMAC_NetworkControl(pHw, 0);
    GMAC_DisableIt(pHw, ~0u);
    
    GMAC_ClearStatistics(pHw);
    /* Clear all status bits in the receive status register. */
    GMAC_ClearRxStatus(pHw, GMAC_RSR_RXOVR | GMAC_RSR_REC | GMAC_RSR_BNA |GMAC_RSR_HNO);

    /* Clear all status bits in the transmit status register */
    GMAC_ClearTxStatus(pHw, GMAC_TSR_UBR | GMAC_TSR_COL | GMAC_TSR_RLE
                            | GMAC_TSR_TXGO | GMAC_TSR_TFC | GMAC_TSR_TXCOMP
                            | GMAC_TSR_UND | GMAC_TSR_HRESP | GMAC_TSR_LCO);

    /* Clear interrupts */
    GMAC_GetItStatus(pHw);

    /* Enable the copy of data into the buffers
       ignore broadcasts, and don't copy FCS. */
    dwNcfgr = GMAC_NCFGR_FD | GMAC_NCFGR_GBE | GMAC_NCFGR_DBW_DBW64 | GMAC_NCFGR_CLK_MCK_64;
    if( enableCAF ) {
        dwNcfgr |= GMAC_NCFGR_CAF;
    }
    if( enableNBC ) {
        dwNcfgr |= GMAC_NCFGR_NBC;
    }
    
    GMAC_Configure(pHw, dwNcfgr);
}
Exemplo n.º 12
0
int tdes_hard_decrypt_CTR(const unsigned char * cipherText,
                     unsigned char * plainText,
                     unsigned int length)
{
    unsigned int bytes;
    unsigned char block[ENCRYPTION_BLOCK_LENGTH];
    unsigned int e;
    unsigned int i;
    int k;

    TRACE_DEBUG("tdes_hard_decrypt_CTR\n\r");
  
    // Decrypt
    for (e=0; e < length;) {
   
        // Load counter and encrypt it
        AT91C_BASE_TDES->TDES_IDATAxR[0] = ((int *) CTR)[0];
        AT91C_BASE_TDES->TDES_IDATAxR[1] = ((int *) CTR)[1];

        AT91C_BASE_TDES->TDES_CR = AT91C_TDES_START;
        while (!(AT91C_BASE_TDES->TDES_ISR & AT91C_TDES_DATRDY));

        ((int *) block)[0] = AT91C_BASE_TDES->TDES_ODATAxR[0];
        ((int *) block)[1] = AT91C_BASE_TDES->TDES_ODATAxR[1];

        // XOR current plain text block with encrypted counter
        if ((length-e) < ENCRYPTION_BLOCK_LENGTH) {
            bytes = length - e;
        }
        else {
            bytes = ENCRYPTION_BLOCK_LENGTH;
        }
        
        for (i=0; i < bytes; i++) {
            plainText[e+i] = cipherText[e+i] ^ ((char *) block)[i];
        }

        // Increment counter (big-endian) and number of encrypted bytes
        for (k=ENCRYPTION_BLOCK_LENGTH-1; k >= 0; k--) {
            if (++((char *) CTR)[k] != 0) {
                break;
            }
        }
        e += bytes;
    }
  
    return 1;
}
Exemplo n.º 13
0
void CROHONTraderSpi::OnRspOrderAction(CRohonInputOrderActionField *pInputOrderAction, CRohonRspInfoField *pRspInfo, int nRequestID, bool bIsLast)
{
    TRACE_DEBUG("[RohonDealer网关回调]撤单应答.");
    if(IsErrorRspInfo(pRspInfo))
    {
        TRACE_LOG("[RohonDealer网关回调]撤单应答表明相应报单已撤或已成交.");
        //根据3月2日周杰使用中发现的问题(报单无回复情况下的撤单失败应该设置为撤单成功),此处增加处理逻辑
        // 先判断报单是否本网关送出
        int ref = 0;
        ref = atoi(pInputOrderAction->OrderRef);
        if(ref > 0)
        {   // 判断为自己网关送出的报单
            m_pDealer->OnReturnRspOrderAction(pInputOrderAction);
        }
    }
}
Exemplo n.º 14
0
BOOL CElemCycleZero::bReadConfig(LPCTSTR pszFileName,CListStream *pListStream)
{
	BOOL bReturn = FALSE;

	if (bReturn = CElemCycle::bReadConfig(pszFileName,pListStream))
	{
		// lecture param complémentaire
	}

	if (!bReturn)
	{
		TRACE_DEBUG(eDebug,eCycleZero,_T(__FILE__),_T(__FUNCTION__),__LINE__,_T("Error: %s"),szGetLabel());
		TRACE_DEBUG_IHM(eError,eCycleZero,eErrorCycleZeroReadConfig);
	}
	return bReturn;
}
Exemplo n.º 15
0
error_t dhcpDumpIpv4Addr(const DhcpOption *option)
{
   Ipv4Addr ipAddr;

   //Check option length
   if(option->length != sizeof(Ipv4Addr))
      return ERROR_INVALID_OPTION;

   //Retrieve IPv4 address
   ipv4CopyAddr(&ipAddr, option->value);
   //Dump option contents
   TRACE_DEBUG("    %s\r\n", ipv4AddrToString(ipAddr, NULL));

   //No error to report
   return NO_ERROR;
}
Exemplo n.º 16
0
error_t dhcpDumpInt32(const DhcpOption *option)
{
   uint32_t value;

   //Check option length
   if(option->length != 4)
      return ERROR_INVALID_OPTION;

   //Retrieve 32-bit value
   value = LOAD32BE(option->value);
   //Dump option contents
   TRACE_DEBUG("    %" PRIu32 "\r\n", value);

   //No error to report
   return NO_ERROR;
}
Exemplo n.º 17
0
void osFreeMem(void *p)
{
   //Make sure the pointer is valid
   if(p != NULL)
   {
      //Debug message
      TRACE_DEBUG("Freeing memory at 0x%08" PRIXPTR "\r\n", (uintptr_t) p);

      //Enter critical section
      osSuspendAllTasks();
      //Free memory block
      free(p);
      //Leave critical section
      osResumeAllTasks();
   }
}
Exemplo n.º 18
0
//------------------------------------------------------------------------------
/// Configures the AES peripheral to encrypt/decrypt, start mode (manual, auto,
/// PDC) and operating mode (ECB, CBC, OFB, CFB, CTR).
/// \param cipher  Indicates if the peripheral should encrypt or decrypt data.
/// \param smode  Start mode.
/// \param opmode  Operating mode.
//------------------------------------------------------------------------------
void AES_Configure(
    unsigned char cipher,
    unsigned int smode,
    unsigned int opmode)
{
    TRACE_DEBUG("AES_Configure()\n\r");
    SANITY_CHECK((cipher & 0xFFFFFFFE) == 0);
    SANITY_CHECK((smode & 0xFFFFFCFF) == 0);
    SANITY_CHECK((opmode & 0xFFFF8FFF) == 0);

    // Reset the peripheral first
    AT91C_BASE_AES->AES_CR = AT91C_AES_SWRST;

    // Configure mode register
    AT91C_BASE_AES->AES_MR = cipher | smode | opmode;
}
Exemplo n.º 19
0
void CROHONTraderSpi::OnRspOrderInsert(CRohonInputOrderField *pInputOrder, CRohonRspInfoField *pRspInfo, int nRequestID, bool bIsLast)
{
    TRACE_DEBUG("[RohonDealer网关回调]报单应答.");
    if(IsErrorRspInfo(pRspInfo))
    {
        TRACE_LOG("[RohonDealer网关回调]报单应答表明报单有错.");
        // 根据12月29日周杰测试中发现的问题(平今仓位不足),此处增加处理逻辑
        // 先判断报单是否本网关送出
        int ref = 0;
        ref = atoi(pInputOrder->OrderRef);
        if(ref > 0)
        {   // 判断为自己网关送出的报单
            m_pDealer->OnReturnRspOrderInsert(pInputOrder);
        }
    }
}
Exemplo n.º 20
0
/******************************************************************************
 * @func :	bWriteConfig
 * 
 * Rôle  :	enregistre la configuration dans un fichier
 * @parm :	LPCSTR | szIni | fichier de configuration
 *****************************************************************************/
BOOL CCarteIO::bWriteConfig(LPCTSTR pszFileName)
{
	BOOL bReturn;

	bReturn = CSerialPort::bWriteConfig(pszFileName);
	if (bReturn) bReturn = bWritePrivateProfileInt(_T("Config"),_T("m_dwDelay"),m_dwDelay,pszFileName);
	if (bReturn) bReturn = m_ElemCycleStep.bWriteConfig(_T("0"),pszFileName);

	if (!bReturn) 
	{
		TRACE_DEBUG(eDebug,eConfig,_T(__FILE__),_T(__FUNCTION__),__LINE__,_T("BOOL CCarteIO::bWriteConfig"));
		TRACE_DEBUG_IHM(eError,eConfig,eErrorCarteIOWriteConfig);
	}

	return TRUE;
}
Exemplo n.º 21
0
//------------------------------------------------------------------------------
/// Asks to all cards to send their operations conditions.
/// Returns the command transfer result (see SendCommand).
/// \param pSd  Pointer to a SD card driver instance.
/// \param hcs  Shall be true if Host support High capacity.
/// \param pCCS  Set the pointed flag to 1 if hcs != 0 and SD OCR CCS flag is set.
//------------------------------------------------------------------------------
static unsigned char Acmd41(SdCard *pSd, unsigned char hcs, unsigned char *pCCS)
{
    SdCmd *pCommand = &(pSd->command);
    unsigned char error;
    unsigned int response;

    do {
        error = Cmd55(pSd);
        if (error) {
            return error;
        }

        memset(pCommand, 0, sizeof(SdCmd));
        // Fill command information
        pCommand->cmd = AT91C_SDCARD_APP_OP_COND_CMD;
        pCommand->arg = AT91C_MMC_HOST_VOLTAGE_RANGE;
        if (hcs) {
            pCommand->arg |= AT91C_CCS;
        }

        pCommand->resType = 1;
        pCommand->pResp = &response;

        // Set SD command state
        pSd->state = SD_STATE_STBY;

        // Send command
        TRACE_DEBUG("Acmd41()\n\r");
        error = SendCommand(pSd);
        if (error) {
            return error;
        }
        error = SD_SPI_R1((unsigned char *)&response);
        if (error) {
            return error;
        }
        // continue if in idle mode
        if ((response & 0x1) != 0) { // R1_SPI_IDLE
            continue;
        }
        *pCCS  = ((response & AT91C_CCS) != 0);
        return 0;
    }
    while ((response & AT91C_CARD_POWER_UP_BUSY) != AT91C_CARD_POWER_UP_BUSY);

    return 0;
}
Exemplo n.º 22
0
/**
 * Handle the SET_CUR request.
 * \param pAudf Pointer to AUDDSpeakerPhone instance.
 * \param pReq  Pointer to USBGenericRequest instance.
 */
static void AUDD_SetCUR(
    AUDDSpeakerPhone *pAudf,
    const USBGenericRequest* pReq)
{
    uint8_t bIf     = AUDGenericRequest_GetInterface(pReq);
    uint8_t bEntity = AUDGenericRequest_GetEntity(pReq);
    uint8_t bLength = USBGenericRequest_GetLength(pReq);
    uint8_t bCh     = AUDFeatureUnitRequest_GetChannel(pReq);
    uint8_t bCtrl   = AUDFeatureUnitRequest_GetControl(pReq);
    uint8_t bSet = 1;
    AUDDStream *pAuds = AUDD_GetCtlStream(pAudf, bIf, bEntity, bCh);
    TransferCallback fCallback;

    TRACE_INFO_WP("sCUR ");
    TRACE_DEBUG("\b(E%d, CtlS%d, Ch%d, L%d) ", bEntity, bCtrl, bCh, bLength);

    /* Set Mute to AC, 1 byte */
    if (bCtrl == AUDFeatureUnitRequest_MUTE
        && bLength == 1
        && pAuds) {
        fCallback = (TransferCallback) AUDD_MuteReceived;
    }
    else if (bCtrl == AUDFeatureUnitRequest_VOLUME
        && bLength == 2
        && pAuds && pAuds->pwVolumes) {
        fCallback = (TransferCallback) AUDD_VolumeReceived;
    }
    else
        bSet = 0;

    if (bSet) {

        auddXfrData.pStream = pAuds;
        auddXfrData.bEntity = bEntity;
        auddXfrData.bCh     = bCh;
        USBD_Read(0,
                  &auddXfrData.usbBuffer,
                  bLength,
                  fCallback,
                  (void *) &auddXfrData);
    }
    else {

        USBD_Stall(0);
    }

}
Exemplo n.º 23
0
/**
 * \brief Find a valid PHY Address ( from 0 to 31 ).
 * \param pMacb Pointer to the MACB instance
 * \return 0xFF when no valid PHY Address found.
 */
static uint8_t GMACB_FindValidPhy(GMacb *pMacb)
{
    sGmacd *pDrv = pMacb->pGmacd;
    Gmac *pHw = pDrv->pHw;

    uint32_t  retryMax;
    uint32_t  value=0;
    uint8_t rc;
    uint8_t phyAddress;
    uint8_t cnt;

    TRACE_DEBUG("GMACB_FindValidPhy\n\r");

    GMAC_EnableMdio(pHw);
    phyAddress = pMacb->phyAddress;
    retryMax = pMacb->retryMax;

    /* Check current phyAddress */
    rc = phyAddress;
    if( GMACB_ReadPhy(pHw, phyAddress, GMII_PHYID1, &value, retryMax) == 0 ) {
        TRACE_ERROR("GMACB PROBLEM\n\r");
    }
    TRACE_DEBUG("_PHYID1  : 0x%X, addr: %d\n\r", value, phyAddress);

    /* Find another one */
    if (value != GMII_OUI_MSB) {

        rc = 0xFF;
        for(cnt = 0; cnt < 32; cnt ++) {

            phyAddress = (phyAddress + 1) & 0x1F;
            if( GMACB_ReadPhy(pHw, phyAddress, GMII_PHYID1, &value, retryMax) == 0 ) {
                TRACE_ERROR("MACB PROBLEM\n\r");
            }
            TRACE_DEBUG("_PHYID1  : 0x%X, addr: %d\n\r", value, phyAddress);
            if (value == GMII_OUI_MSB) {

                rc = phyAddress;
                break;
            }
        }
    }
    GMAC_DisableMdio(pHw);
    if (rc != 0xFF) {
        TRACE_INFO("** Valid PHY Found: %d\n\r", rc);
        GMACB_ReadPhy(pHw, phyAddress, GMII_BMSR, &value, retryMax);
        TRACE_DEBUG("_BMSR  : 0x%X, addr: %d\n\r", value, phyAddress);
        GMACB_ReadPhy(pHw, phyAddress, GMII_1000BTSR, &value, retryMax);
        TRACE_DEBUG("_1000BTSR  : 0x%X, addr: %d\n\r", value, phyAddress);
        GMACB_ReadPhy(pHw, phyAddress, GMII_EMSR, &value, retryMax);
        TRACE_DEBUG("_EMSR  : 0x%X, addr: %d\n\r", value, phyAddress);
    }
    return rc;
}
Exemplo n.º 24
0
void *osAllocMem(size_t size)
{
   void *p;

   //Enter critical section
   osSuspendAllTasks();
   //Allocate a memory block
   p = malloc(size);
   //Leave critical section
   osResumeAllTasks();

   //Debug message
   TRACE_DEBUG("Allocating %" PRIuSIZE " bytes at 0x%08" PRIXPTR "\r\n", size, (uintptr_t) p);

   //Return a pointer to the newly allocated memory block
   return p;
}
Exemplo n.º 25
0
BOOL CElemCycle::bReadConfig(LPCTSTR pszFileName,CListStream *pListStream)
{
	BOOL bReturn = FALSE;
	TCHAR szRub[MAX_PATH];
	TCHAR szText[MAX_PATH];
	int i;
	int iLastStep;
	CElemCycleStep *pCycleStep = NULL;

	RemoveAll();
	// label
	dwGetPrivateProfileString(_T("Config"),_T("Label"),szGetLabel(),szText,sizeof(szText)/sizeof(TCHAR),pszFileName);
	SetLabel(szText);
	// duree max
	bReturn = m_Duration.bSetVal(iGetPrivateProfileInt(_T("Config"),_T("Duration"),0,pszFileName));
	// dernier num de pas
	iLastStep = iGetPrivateProfileInt(_T("Config"),_T("LastStepNum"),0,pszFileName);
	// trame d'arrêt
	m_ElemCycleStepStop.bReadConfig(_T("Stop"),pszFileName,pListStream);
	// les pas
	for (i = 0;bReturn && (i <= iLastStep); i++)
	{
		_stprintf(szRub,_T("%d"),i);
		if (pCycleStep == NULL) pCycleStep = new CElemCycleStep();
		if (bReturn = (pCycleStep != NULL))
		{
			pCycleStep->SetAutoDelete(TRUE);
			if (pCycleStep->bReadConfig(szRub,pszFileName,pListStream))
			{
				bReturn = (pAdd(pCycleStep) != NULL);
				pCycleStep = NULL;
			}
			else pCycleStep->RemoveAll();
		}
	}

	if (pCycleStep != NULL) delete pCycleStep;

	if (!bReturn)
	{
		TRACE_DEBUG(eDebug,eCycle,_T(__FILE__),_T(__FUNCTION__),__LINE__,_T("Error: %s"),szGetLabel());
		TRACE_DEBUG_IHM(eError,eCycle,eErrorCycleReadConfig);
	}

	return bReturn;
}
Exemplo n.º 26
0
/* Handle some signals */
static void * catch_signals(void * arg)
{
	sigset_t ss;
	fd_log_threadname ( "signals catcher" );
	
	sigemptyset(&ss);
	
	/* Signals that terminate the daemon */
	sigaddset(&ss, SIGTERM);
	sigaddset(&ss, SIGINT);
	
	/* Signals that send an event */
	sigaddset(&ss, SIGUSR1);
	sigaddset(&ss, SIGUSR2);
	
	/* We unblock all other signals, so that their default handler is used (such as SIGTSTP) */
	CHECK_SYS_DO( pthread_sigmask( SIG_SETMASK, &ss, NULL ), goto out );
	
	/* Now loop on the reception of the signal */
	while (1) {
		int sig, *ps;
		
		/* Wait to receive the next signal */
		CHECK_POSIX_DO( sigwait(&ss, &sig), break );
		
		TRACE_DEBUG(FULL, "Signal %d caught", sig);
		
		switch (sig) {
			case SIGUSR1:
			case SIGUSR2:
				CHECK_MALLOC_DO( ps = malloc(sizeof(int)), goto out);
				*ps = sig;
				CHECK_FCT_DO( fd_event_send(fd_g_config->cnf_main_ev, FDEV_TRIGGER, sizeof(int), ps), goto out );
				break;
				
			case SIGINT:
			case SIGTERM:
				CHECK_FCT_DO( fd_core_shutdown(), goto out );

		}
	}
out:	
	/* Better way to handle this ? */
	ASSERT(0);
	return NULL;
}
Exemplo n.º 27
0
void TRACE_DEBUG_IHM(int eTypeMsg,int eOrigineMsg, int eErrorCode)
{
	TCHAR		szTextDebug[1024];
	SYSTEMTIME  stTime;


	GetLocalTime(&stTime);
	_stprintf( szTextDebug 
			 , _T(">LVL:%s ; ORIG:%s ; %04d/%02d/%02d ; %02d:%02d:%02d ; %s\r\n")
			 , aszTypeMsgTrace[eTypeMsg]
			 , aszOrigineMsgTrace[eOrigineMsg]
			 , stTime.wYear,stTime.wMonth,stTime.wDay,stTime.wHour,stTime.wMinute,stTime.wSecond
			 , _aszErrorText[eErrorCode]);

	CListStream::m_ListMessageError.bAddAndRollText(szTextDebug);
	TRACE_DEBUG(eDebug,eOrigineMsg,_T(__FILE__),_T(__FUNCTION__),__LINE__,_aszErrorText[eErrorCode]);
}
Exemplo n.º 28
0
void onStepDetectedCallback(void) {
	TRACE_DEBUG("-- Step detected %3d -- \r\n", get_step_count());

	//	mag_info mg_i = MMC212xM_GetMagneticFieldInfo(&twid);
	steps_data[get_step_count() - 1] = get_descrete_angle(
			L3G4200D_GetData().sAngle_z);

	L3G4200D_Reset(&twid);

	char txt_buff[16];
	sprintf(txt_buff, "s: %2d a: %3d", get_step_count(),
			(int) steps_data[get_step_count() - 1]);
	HY1602F6_Log("Step detected", txt_buff);

	TRACE_INFO("-- Detected angle: %4d, Descrete angle: %d -- \r\n", L3G4200D_GetData().sAngle_z, (int)steps_data[get_step_count() - 1]);

}
Exemplo n.º 29
0
//------------------------------------------------------------------------------
/// Starts the encryption/decryption process when in manual or PDC mode. In
/// manual mode, the key and input data must have been entered using
/// AES_SetKey() and AES_SetInputData(). In PDC mode, the key, input & output
/// buffer must have been set using AES_SetKey(), AES_SetInputBuffer() and
/// AES_SetOutputBuffer().
//------------------------------------------------------------------------------
void AES_Start(void)
{
    TRACE_DEBUG("AES_Start()\n\r");
    SANITY_CHECK(((AT91C_BASE_AES->AES_MR & AT91C_AES_SMOD) == AT91C_AES_SMOD_MANUAL)
                 || ((AT91C_BASE_AES->AES_MR & AT91C_AES_SMOD) == AT91C_AES_SMOD_PDC));

    // Manual mode
    if ((AT91C_BASE_AES->AES_MR & AT91C_AES_SMOD) == AT91C_AES_SMOD_MANUAL) {

        AT91C_BASE_AES->AES_CR = AT91C_AES_START;
    }
    // PDC
    else {

        AT91C_BASE_AES->AES_PTCR = AT91C_PDC_RXTEN | AT91C_PDC_TXTEN;
    }
}
Exemplo n.º 30
0
/**
 * \brief Do a HW initialize to the PHY ( via RSTC ) and setup clocks & PIOs
 * This should be called only once to initialize the PHY pre-settings.
 * The PHY address is reset status of CRS,RXD[3:0] (the emacPins' pullups).
 * The COL pin is used to select MII mode on reset (pulled up for Reduced MII)
 * The RXDV pin is used to select test mode on reset (pulled up for test mode)
 * The above pins should be predefined for corresponding settings in resetPins
 * The GMAC peripheral pins are configured after the reset done.
 * \param pMacb Pointer to the MACB instance
 * \param mck         Main clock setting to initialize clock
 * \param resetPins   Pointer to list of PIOs to configure before HW RESET
 *                       (for PHY power on reset configuration latch)
 * \param nbResetPins Number of PIO items that should be configured
 * \param emacPins    Pointer to list of PIOs for the EMAC interface
 * \param nbEmacPins  Number of PIO items that should be configured
 * \return 1 if RESET OK, 0 if timeout.
 */
uint8_t GMACB_InitPhy(GMacb *pMacb,
                            uint32_t mck,
                            const Pin *pResetPins,
                            uint32_t nbResetPins,
                            const Pin *pGmacPins,
                            uint32_t nbGmacPins)
{
    sGmacd *pDrv = pMacb->pGmacd;
    Gmac *pHw = pDrv->pHw;
    uint8_t rc = 1;
    uint8_t phy;

    /* Perform RESET */
    TRACE_DEBUG("RESET PHY\n\r");
    
    if (pResetPins) {
        /* Configure PINS */
        PIO_Configure(pResetPins, nbResetPins);
    }
    /* Configure GMAC runtime pins */
    if (rc) {

        PIO_Configure(pGmacPins, nbGmacPins);
        rc = GMAC_SetMdcClock(pHw, mck );
        if (!rc) {
            TRACE_ERROR("No Valid MDC clock\n\r");
            return 0;
        }

        /* Check PHY Address */
        phy = GMACB_FindValidPhy(pMacb);
        if (phy == 0xFF) {
            TRACE_ERROR("PHY Access fail\n\r");
            return 0;
        }
        if(phy != pMacb->phyAddress) {
            pMacb->phyAddress = phy;
            GMACB_ResetPhy(pMacb);
        }
    }
    else {
        TRACE_ERROR("PHY Reset Timeout\n\r");
    }
    return rc;
}