Exemplo n.º 1
0
static BT_HANDLE devcfg_probe(const BT_INTEGRATED_DEVICE *pDevice, BT_ERROR *pError) {

	BT_ERROR Error;

	if(g_bInUse) {
		Error = BT_ERR_GENERIC;
		goto err_set_out;
	}

	g_bInUse = BT_TRUE;

	BT_HANDLE hDevcfg = BT_CreateHandle(&oHandleInterface, sizeof(struct _BT_OPAQUE_HANDLE), pError);
	if(!hDevcfg) {
		goto err_set_out;
	}

	const BT_RESOURCE *pResource = BT_GetIntegratedResource(pDevice, BT_RESOURCE_MEM, 0);
	if(!pResource) {
		Error = BT_ERR_GENERIC;
		goto err_free_out;
	}

	hDevcfg->pRegs = (volatile ZYNQ_DEVCFG_REGS *) bt_ioremap((void *) pResource->ulStart, sizeof(ZYNQ_DEVCFG_REGS));

	hDevcfg->pRegs->UNLOCK = 0x757BDF0D;				// Unlock the DEVCFG interface.

	hDevcfg->pRegs->INT_STS = 0xFFFFFFFF;				// Clear all interrupt status signals.

	hDevcfg->pRegs->CTRL |= CTRL_PCFG_PROG_B;
	hDevcfg->pRegs->CTRL |= CTRL_PCAP_MODE;				// Enable PCAP transfer mode.
	hDevcfg->pRegs->CTRL |= CTRL_PCAP_PR;				// Select PCAP for reconfiguration, (disables ICAP).
	hDevcfg->pRegs->CTRL &= ~CTRL_QUARTER_PCAP_RATE;	// Set full bandwidth PCAP loading rate.

	hDevcfg->pRegs->MCTRL &= ~MCTRL_PCAP_LPBK; 			// Ensure internal PCAP looback is disabled.

	hDevcfg->pSLCR = (volatile ZYNQ_SLCR_REGS *) bt_ioremap((void *) ZYNQ_SLCR_BASE, sizeof(ZYNQ_SLCR_REGS));

	zynq_slcr_unlock(hDevcfg->pSLCR);
	zynq_slcr_preload_fpga(hDevcfg->pSLCR);
	zynq_slcr_lock(hDevcfg->pSLCR);

	devcfg_reset_pl(hDevcfg);

	if(pError) {
		*pError = BT_ERR_NONE;
	}

	return hDevcfg;

err_free_out:
	BT_DestroyHandle(hDevcfg);

err_set_out:
	if(pError) {
		*pError = Error;
	}

	return NULL;
}
Exemplo n.º 2
0
BT_u32 BT_ZYNQ_GetCpuFrequency() {
	volatile ZYNQ_SLCR_REGS *pRegs = bt_ioremap((void *)ZYNQ_SLCR, BT_SIZE_4K);

	BT_u32 	ctl 		= pRegs->ARM_CLK_CTRL;
	BT_u32 	srcsel 		= ZYNQ_SLCR_CLK_CTRL_SRCSEL_VAL(ctl);

	BT_u32	InputClk;

	switch(srcsel) {
	case ZYNQ_SLCR_CLK_CTRL_SRCSEL_ARMPLL:
		InputClk = BT_ZYNQ_GetIOPLLFrequency();		// This looks wrong! But the meaning of srcsel...
		break;

	case ZYNQ_SLCR_CLK_CTRL_SRCSEL_IOPLL:
		InputClk = BT_ZYNQ_GetArmPLLFrequency();	// ... is switched for ARM_CLK_CTRL!! :S typical Xilinx!
		break;

	case ZYNQ_SLCR_CLK_CTRL_SRCSEL_DDRPLL:
		InputClk = BT_ZYNQ_GetDDRPLLFrequency();
		break;

	default:
		return 0;
	}

	InputClk /= ZYNQ_SLCR_CLK_CTRL_DIVISOR_VAL(pRegs->ARM_CLK_CTRL);

	return InputClk;
}
Exemplo n.º 3
0
BT_u32 BT_ZYNQ_GetDDRPLLFrequency() {

	volatile ZYNQ_SLCR_REGS *pRegs = bt_ioremap((void *)ZYNQ_SLCR, BT_SIZE_4K);

	BT_u32 ctl = pRegs->DDR_PLL_CTRL;
	BT_BOOL bBypassed = BT_FALSE;

	if(!(ctl & ZYNQ_SLCR_PLL_CTRL_BYPASS_FORCE)) {
		if(ctl & ZYNQ_SLCR_PLL_CTRL_BYPASS_QUAL) {
			if(pRegs->BOOT_MODE & ZYNQ_SLCR_BOOT_MODE_IO_PLL_BYPASS) {
				bBypassed = BT_TRUE;
			}
		}
	} else {
		bBypassed = BT_TRUE;
	}

	if(bBypassed) {
		return BT_CONFIG_MACH_ZYNQ_SYSCLOCK_FREQ;
	}

	BT_u64 fdiv = ZYNQ_SLCR_PLL_CTRL_FDIV_VAL(ctl);
	BT_u64 val = (BT_u64) BT_CONFIG_MACH_ZYNQ_SYSCLOCK_FREQ;
	val *= fdiv;

	//BT_u64 clk_div = ZYNQ_SLCR_CLK_CTRL_DIVISOR_VAL(pRegs->IO_CLK_CTRL);

	return val;
}
Exemplo n.º 4
0
/**
 *	This is really acting as a filter driver, so only the zynq HAL can know if the SDHCI
 *	controller is enabled.
 *
 *	If it is, we ask the generic SDHCI driver to do its stuff, otherwise we return an error.
 **/
static BT_HANDLE zynq_sdhci_probe(const BT_INTEGRATED_DEVICE *pDevice, BT_ERROR *pError) {

	BT_ERROR Error;
	BT_BOOL bEnabled = BT_FALSE;
	volatile ZYNQ_SLCR_REGS *pRegs = bt_ioremap((void *)ZYNQ_SLCR, BT_SIZE_4K);

	const BT_RESOURCE *pResource = BT_GetIntegratedResource(pDevice, BT_RESOURCE_ENUM, 0);
	if(!pResource) {
		goto err_out;
	}

	switch(pResource->ulStart) {
	case 0:
		bEnabled = (pRegs->SDIO_CLK_CTRL & ZYNQ_SLCR_CLK_CTRL_CLKACT_0);
		if(bEnabled) {	// Attempt to reset the device!
			zynq_slcr_unlock(pRegs);
			pRegs->SDIO_RST_CTRL |= 0x11;
			pRegs->SDIO_RST_CTRL &= ~0x11;
			zynq_slcr_lock(pRegs);
		}
		break;

	case 1:
		bEnabled = (pRegs->SDIO_CLK_CTRL & ZYNQ_SLCR_CLK_CTRL_CLKACT_0);
		if(bEnabled) {
			zynq_slcr_unlock(pRegs);
			pRegs->SDIO_RST_CTRL |= 0x22;
			pRegs->SDIO_RST_CTRL &= ~0x22;
			zynq_slcr_lock(pRegs);
		}
		break;

	default:
		break;
	}

	bt_iounmap(pRegs);

	if(!bEnabled) {
		Error = BT_ERR_GENERIC;
		goto err_out;
	}

	BT_INTEGRATED_DRIVER *pDriver = BT_GetIntegratedDriverByName("mmc,sdhci");
	if(!pDriver) {
		Error = BT_ERR_GENERIC;
		goto err_out;
	}

	return pDriver->pfnProbe(pDevice, pError);

err_out:
	if(pError) {
		*pError = Error;
	}

	return NULL;
}
Exemplo n.º 5
0
BT_u32 BT_ZYNQ_GetCpu1xFrequency() {
	volatile ZYNQ_SLCR_REGS *pRegs = bt_ioremap((void *)ZYNQ_SLCR, BT_SIZE_4K);

	BT_u32 ulCPUClk = BT_ZYNQ_GetCpuFrequency();
	if(pRegs->CLK_621_TRUE) {
		return ulCPUClk / 6;
	}

	return ulCPUClk / 4;
}
Exemplo n.º 6
0
static BT_ERROR bcm2835_init(struct _BT_MACHINE_DESCRIPTION *pMachine) {

	volatile BCM2835_GPIO_REGS *pRegs = bt_ioremap((bcm2835_gpio_resources[0].pStart), BT_SIZE_4K);

	// UART enable gpios
	pRegs->GPFSEL[1] &= ~(7 << 12);
	pRegs->GPFSEL[1] |= 2 << 12;

	return BT_ERR_NONE;
}
Exemplo n.º 7
0
static BT_HANDLE gic_probe(const BT_INTEGRATED_DEVICE *pDevice, BT_ERROR *pError) {

	BT_ERROR Error;

	if(g_hActiveHandle) {
		if(pError) {
			*pError = BT_ERR_GENERIC;
		}
		return NULL;
	}

	BT_HANDLE hGic = BT_CreateHandle(&oHandleInterface, sizeof(struct _BT_OPAQUE_HANDLE), pError);
	if(!hGic) {
		goto err_out;
	}

	const BT_RESOURCE *pResource = BT_GetIntegratedResource(pDevice, BT_RESOURCE_MEM, 0);
	if(!pResource) {
		Error = BT_ERR_NO_MEMORY;
		goto  err_free_chip;
	}

	hGic->pGICC = (GICC_REGS *) bt_ioremap((void *)pResource->ulStart, BT_SIZE_4K);

	pResource = BT_GetIntegratedResource(pDevice, BT_RESOURCE_MEM, 1);
	if(!pResource) {
		Error = BT_ERR_GENERIC;
		goto err_free_chip;
	}

	hGic->pGICD = (GICD_REGS *) bt_ioremap((void *)pResource->ulStart, BT_SIZE_4K);

	// Set private members.

	pResource = BT_GetIntegratedResource(pDevice, BT_RESOURCE_IRQ, 0);
	if(!pResource) {
		Error = BT_ERR_GENERIC;
		goto err_free_chip;
	}

	BT_u32 base 	= pResource->ulStart;
	BT_u32 total 	= (pResource->ulEnd - pResource->ulStart) + 1;

	hGic->ulBaseIRQ = base;

	BT_u32 i;
	for(i = 0; i < total; i++) {
		g_oVectorTable[i].pfnHandler 	= gic_stubhandler;
		g_oVectorTable[i].pParam 	 	= NULL;
	}

	Error = BT_RegisterInterruptController(base, total, hGic);
	if(Error) {
		goto err_free_chip;
	}

	g_hActiveHandle = hGic;

	// Enable the Distributor and CPU interfaces.

	BT_u32 ulGicIRQs = (hGic->pGICD->TYPER & 0x1F);
	ulGicIRQs = (ulGicIRQs + 1) * 32;

	/*
	 *	GIC can support a mximum 1020 IRQs.
	 */
	if(ulGicIRQs > 1020) {
		ulGicIRQs = 1020;
	}

	hGic->ulGicIRQs = ulGicIRQs;

//#ifdef BT_CONFIG_ARCH_ARM_GIC_INIT_DISTRIBUTOR
	gic_dist_init(hGic);
//#endif
	gic_cpu_init(hGic);

	return hGic;

err_free_chip:
	BT_DestroyHandle(hGic);

	if(pError) {
		*pError = Error;
	}

err_out:
	return NULL;
}
Exemplo n.º 8
0
static BT_HANDLE i2c_probe(const BT_INTEGRATED_DEVICE *pDevice, BT_ERROR *pError) {

	BT_ERROR Error = BT_ERR_NONE;
	BT_HANDLE hI2C = NULL;

	const BT_RESOURCE *pResource = BT_GetIntegratedResource(pDevice, BT_RESOURCE_MEM, 0);
	if(!pResource) {
		Error = BT_ERR_INVALID_RESOURCE;
		goto err_out;
	}

	hI2C = BT_CreateHandle(&oHandleInterface, sizeof(struct _BT_OPAQUE_HANDLE), pError);
	if(!hI2C) {
		Error = BT_ERR_NO_MEMORY;
		goto err_out;
	}

	hI2C->pRegs = (ZYNQ_I2C_REGS *) bt_ioremap((void *)pResource->ulStart, BT_SIZE_4K);

	pResource = BT_GetIntegratedResource(pDevice, BT_RESOURCE_IRQ, 0);
	if(!pResource) {
		Error = BT_ERR_INVALID_RESOURCE;
		goto err_free_out;
	}

	BT_u32 ulIRQ = pResource->ulStart;

	Error = BT_RegisterInterrupt(ulIRQ, i2c_irq_handler, hI2C);
	if(Error) {
		Error = BT_ERR_GENERIC;	// Device already in use!
		goto err_free_out;
	}

	BT_EnableInterrupt(ulIRQ);

	hI2C->pDevice = pDevice;
	i2c_set_clock_rate(hI2C, BT_I2C_CLOCKRATE_400kHz);

	hI2C->pMutex = BT_kMutexCreate();
	if(!hI2C->pMutex) {
		Error = BT_ERR_NO_MEMORY;
		goto err_free_int_out;
	}

	BT_kMutexPend(hI2C->pMutex, 0);

	pResource = BT_GetIntegratedResource(pDevice, BT_RESOURCE_BUSID, 0);
	if(!pResource) {
		Error = BT_ERR_INVALID_RESOURCE;
		goto err_free_int_out;
	}

	BT_u32 ulBusID = pResource->ulStart;

	hI2C->pRegs->CONTROL |= 0x0000000E;

	BT_I2C_RegisterBusWithID(hI2C, ulBusID);

	if(pError) {
		*pError = Error;
	}

	return hI2C;

err_free_int_out:
	BT_UnregisterInterrupt(ulIRQ, i2c_irq_handler, hI2C);

err_free_out:
	BT_DestroyHandle(hI2C);

err_out:
	if(pError) {
		*pError = Error;
	}

	return NULL;
}