void datastream_control::m4_comm_spark(int advance, int absolute) { m4_lock.lock(); if(advance == 0) { /* no advance, disable */ clrbit(construct_mode4[13],0); /* disable spark control */ clrbit(construct_mode4[13],2); /* clear mode (redundant ...) */ clrbit(construct_mode4[13],1); /* clear advret (redundant ...) */ construct_mode4[14] = 0; /* clear adv */ } else { /* enable advance */ setbit(construct_mode4[13],0); /* set spark control enable bit */ /* WARNING absolute mode is kinda f*****g dangerous, dont use it */ if(absolute == 1) { /* configure for absolute spark */ clrbit(construct_mode4[13],2); /* abs mode */ construct_mode4[14] = clamp(advance,0,70); /* set advance */ /* don't bother with retard/advance, abs negative spark is useless */ } else { /* configure for delta spark */ setbit(construct_mode4[13],2); /* delta mode */ if(advance > 0) { clrbit(construct_mode4[13],1); /* advance */ construct_mode4[14] = clamp(advance,0,70); } else { setbit(construct_mode4[13],1); /* retard */ construct_mode4[14] = clamp(( 1 - advance ),0,70); } } } m4_updated.request(); m4_lock.unlock(); }
static void ucg_com_arduino_send_generic_SW_SPI(ucg_t *ucg, uint8_t data) { uint32_t sda_pin = ucg->pin_list[UCG_PIN_SDA]; uint32_t scl_pin = ucg->pin_list[UCG_PIN_SCL]; Pio *sda_port = g_APinDescription[sda_pin].pPort; Pio *scl_port = g_APinDescription[scl_pin].pPort; uint8_t i = 8; sda_pin = g_APinDescription[sda_pin].ulPin; scl_pin = g_APinDescription[scl_pin].ulPin; do { if ( data & 128 ) { setbit( sda_port, sda_pin) ; } else { clrbit( sda_port, sda_pin) ; } //delayMicroseconds(1); ucg_nano_delay(); setbit( scl_port, scl_pin); //delayMicroseconds(1); ucg_nano_delay(); i--; clrbit( scl_port, scl_pin) ; data <<= 1; } while( i > 0 ); }
/*------------------------------------------------------------------------------- Send instruction to the LCD LcdInstructionWrite (uint8_t u8Instruction) u8Instruction = Instruction to send to the LCDCHSIZE 2 2469 -------------------------------------------------------------------------------*/ void LcdInstructionWrite (uint8_t u8Instruction) { clrbit(LCD_CTRL, LCD_CS); // Select clrbit(LCD_CTRL,LCD_RS); // Instruction mode USARTD0.DATA= u8Instruction; while(!testbit(USARTD0.STATUS,6)); // Wait until transmit done setbit(USARTD0.STATUS,6); }
void m4_comm_spark(int advance, int absolute) { if(advance == 0 || MODE4MAXSPK > 60) { /* no advance, disable */ clrbit(mfb[13],0); /* disable spark control */ clrbit(mfb[13],2); /* clear mode (redundant ...) */ clrbit(mfb[13],1); /* clear advret (redundant ...) */ mfb[14] = 0; /* clear adv */ m4_status.sparkabs = 0; m4_status.sparkdelta = 0; } else { /* enable advance */ setbit(mfb[13],0); /* set spark control enable bit */ /* WARNING absolute mode is kinda f*****g dangerous, dont use it */ if(absolute == 1) { /* configure for absolute spark */ clrbit(mfb[13],2); /* abs mode */ mfb[14] = rf_clamp_int(MODE4MINSPK,MODE4MAXSPK,advance); /* set advance */ m4_status.sparkabs = advance; m4_status.sparkdelta = 0; /* don't bother with retard/advance, abs negative spark is useless */ } else { /* configure for delta spark */ setbit(mfb[13],2); /* delta mode */ if(advance > 0) { clrbit(mfb[13],1); /* advance */ mfb[14] = rf_clamp_int(MODE4MINSPK,MODE4MAXSPK,advance); } else { setbit(mfb[13],1); /* retard */ mfb[14] = rf_clamp_int(MODE4MINSPK,MODE4MAXSPK,( 1 - advance )); } m4_status.sparkabs = 0; m4_status.sparkdelta = advance; } } }
void put(struct page *page, void *p) { struct slot slot = toslot(page, p); clrbit(page->ptr, slot.base); while (slot.count--) { clrbit(page->index, slot.base); slot.base++; } } /* put() */
int spec_open_clone(struct vop_open_args *ap) { struct vnode *cvp, *vp = ap->a_vp; struct cloneinfo *cip; int error, i; DNPRINTF("cloning vnode\n"); if (minor(vp->v_rdev) >= (1 << CLONE_SHIFT)) return (ENXIO); for (i = 1; i < sizeof(vp->v_specbitmap) * NBBY; i++) if (isclr(vp->v_specbitmap, i)) { setbit(vp->v_specbitmap, i); break; } if (i == sizeof(vp->v_specbitmap) * NBBY) return (EBUSY); /* too many open instances */ error = cdevvp(makedev(major(vp->v_rdev), (i << CLONE_SHIFT) | minor(vp->v_rdev)), &cvp); if (error) { clrbit(vp->v_specbitmap, i); return (error); /* out of vnodes */ } VOP_UNLOCK(vp, 0, ap->a_p); error = cdevsw[major(vp->v_rdev)].d_open(cvp->v_rdev, ap->a_mode, S_IFCHR, ap->a_p); vn_lock(vp, LK_EXCLUSIVE | LK_RETRY, ap->a_p); if (error) { vput(cvp); clrbit(vp->v_specbitmap, i); return (error); /* device open failed */ } cvp->v_flag |= VCLONE; cip = malloc(sizeof(struct cloneinfo), M_TEMP, M_WAITOK); cip->ci_data = vp->v_data; cip->ci_vp = cvp; cvp->v_specparent = vp; vp->v_flag |= VCLONED; vp->v_data = cip; DNPRINTF("clone of vnode %p is vnode %p\n", vp, cvp); return (0); /* device cloned */ }
void datastream_control::m4_drop_cyl(int cyl) { m4_lock.lock(); if(cyl == 0) { /* cyl 0 = disable */ clrbit(construct_mode4[9],7); /* disable cut */ construct_mode4[12] = 0x00; /* disable cyl */ } else { clrbit(construct_mode4[9],6); // disable afr construct_mode4[12] = cylnum_to_m4ref(cyl); setbit(construct_mode4[9],7); /* enable cut */ } m4_updated.request(); m4_lock.unlock(); }
void datastream_control::m4_comm_afr(byte afr) { m4_lock.lock(); if(afr > 0) { clrbit(construct_mode4[9],7); // disable cyl drop setbit(construct_mode4[9],6); construct_mode4[12] = m4_process_afr(afr); } else { clrbit(construct_mode4[9],6); construct_mode4[12] = 0x00; } m4_updated.request(); m4_lock.unlock(); }
unsigned char s1d13700_read_data(void) { unsigned int val; S1D13700_DATA_DIR_IN(); clrbit(S1D13700_CS_VAL); WAIT(6); clrbit(S1D13700_RD_VAL); WAIT(10); val = __raw_readl(S1D13700_REG(PIO_ODSR)); setbit(S1D13700_RD_VAL); WAIT(6); setbit(S1D13700_CS_VAL); return (unsigned char)((val & S1D13700_DATA_MASK)>>S1D13700_BASE_PIN); }
void datastream_control::m4_force_gear(int gear) { m4_lock.lock(); if(gear == 0) { // disable clrbit(construct_mode4[7],2); clrbit(construct_mode4[7],3); clrbit(construct_mode4[8],2); clrbit(construct_mode4[8],3); } else if(gear >= 1 && gear <= 4) { setbit(construct_mode4[7],2); setbit(construct_mode4[7],3); switch(gear) { case 1: setbit(construct_mode4[8],2); setbit(construct_mode4[8],3); break; case 2: clrbit(construct_mode4[8],2); setbit(construct_mode4[8],3); break; case 4: setbit(construct_mode4[8],2); clrbit(construct_mode4[8],3); break; case 3: clrbit(construct_mode4[8],2); clrbit(construct_mode4[8],3); break; } } m4_updated.request(); m4_lock.unlock(); }
static void _serial_init(int bord_rate, int data, int parity, int stop) { setval(GPHCON, 0xa, 4, 4 + 4 * UART_NR); setbit(GPHUP, 0x3, 2 + 2 * UART_NR); switch(data) { case 5: clrbit(ULCON, 0x3, 0); break; case 6: setval(ULCON, 0x1, 2, 0); break; case 7: setval(ULCON, 0x2, 2, 0); break; case 8: default: setbit(ULCON, 0x3, 0); } switch(parity) { case 1: setval(ULCON, 0x4, 3, 3); break; case 2: setval(ULCON, 0x5, 3, 3); break; case 0: default: clrbit(ULCON, 0x7, 3); } switch(stop) { case 2: set1(ULCON, 2); break; case 1: default: set0(ULCON, 2); } setval(UCON, 0x5, 4, 0); UBRDIV = get_pclk() / (bord_rate * 16) - 1; }
/* * Indicate whether there are frames queued for a station in power-save mode. */ static int ieee80211_set_tim(struct ieee80211_node *ni, int set) { struct ieee80211vap *vap = ni->ni_vap; struct ieee80211com *ic = ni->ni_ic; uint16_t aid; int changed; KASSERT(vap->iv_opmode == IEEE80211_M_HOSTAP || vap->iv_opmode == IEEE80211_M_IBSS, ("operating mode %u", vap->iv_opmode)); aid = IEEE80211_AID(ni->ni_associd); KASSERT(aid < vap->iv_max_aid, ("bogus aid %u, max %u", aid, vap->iv_max_aid)); IEEE80211_LOCK(ic); changed = (set != (isset(vap->iv_tim_bitmap, aid) != 0)); if (changed) { if (set) { setbit(vap->iv_tim_bitmap, aid); vap->iv_ps_pending++; } else { clrbit(vap->iv_tim_bitmap, aid); vap->iv_ps_pending--; } /* NB: we know vap is in RUN state so no need to check */ vap->iv_update_beacon(vap, IEEE80211_BEACON_TIM); } IEEE80211_UNLOCK(ic); return changed; }
/* * Include or exclude pages in a sparse dump, by half-open virtual * address interval (which may wrap around the end of the space). */ static void sparse_dump_mark(vaddr_t vbegin, vaddr_t vend, int includep) { pmap_t pmap; paddr_t p; vaddr_t v; /* * If a partial page is called for, the whole page must be included. */ if (includep) { vbegin = rounddown(vbegin, PAGE_SIZE); vend = roundup(vend, PAGE_SIZE); } else { vbegin = roundup(vbegin, PAGE_SIZE); vend = rounddown(vend, PAGE_SIZE); } pmap = pmap_kernel(); for (v = vbegin; v != vend; v += PAGE_SIZE) { if (pmap_extract(pmap, v, &p)) { if (includep) setbit(sparse_dump_physmap, p/PAGE_SIZE); else clrbit(sparse_dump_physmap, p/PAGE_SIZE); } } }
void s1d13700_hard_reset(void) { clrbit(S1D13700_RST_VAL|S1D13700_DOFF_VAL); SLEEP(50); setbit(S1D13700_RST_VAL|S1D13700_DOFF_VAL); SLEEP(50); }
/* * Get a character from a clist. */ int getc(struct clist *clp) { int c = -1; int s; s = spltty(); if (clp->c_cc == 0) goto out; c = *clp->c_cf & 0xff; *clp->c_cf = 0; if (clp->c_cq) { if (isset(clp->c_cq, clp->c_cf - clp->c_cs)) c |= TTY_QUOTE; clrbit(clp->c_cq, clp->c_cf - clp->c_cs); } if (++clp->c_cf == clp->c_ce) clp->c_cf = clp->c_cs; if (--clp->c_cc == 0) clp->c_cf = clp->c_cl = (u_char *)0; out: splx(s); return c; }
/* * Remove the last character in the clist and return it. */ int unputc(struct clist *clp) { unsigned int c = -1; int s; s = spltty(); if (clp->c_cc == 0) goto out; if (clp->c_cl == clp->c_cs) clp->c_cl = clp->c_ce - 1; else --clp->c_cl; clp->c_cc--; c = *clp->c_cl & 0xff; *clp->c_cl = 0; if (clp->c_cq) { if (isset(clp->c_cq, clp->c_cl - clp->c_cs)) c |= TTY_QUOTE; clrbit(clp->c_cq, clp->c_cl - clp->c_cs); } if (clp->c_cc == 0) clp->c_cf = clp->c_cl = (u_char *)0; out: splx(s); return c; }
/* * optimized version of * * for (i = 0; i < len; i++) * clrbit(cp, off + i); */ void clrbits(u_char *cp, int off, int len) { int sby, sbi, eby, ebi; int i; u_char mask; if (len==1) { clrbit(cp, off); return; } sby = off / NBBY; sbi = off % NBBY; eby = (off+len) / NBBY; ebi = (off+len) % NBBY; if (sby == eby) { mask = ((1 << (ebi - sbi)) - 1) << sbi; cp[sby] &= ~mask; } else { mask = (1<<sbi) - 1; cp[sby++] &= mask; for (i = sby; i < eby; i++) cp[i] = 0x00; mask = (1<<ebi) - 1; if (mask) /* if no mask, eby may be 1 too far */ cp[eby] &= ~mask; } }
/* * Switch to the next channel marked for scanning. */ void ieee80211_next_scan(struct ifnet *ifp) { struct ieee80211com *ic = (void *)ifp; struct ieee80211_channel *chan; chan = ic->ic_bss->ni_chan; for (;;) { if (++chan > &ic->ic_channels[IEEE80211_CHAN_MAX]) chan = &ic->ic_channels[0]; if (isset(ic->ic_chan_scan, ieee80211_chan2ieee(ic, chan))) { /* * Ignore channels marked passive-only * during an active scan. */ if ((ic->ic_flags & IEEE80211_F_ASCAN) == 0 || (chan->ic_flags & IEEE80211_CHAN_PASSIVE) == 0) break; } if (chan == ic->ic_bss->ni_chan) { ieee80211_end_scan(ifp); return; } } clrbit(ic->ic_chan_scan, ieee80211_chan2ieee(ic, chan)); DPRINTF(("chan %d->%d\n", ieee80211_chan2ieee(ic, ic->ic_bss->ni_chan), ieee80211_chan2ieee(ic, chan))); ic->ic_bss->ni_chan = chan; ieee80211_new_state(ic, IEEE80211_S_SCAN, -1); }
void seven_seg(unsigned char counter){ unsigned char temp; temp = counter % 10; setbit(temp,4); clrbit(temp,5); PORTC = temp; _delay_ms(1); temp = counter / 10; setbit(temp,5); clrbit(temp,4); PORTC = temp; _delay_ms(1); }
void datastream_control::m4_actuator(int enable_byte, int enable_bit, int actuator_byte, int actuator_bit, bool set, bool enable = true) { m4_lock.lock(); if(enable == false) { // auto clrbit(construct_mode4[enable_byte],enable_bit); clrbit(construct_mode4[actuator_byte],actuator_bit); } else if(set == true) { // force on setbit(construct_mode4[enable_byte],enable_bit); setbit(construct_mode4[actuator_byte],actuator_bit); } else { // force off setbit(construct_mode4[enable_byte],enable_bit); clrbit(construct_mode4[actuator_byte],actuator_bit); } m4_updated.request(); m4_lock.unlock(); }
void ieee80211_set_tim(struct ieee80211com *ic, int aid, int set) { if (set) setbit(ic->ic_tim_bitmap, aid & ~0xc000); else clrbit(ic->ic_tim_bitmap, aid & ~0xc000); }
void m4_comm_idle(int rpm, int mode) { if(rpm == 0) { /* disable idle command */ clrbit(mfb[9],4); /* clear iac enable */ clrbit(mfb[9],5); /* clear steps/rpm */ m4_status.rpm = 0; } else if(mode == 1) { /* RPM mode */ setbit(mfb[9],4); /* set iac enable */ setbit(mfb[9],5); /* set rpm mode */ m4_status.rpm = rf_clamp_int(0,3000,rpm); /* clamp and set stat */ mfb[11] = m4_status.rpm * 0.08; /* set rpm */ } else { /* steps mode */ setbit(mfb[9],4); /* set iac enable */ clrbit(mfb[9],5); /* set rpm mode */ m4_status.rpm = rf_clamp_int(0,255,rpm); /* clamp and set stat */ mfb[11] = rpm; } }
static uint8_t picUnit_report_test_passed(uint8_t * noOfTestsRun_p, uint8_t testResults[]) { uint8_t byteInArray = *noOfTestsRun_p / 8; uint8_t bitInByte = *noOfTestsRun_p % 8; (*noOfTestsRun_p)++; clrbit(testResults[byteInArray], bitInByte); return 0; }
void s1d13700_write_data(unsigned char data) { S1D13700_DATA_DIR_OUT(); S1D13700_SET_DATA(data); clrbit(S1D13700_CS_VAL|S1D13700_WR_VAL|S1D13700_A0_VAL); WAIT(6); setbit(S1D13700_CS_VAL|S1D13700_WR_VAL|S1D13700_A0_VAL); }
int main(int argc, char *argv[]) { static const unsigned primes[] = { 2, 3, 5, 7, 11, 13, 17, 19, 23, 29, 31, 37, 41, 43, 47, 53, 59, 61, 67, 71, 73, 79, 83, 89, 97, 101, 103, 107, 109, 113, 127, 131, 137, 139, 149, 151, 157, 163, 167, 173, 179, 181, 191, 193, 197, 199, 211, 223, 227, 229, 233, 239, 241, 251 }; struct page page; char word[256], *str; int opt, fflag = 0; unsigned i; setlocale(LC_ALL, "C"); memset(&page, 0, sizeof page); while (-1 != (opt = getopt(argc, argv, "bfzh"))) { switch (opt) { case 'b': page.flags |= BESTFIT; break; case 'f': fflag = 1; for (i = 0; i < sizeof primes / sizeof primes[0] && i < SLOTCOUNT; i++) setbit(page.index, primes[i]); break; case 'z': printf("(struct page) : %zu\n", sizeof page); printf("offsetof(data) : %zu\n", offsetof(struct page, data)); return 0; default: fprintf(stderr, "%s [-bfzh]\n" " -b Best fit\n" " -f Fragment memory\n" " -z Print data structure sizes\n" " -h Print usage\n\n" "Report bugs to <*****@*****.**>\n", argv[0]); return (opt == 'h')? 0 : EXIT_FAILURE; } /* switch() */ } while (EOF != scanf("%256s", word)) { if (!(str = sdup(&page, word))) perror("sdup"); } if (fflag) { for (i = 0; i < sizeof primes / sizeof primes[0] && i < SLOTCOUNT; i++) clrbit(page.index, primes[i]); } printpage(&page, stdout); return 0; } /* main() */
void datastream_control::m4_comm_idle(int rpm, int mode) { m4_lock.lock(); if(rpm == 0) { /* disable idle command */ clrbit(construct_mode4[9],4); /* clear iac enable */ clrbit(construct_mode4[9],5); /* clear steps/rpm */ construct_mode4[11] = 0x00; } else if(mode == 1) { /* RPM mode */ setbit(construct_mode4[9],4); /* set iac enable */ setbit(construct_mode4[9],5); /* set rpm mode */ construct_mode4[11] = rpm * 0.08; /* set rpm */ } else { /* steps mode */ setbit(construct_mode4[9],4); /* set iac enable */ clrbit(construct_mode4[9],5); /* set rpm mode */ construct_mode4[11] = rpm; } m4_updated.request(); m4_lock.unlock(); }
// Transfer buffer to display void dma_display(void) { clrbit(LCD_CTRL, LCD_CS); // Select clrbit(LCD_CTRL,LCD_RS); // Instruction mode setbit(DMA.CH2.CTRLA,6); // reset DMA CH0 DMA.CH2.ADDRCTRL = 0b00010000; // Increment source, Destination fixed DMA.CH2.TRFCNT = 3; // buffer size DMA.CH2.DESTADDR0 = (((uint16_t) &USARTD0.DATA)>>0*8) & 0xFF; DMA.CH2.DESTADDR1 = (((uint16_t) &USARTD0.DATA)>>1*8) & 0xFF; DMA.CH2.TRIGSRC = DMA_CH_TRIGSRC_USARTD0_DRE_gc; DMA.CH2.SRCADDR0 = (((uint16_t)(Disp_send.display_setup))>>0*8) & 0xFF; DMA.CH2.SRCADDR1 = (((uint16_t)(Disp_send.display_setup))>>1*8) & 0xFF; DMA.CH2.CTRLA = 0b10000100; // no repeat, 1 byte burst _delay_us(4); // Wait for 3 bytes to be sent setbit(LCD_CTRL, LCD_RS); // Data mode DMA.CH2.TRFCNT = 1024; // buffer size DMA.CH2.CTRLB = 0b00010001; // Low priority interrupt on complete DMA.CH2.CTRLA = 0b10000100; // no repeat, 1 byte burst }
/* * Update the cluster map because of an allocation or free. * * Cnt == 1 means free; cnt == -1 means allocating. */ void ffs_clusteracct(struct fs *fs, struct cg *cgp, int32_t blkno, int cnt) { int32_t *sump; int32_t *lp; u_char *freemapp, *mapp; int i, start, end, forw, back, map, bit; const int needswap = UFS_FSNEEDSWAP(fs); if (fs->fs_contigsumsize <= 0) return; freemapp = cg_clustersfree_swap(cgp, needswap); sump = cg_clustersum_swap(cgp, needswap); /* * Allocate or clear the actual block. */ if (cnt > 0) setbit(freemapp, blkno); else clrbit(freemapp, blkno); /* * Find the size of the cluster going forward. */ start = blkno + 1; end = start + fs->fs_contigsumsize; if ((unsigned)end >= ufs_rw32(cgp->cg_nclusterblks, needswap)) end = ufs_rw32(cgp->cg_nclusterblks, needswap); mapp = &freemapp[start / NBBY]; map = *mapp++; bit = 1 << (start % NBBY); for (i = start; i < end; i++) { if ((map & bit) == 0) break; if ((i & (NBBY - 1)) != (NBBY - 1)) { bit <<= 1; } else { map = *mapp++; bit = 1; } } forw = i - start; /* * Find the size of the cluster going backward. */ start = blkno - 1; end = start - fs->fs_contigsumsize; if (end < 0) end = -1; mapp = &freemapp[start / NBBY]; map = *mapp--; bit = 1 << (start % NBBY); for (i = start; i > end; i--) { if ((map & bit) == 0) break; if ((i & (NBBY - 1)) != 0) { bit >>= 1; } else {
void SendNoteOff(uint8_t no) { while (Busy2USART()); Write2USART(0x80|CHANNEL); while (Busy2USART()); Write2USART(no); while (Busy2USART()); Write2USART(VELOCITY); clrbit(leds,no-octave*12); __delay_ms(1); }
//************************** void send_error () { unsigned int j =0; while(j<100) { setbit(PTC,0); delay_us(500); clrbit(PTC,0); delay_us(500); j++; } }